Chan Lee [Thu, 1 Jun 2017 03:28:22 +0000 (12:28 +0900)]
packaging: enable log_exe_name sanitizer option for ASan
This option shoule be 'log_exe_name' not 'log_exe_path'
According to SanitizerCommonFlags,
(https://github.com/google/sanitizers/wiki/SanitizerCommonFlags)
Enabling this option makes ASan mention name of executable when reporting error and append
executable name to logs (as in "log_path.exe_name.pid").
Change-Id: I0a49a2032355b6527ea7522faa1414ec8d567125
Signed-off-by: Chan Lee <chan45.lee@samsung.com>
Denis Khalikov [Fri, 2 Jun 2017 09:17:06 +0000 (12:17 +0300)]
PR sanitizer/80414
* ubsan.c (ubsan_expand_bounds_ifn): Pass original index
to ubsan_encode_value.
Change-Id: Id8e339c51aac586cd7d61e02a6711e875354948a
Signed-off-by: Denis Khalikov <d.khalikov@partner.samsung.com>
Denis Khalikov [Mon, 17 Apr 2017 16:31:13 +0000 (19:31 +0300)]
[ubsan] Ported fix for PR sanitizer/79897
2017-03-07 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/79897
* ubsan.c (ubsan_encode_value): Call mark_addressable on the
temporary.
Change-Id: I075edb26f51d4ec2eccc2e59dbbe489b43b3b5db
Signed-off-by: Denis Khalikov <d.khalikov@partner.samsung.com>
nathan [Thu, 27 Apr 2017 10:56:35 +0000 (13:56 +0300)]
PR c++/79296 - ICE mangling localized template instantiation
* decl2.c (determine_visibility): Use template fn context for
local class instantiations.
PR c++/79296
* g++.dg/cpp0x/pr79296.C: New.
Change-Id: I51b9ba39a48a97a8836976baf5f598ede9ba695a
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@245398
138bc75d-0d04-0410-961f-
82ee72b054a4
Dmitriy Nikiforov [Thu, 11 May 2017 14:37:27 +0000 (17:37 +0300)]
[sanitizer-coverage] Add new coverage dump interface
libsanitizer/
* include/santizer/coverage_interface.h
(__sanitizer_dump_coverage): New function.
* sanitizer_common/sanitizer_interface_internal.h
(__sanitizer_dump_coverage): Likewise.
* sanitizer_common/sanitizer_coverage_libcdep_new.cc: New file.
* sanitizer/Makefile.am: Updated.
* sanitzer/Makefile.in: Updated.
Partially backported from LLVM mainline r289498, r291267, r291736, r289851.
Change-Id: I6c13ca8e6e7cfb3c98596970c8ba243296464eeb
Signed-off-by: Dmitriy Nikiforov <d.nikiforov@partner.samsung.com>
Dmitriy Nikiforov [Thu, 11 May 2017 14:24:59 +0000 (17:24 +0300)]
[sanitizer-coverage] Add interface for coverage symbolization
libsanitizer/
* sanitizer_common/sanitizer_stacktrace_libcdep.cc:
(__sanitizer_symbolize_pc): New function.
(__sanitizer_get_module_and_offset_for_pc): New function.
* include/sanitizer/common_interface_defs.h
(__sanitizer_symbolize_pc): Likewise.
(__sanitizer_get_module_and_offset_for_pc): Likewise.
* sanitizer_common/sanitizer_interface_internal.h
(__sanitizer_get_module_and_offset_for_pc): Likewise.
Partially backported from LLVM mainline r281886, r279780, r288711,
r281668, r281015, r289498. Also, fixed argument names in declarations of
__sanitizer_get_module_and_offset_for_pc().
Change-Id: I3722eb8d3e1cd07b6b862f1a4421517b32b22c5a
Signed-off-by: Dmitriy Nikiforov <d.nikiforov@partner.samsung.com>
Dmitriy Nikiforov [Thu, 11 May 2017 14:21:34 +0000 (17:21 +0300)]
[sanitizer-coverage] Add stub for trace-pc instrumentation
libsanitizer/
* sanitizer_common/sanitizer_coverage_libcdep.cc (__sanitizer_cov_trace_pc):
New function.
Change-Id: I1ead302ccb56c8f20d1a6e29a7cdef8963fa4090
Signed-off-by: Dmitriy Nikiforov <d.nikiforov@partner.samsung.com>
Mikhail Kashkarov [Wed, 10 May 2017 09:58:52 +0000 (12:58 +0300)]
Move static array from header to .c file (fixed increased memory usage bs-45)
Please, remove this commit when merging c1cb342.
gcc/
* config/arm/arm-opts.h: Move struct arm_arch_core_flag and
static array arm_arch_core_flags to...
* common/config/arm/arm-common.c: There.
Change-Id: Id71ddb5deac5372791b63f9bf03852e661477bf4
Slava Barinov [Thu, 27 Apr 2017 08:20:09 +0000 (11:20 +0300)]
Do not build libgfortran unless requested explicitly
* gcc/fortran/config-lang.in : add conditional target_libs setup.
This option does not make sense in upstream GCC - Fortran frontend is useless
without runtime, but will work with qemu-accel in Tizen OBS environment.
Change-Id: Ie42fa3201a0bc022ef46ef53b51be896ad091943
Signed-off-by: Slava Barinov <v.barinov@samsung.com>
Chan Lee [Mon, 24 Apr 2017 07:11:01 +0000 (16:11 +0900)]
packaging: add fortran compiler
Change-Id: I139d3b29c690a05e29bcfcfa660350f63bbbdadc
Signed-off-by: Chan Lee <chan45.lee@samsung.com>
Denis Khalikov [Wed, 26 Apr 2017 15:27:29 +0000 (18:27 +0300)]
commit
6fdba17a20fd7c5f31f39556dc511abe3a537204
Author: Maxim Ostapenko <m.ostapenko@partner.samsung.com>
Date: Fri Oct 28 06:49:53 2016 +0000
[asan/lsan] Avoid possible deadlock in dynamic ASan runtime thread initialization.
There is possible deadlock in dynamic ASan runtime when we dlopen() shared lib
which creates a thread at the global initialization stage. The scenario:
1) dlopen grabs a GI_pthread_mutex_lock in main thread.
2) main thread calls pthread_create, ASan intercepts it, calls real pthread_create
and waits for the second thread to be "fully initialized".
3) Newly created thread tries to access a thread local disable_counter in LSan
(to complete its "full initialization") and hangs in tls_get_addr_tail, because
it also tries to acquire GI_pthread_mutex_lock.
The issue is reproducible on relative recent Glibc versions e.g. 2.23.
Differential Revision: https://reviews.llvm.org/D26028
Change-Id: I0ed82cb81dd9d37d0be96ece03b667090b72164a
Slava Barinov [Fri, 7 Apr 2017 10:06:58 +0000 (13:06 +0300)]
Remove hard-coded path to extract-ubsan-logs script
Change-Id: Id515f89e748fbe9a18f5a615e100eb530a0c5930
Signed-off-by: Slava Barinov <v.barinov@samsung.com>
Dongkyun, Son [Thu, 6 Apr 2017 10:03:50 +0000 (19:03 +0900)]
Keep to use version 6.2.1
This is for the Tizen version policy (First released to 6.2.1
20161213)
Change-Id: I6aa5d673c922401eff605448fe4ab6b3512ccd71
Signed-off-by: Dongkyun, Son <dongkyun.s@samsung.com>
Dongkyun, Son [Fri, 7 Apr 2017 01:27:29 +0000 (10:27 +0900)]
packaging: add license files to all sub components
The license files are added to only library components because they could be
included to target binary.
Change-Id: I7fb9885843794ea47c29833ead402386d890d663
Signed-off-by: Chan Lee <chan45.lee@samsung.com>
Signed-off-by: Dongkyun, Son <dongkyun.s@samsung.com>
Chan Lee [Fri, 7 Apr 2017 07:04:02 +0000 (16:04 +0900)]
packaging: remove cloog
Cloog had been removed from gcc.
Related git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218348
138bc75d-0d04-0410-961f-
82ee72b054a4
Change-Id: Ifc898f5f4b429382d082b43e3cbfd4e46b226e2f
Signed-off-by: Chan Lee <chan45.lee@samsung.com>
Chan Lee [Mon, 27 Mar 2017 01:30:18 +0000 (10:30 +0900)]
packaging: provide 64bit libs on 32bit build env
In some cases, especially .Net toolchain needs 64bit libs to execute
even though 32bit build environment.
It's a little weird but possble because almost archtecture of build machine is 64bit.
Change-Id: I0d8df53d4743a4fa1b2c00d6aeeeed77e8b964cf
Signed-off-by: Chan Lee <chan45.lee@samsung.com>
Slava Barinov [Thu, 2 Mar 2017 08:47:59 +0000 (11:47 +0300)]
Enabling libcc1 build
Change-Id: I4485bdf215e020450a65970474b591e98a7367f1
Slava Barinov [Tue, 28 Feb 2017 12:17:45 +0000 (15:17 +0300)]
Add liblsan packaging
Change-Id: I44084744a83cdc87e69b2a1f25cc4138bac31913
Signed-off-by: Slava Barinov <v.barinov@samsung.com>
Slava Barinov [Tue, 28 Feb 2017 11:35:47 +0000 (14:35 +0300)]
Basing on 6.3.1 branch
Change-Id: Idbb9664859cb4a000f1a5631bc948652b49e9fc4
Signed-off-by: Slava Barinov <v.barinov@samsung.com>
Maxim Ostapenko [Tue, 8 Nov 2016 10:45:49 +0000 (13:45 +0300)]
Move SanitizerToolName definition before MaybeMountProcFS.
The MaybeMountProcFS uses SanitizerToolName in its failure messages so we
need it defined at this point.
Change-Id: I6a568e1ebf3d646ecfbdb53fd8e48910e9b66559
Signed-off-by: Maxim Ostapenko <m.ostapenko@samsung.com>
Ivan Baravy [Mon, 27 Feb 2017 08:44:27 +0000 (11:44 +0300)]
Fix the UBSan inexpensive call sanitization
The change imported in order to fix false positive -Wmaybe-uninitialized
in several packages in UBSan builds.
* gimple.c: Include builtins.h
(gimple_inexpensive_call_p): New function.
* gimple.h (gimple_inexpensive_call_p): Declare.
* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Use it.
* tree-ssa-loop-ivcanon.c (tree_estimate_loop_size): Likewise;
fix formatting.
upstream hash:
f18de397b1e0523fd840800399ec6ea21ec04af8
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@237172
138bc75d-0d04-0410-961f-
82ee72b054a4
Authored-by: hubicka
Ivan Baravy [Mon, 27 Feb 2017 08:07:23 +0000 (11:07 +0300)]
Make lsan-force-options and lsan-build-env more usable. Factor out common
code from {A, UB}San to sanitizer_common code.
Add -fno-omit-frame-pointer -U_FORTIFY_SOURCE to lsan-force-options because
LSan heavily relies on frame pointers. Disable LSan in QEMU builds through
LSAN_OPTIONS file. Refactor Tizen specific patches in ASan and UBSan.
Maxim Ostapenko [Thu, 4 Aug 2016 08:27:22 +0000 (11:27 +0300)]
Fix ASan tests.
Some ASan tests fail due to:
1) Unable to unwind malloc trace.
2) Return invalid code due to hant_on_error=false enabled by default.
Let's fix this.
Change-Id: I634c5bff0e21a693a4168eaa12f443cee114a83e
Signed-off-by: Maxim Ostapenko <m.ostapenko@samsung.com>
Ivan Baravy [Mon, 27 Feb 2017 08:00:20 +0000 (11:00 +0300)]
Set detect_leaks = false and halt_on_error = false by default.
Set detect_leaks and halt_on_error to false by default because mic
installs asan-build-env package too late.
Maxim Ostapenko [Wed, 6 Jul 2016 10:04:28 +0000 (13:04 +0300)]
Remove redundant calls of MaybeMountProcFS and refactor it.
It seems that we have lots of redundant MaybeMountProcFS, in particular
each mapped sanitized shared library calls it from AsanInitializer constructor.
Remove redudant MaybeMountProcFS calls from AsanInitializer and __asan_init.
Also, it seems that under qemu-aarch64 opening /proc/self/maps for reading
might be very expensive, so replace OpenFile("/proc/self/maps", RdOnly) with
FileExists("/proc/self/maps") in MaybeMountProcFS to avoid expensive calls.
Change-Id: I8ba28dbbc102be519fa2b284520509f601ec5cf7
Signed-off-by: Maxim Ostapenko <m.ostapenko@samsung.com>
Ivan Baravy [Mon, 27 Feb 2017 07:52:50 +0000 (10:52 +0300)]
Backport from GCC mainline.
2016-06-10 Maxim Ostapenko <m.ostapenko@samsung.com>
PR sanitizer/71480
* varasm.c (place_block_symbol): Adjust alignment for asan protected
STRING_CSTs even if TREE_CONSTANT_POOL_ADDRESS_P.
* c-c++-common/asan/pr71480.c: New test.
Ivan Baravy [Mon, 27 Feb 2017 07:42:49 +0000 (10:42 +0300)]
Fix c-c++-common/asan/pr64820.c testcase to pass output pattern tests under
qemu-aarch64. Adjust halt_on_error tests.
gcc/testsuite/
* c-c++-common/asan/pr64820.c: Adjust output patterns.
* c-c++-common/asan/halt_on_error-1.c: Adjust.
* c-c++-common/asan/halt_on_error-1.c: Likewise.
Ivan Baravy [Mon, 27 Feb 2017 07:27:43 +0000 (10:27 +0300)]
Backport Tizen specific stuff from VDLinux 6.
Backport from VDLinux 5. Optionally mount /proc in __asan_init to allow
systemd sanitization.
2014-10-21 Yury Gribov <y.gribov@samsung.com>
JIRA: MAVDT-64
* libsanitizer/asan/asan_rtl.cc (MaybeMountProcFS): New function.
(__asan_init): Call MaybeMountProcFS.
Mount /proc not only in AsanInitInternal, but also in __asan_init and AsanInitializer to
ensure we have proc mounted when needed.
* libsanitizer/asan/asan_rtl.cc (__asan_init): Call MaybeMountProcFS.
* (AsanInitializer): Likewise.
Set address space unlimited if it is not.
* libsanitizer/asan/asan_rtl.cc (MaybeDisableUlimit): New function.
(AsanInitInternal): Call it.
Read ASan and UBSan options from predefined file if it is available.
* libsanitizer/asan/asan_flags.cc: Read ASAN_OPTIONS from predefined
file if available.
* libsanitizer/ubsan/ubsan_flags.cc: Likewise.
Maxim Ostapenko [Mon, 26 Dec 2016 08:44:46 +0000 (11:44 +0300)]
Move lsan_check_in_progress definition to lsan_common.cc.
This commit fixes undefined reference error from libasan.so:
/lib/libasan.so: undefined reference to `lsan_check_in_progress'
occurred due to ASan runtime embeds part of LSan runtime and
misses lsan_check_in_progress symbol. To overcome the issue, just move
lsan_check_in_progress definition to lsan_common.cc.
Change-Id: I9ed7f4d490d525bbf7ce054285afaec24716f35a
Signed-off-by: Maxim Ostapenko <m.ostapenko@samsung.com>
Maxim Ostapenko [Wed, 5 Oct 2016 14:04:08 +0000 (17:04 +0300)]
Add mmap/munmap interceptors.
Some allocators may use mmap for their local pools that may cause false positive
reports because LSan currently doesn't intercept mmap call mainly due to its
complexity (we don't know whether a particular mmap would contain live pointers).
However for some cases (e.g. anonymous rw mmaps) we can guess that they would
contain live pointers thus we can add them into root regions. Thus, now we
intercept mmap/munmap calls, add anonymous rw mappings into root regions and
call real mmap.
Change-Id: Ie0bde91497a31ab670f15d67b34d328969dc0981
Signed-off-by: Maxim Ostapenko <m.ostapenko@samsung.com>
Maxim Ostapenko [Thu, 17 Nov 2016 12:58:25 +0000 (15:58 +0300)]
Make {A, L}San allocator more compact.
This change tries to reduce memory consumption of {A, L}Saned image by hacking
primary allocator internals:
* Reduce region size 2^20 -> 2^17.
* Make largest chunk size in primary allocator 2^17 -> 2^16.
The change appears to be quite useful for LSan'ed image:
Stock version:
total used free shared buffers cached
Mem: 964 828 136 3 4 92
Patched version:
total used free shared buffers cached
Mem: 964 688 275 5 13 185
Change-Id: I80b95f7dfb5a7be0e7208567a31606a3d027256c
Signed-off-by: Maxim Ostapenko <m.ostapenko@samsung.com>
Slava Barinov [Tue, 15 Nov 2016 12:51:42 +0000 (15:51 +0300)]
Set 0777 mode to sanitizer tool report
There are processes which are executed with root permissions and then
change the user during run on target.
Without setting up the file mode to 0777 trying to write log causes
write error and process exits.
Change-Id: I88c6738625d67f4db2efea76cc8928d4f58b6e7c
Signed-off-by: Slava Barinov <v.barinov@samsung.com>
Maxim Ostapenko [Mon, 7 Nov 2016 17:16:48 +0000 (20:16 +0300)]
Support print_cmdline in LSan.
Change-Id: I65d37582e6b5c3d54f8628e96edbaf4cbfc7c337
Signed-off-by: Maxim Ostapenko <m.ostapenko@samsung.com>
Signed-off-by: Dongkyun, Son <dongkyun.s@samsung.com>
Slava Barinov [Wed, 24 Aug 2016 12:30:20 +0000 (15:30 +0300)]
Switch off UBSan for sha1 to reduce number of log messages
The sha1 contains intentional unaligned access
Change-Id: I5bb6d0c9bf274e8ed0fe4c87c341dee054623202
Signed-off-by: Slava Barinov <v.barinov@samsung.com>
Slava Barinov [Tue, 8 Nov 2016 08:32:09 +0000 (11:32 +0300)]
Force halt_on_error=true in ASan tests
Since our ASan does not fail application on error by default we should
switch this behaviour on explicitly to keep testsuite work.
Change-Id: I4344f82427bc62a40604a75f5f09f62333b6782d
Signed-off-by: Slava Barinov <v.barinov@samsung.com>
Ivan Baravy [Tue, 21 Feb 2017 18:26:42 +0000 (21:26 +0300)]
* gcc.dg/ubsan/static-init-null.c: New testcase
Slava Barinov [Wed, 31 Aug 2016 14:41:46 +0000 (17:41 +0300)]
Set 0644 mode to sanitizer tool report
Without setting up the file mode explicitly its impossible to read the
logs by users in OBS.
Change-Id: Icaa540b434fc6266cbd0b1ad3391e21b8cbb692f
Signed-off-by: Slava Barinov <v.barinov@samsung.com>
Slava Barinov [Tue, 30 Aug 2016 09:09:23 +0000 (12:09 +0300)]
Add binary name printing support to UBSan
The binary name is needed for reporting with log_path since PID is not
always enough to identify the process right.
Change-Id: Ibefe22bac9f4d2a89eaacb40e6d7dc860b08d5f9
Signed-off-by: Slava Barinov <v.barinov@samsung.com>
Slava Barinov [Thu, 25 Aug 2016 09:51:43 +0000 (12:51 +0300)]
Add SanitizerToolName to UBSan report message
Change-Id: Ia258f1e3906bb095ca0d33d3354dd9b1f640c89f
Signed-off-by: Slava Barinov <v.barinov@samsung.com>
Maxim Ostapenko [Mon, 19 Sep 2016 14:38:07 +0000 (17:38 +0300)]
Deliver LSan fixes for Tizen.
* Read LSAN_OPTIONS from /LSAN_OPTIONS file.
* Add MaybeMountProcFS stuff for LSan. This would allow us to preload
liblsan.so even for systemd when /proc/ isn't mounted yet.
* Add ARM and x86 ports for LSan.
* Add PointsIntoChunk method to protect against segfault when pointer
points to metadata.
* Make cf.exitcode = 0 by default.
commit
a6549ffda72b4f84bbd2c763640181eaeccf6582
Maxim Ostapenko [Mon, 19 Sep 2016 14:38:07 +0000 (17:38 +0300)]
Add temporal fix for https://github.com/google/sanitizers/issues/703.
Redefine SANITIZER_MMAP_RANGE_SIZE to (1UL << 40) for AArch64. This is a
workaround for https://github.com/google/sanitizers/issues/703 that speeds
up LSan and makes it usable for AArch64.
Change-Id: I31672b4feab6c91a2ec17fae76ab9d1d494aeb5c
Signed-off-by: Maxim Ostapenko <m.ostapenko@samsung.com>
Maxim Ostapenko [Thu, 24 Mar 2016 12:12:07 +0000 (15:12 +0300)]
Backport recovery mode related stuff from LLVM mainline.
Backport ASan reports deduplication in recovery mode.
Backport from LLVM upstream r255228.
Optionally print reproducer cmdline in ASan reports.
Backport from LLVM upstream r258037.
Fix internal CHECK failure on double free in recovery mode.
Backport from LLVM upstream r259473.
Bail out on stack overflow in ASan recovery mode.
Backport from LLVM upstream r268713.
Change-Id: I11ad0ddf94e803a0f240bf76cdff529e1b72f576
Signed-off-by: Maxim Ostapenko <m.ostapenko@samsung.com>
Dongkyun, Son [Thu, 2 Feb 2017 06:27:19 +0000 (15:27 +0900)]
packaging: explicitly added configure options
--enable-plugin (same as 4.9's)
--disable-libcc1 (new on 6.2's)
Change-Id: I005be6c5c888597cda64b0fe94b6d20399ef4c93
Signed-off-by: Dongkyun, Son <dongkyun.s@samsung.com>
Chan Lee [Thu, 19 Jan 2017 06:54:25 +0000 (15:54 +0900)]
packaging: remove plugin packages and files
Change-Id: I416cdc6e1bc6c687427a48796f1575a94f678f10
Signed-off-by: Chan Lee <chan45.lee@samsung.com>
Chan Lee [Thu, 19 Jan 2017 06:51:50 +0000 (15:51 +0900)]
packaging: disable lsan for arm and x86
Change-Id: I0ff97d8f50f386eabd49f8b5d1479f6645e52e90
Signed-off-by: Chan Lee <chan45.lee@samsung.com>
Dongkyun, Son [Wed, 11 Jan 2017 10:29:59 +0000 (19:29 +0900)]
packaging: add packaging
Change-Id: Icd5159e115d6827eaaff5ff59861d07438c29129
Signed-off-by: Dongkyun, Son <dongkyun.s@samsung.com>
Yvan Roux [Fri, 10 Feb 2017 13:33:22 +0000 (13:33 +0000)]
Make Linaro GCC Snapshot 6.3-2017.02.
gcc/
* LINARO-VERSION: Update.
Change-Id: Iacba5ee450e7d5173ae2ae0e1b60100281b09706
Yvan Roux [Mon, 6 Feb 2017 12:25:57 +0000 (13:25 +0100)]
Merge branches/gcc-6-branch rev 245201.
Change-Id: Ibc46d8742ef080683f302f5623b4907e9622ac4c
Christophe Lyon [Mon, 30 Jan 2017 10:21:03 +0000 (10:21 +0000)]
gcc/testsuite/
Backport from trunk r244891.
2016-01-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.dg/lto/pr54709_0.c: Require 'shared' effective target.
* gcc.dg/lto/pr61526_0.c: Likewise.
* gcc.dg/lto/pr64415_0.c: Likewise.
Change-Id: I5e933c61f5f661ec9dcbd04b9f04b28e5c4ec0fb
Christophe Lyon [Mon, 30 Jan 2017 10:21:39 +0000 (10:21 +0000)]
gcc/
Backport from trunk r244894.
2016-01-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/79145
* config/arm/arm.md (xordi3): Force constant operand into a register
for TARGET_IWMMXT.
gcc/testsuite/
Backport from trunk r244894.
2016-01-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/79145
* gcc.target/arm/pr79145.c: New test.
Change-Id: Ia1ee8c855c4324fc3226fbc04bd485911c2c6289
Christophe Lyon [Mon, 30 Jan 2017 10:20:34 +0000 (10:20 +0000)]
gcc/
Backport from trunk r244879.
2017-01-24 Eric Botcazou <ebotcazou@adacore.com>
PR target/77439
* config/arm/arm.c (arm_function_ok_for_sibcall): Add back restriction
for long calls with APCS frame and VFP.
gcc/testsuite/
Backport from trunk r244879.
2017-01-24 Eric Botcazou <ebotcazou@adacore.com>
* gcc.target/arm/vfp-longcall-apcs.c: New test.
Change-Id: I1663e7b52decbb7c5d9cb13c42136e10e44940b7
Christophe Lyon [Mon, 30 Jan 2017 10:19:18 +0000 (10:19 +0000)]
gcc/
Backport from trunk r244828.
2017-01-23 Andreas Tobler <andreast@gcc.gnu.org>
* config/aarch64/aarch64.c (aarch64_elf_asm_constructor): Increase
size of buf.
(aarch64_elf_asm_destructor): Likewise.
Change-Id: I22482fe29e558254616a97aeddd6b39c48718a85
Christophe Lyon [Tue, 24 Jan 2017 20:50:47 +0000 (20:50 +0000)]
gcc/testsuite/
Backport from trunk r244772.
2017-01-23 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (CHECK_POLY): New.
(CHECK_RESULTS_NAMED_NO_FP16): Call CHECK_POLY instead of CHECK
for poly*_t types.
* gcc.target/aarch64/advsimd-intrinsics/vcnt.c (FNNAME): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcombine.c (void
exec_vcombine): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcreate.c (FNNAME): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vget_high.c (void exec_vget_high): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vget_low.c (void exec_vget_low): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX.c (void exec_vldX): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c (void exec_vldX_dup): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c (void exec_vldX_lane): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vmul.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vmvn.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vqtbX.c (void exec_vqtbX): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrev.c (void exec_vrev): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vsXi_n.inc: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vsli_n.c (void vsli_extra): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vsri_n.c (void vsri_extra): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c (void exec_vstX_lane): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vtbX.c (void exec_vtbX): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c (int main):
Likewise.
(TEST_VGET_LANE): Cast to uint to avoid warning.
* gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc (void
FNNAME): Fix PRIx format for int16_t, int32_t, uint16_t, uint32_t.
* gcc.target/aarch64/advsimd-intrinsics/vfms_vfma_n.c (void
exec_vfma_vfms_n): Fix PRIx format for float64_t.
* gcc.target/aarch64/advsimd-intrinsics/vmovn.c (void exec_vmovn):
Fix PRIx format for int8_t, int16_t, uint8_t, uint16_t.
* gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c (void
exec_vmul_lane): Fix PRIx format for int16_t, uint16_t.
* gcc.target/aarch64/advsimd-intrinsics/vmul_n.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vmull.c (void exec_vmull):
Fix PRIx format for int16_t, int64_t, uint16_t, uint64_t. Call
CHECK_POLY instead of CHECK for poly64_t types.
* gcc.target/aarch64/advsimd-intrinsics/vmull_lane.c (void
exec_vmull_lane): Fix PRIx format for int64_t, uint64_t.
* gcc.target/aarch64/advsimd-intrinsics/vpXXX.inc:
Fix PRIx format for int8_t, int16_t, uint8_t, uint16_t.
* gcc.target/aarch64/advsimd-intrinsics/vqabs.c (void
vqabs_extra): Fix PRIx format for int16_t, int32_t, uint16_t,
uint32_t.
* gcc.target/aarch64/advsimd-intrinsics/vqdmull.c: Fix PRIx format
for int32_t, int64_t.
* gcc.target/aarch64/advsimd-intrinsics/vqneg.c (void
vqneg_extra): Fix PRIx format for int16_t, int32_t.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c
(TEST_VREINTERPRET_TO_POLY): New. (main): Call
TEST_VREINTERPRET_TO_POLY instead of TEST_VREINTERPRET where
needed.
Change-Id: I4e3d5d184b57c3d544daf384bebe1ca79a747cfe
Christophe Lyon [Tue, 24 Jan 2017 20:21:12 +0000 (20:21 +0000)]
gcc/
Backport from trunk r241965.
2016-11-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (arm_slowmul_tune): Use generic_extra_costs.
(arm_fastmul_tune): Likewise.
(arm_strongarm_tune): Likewise.
(arm_xscale_tune): Likewise.
(arm_9e_tune): Likewise.
(arm_marvell_pj4_tune): Likewise.
(arm_v6t2_tune): Likewise.
(arm_v6m_tune): Likewise.
(arm_fa726te_tune): Likewise.
gcc/
Backport from trunk r241966.
2016-11-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.opt (mold-rtx-costs): Delete.
(mnew-generic-costs): Delete.
* config/arm/arm-protos.h (struct tune_params): Delete rtx_costs field.
* config/arm/arm.c (arm_rtx_costs_1): Delete.
(arm_size_rtx_costs): Likewise.
(arm_slowmul_rtx_costs): Likewise.
(arm_fastmul_rtx_costs): Likewise.
(arm_xscale_rtx_costs): Likewise.
(arm_9e_rtx_costs): Likewise.
(arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune,
arm_xscale_tune, arm_9e_tune, arm_v6t2_tune, arm_cortex_tune,
arm_cortex_a8_tune, arm_cortex_a7_tune, arm_cortex_a15_tune,
arm_cortex_a53_tune, arm_cortex_a57_tune, arm_cortex_a9_tune,
arm_cortex_a12_tune, arm_v7m_tune, arm_v6m_tune, arm_fa726te_tune
arm_cortex_a5_tune, arm_xgene1_tune, arm_marvell_pj4_tune,
arm_cortex_a35_tune, arm_exynosm1_tune, arm_cortex_a73_tune,
arm_cortex_m7_tune):
Delete rtx_costs field.
(arm_new_rtx_costs): Rename to...
(arm_rtx_costs_internal): ... This.
(arm_rtx_costs): Remove old way of doing rtx costs.
Change-Id: I6d1dbef466bc74c932fe597f18b8ef6cbcfb4c1c
Christophe Lyon [Tue, 24 Jan 2017 20:49:45 +0000 (20:49 +0000)]
gcc/
Backport from trunk r244643.
2016-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_nopcrelative_literal_loads):
Delete.
* config/aarch64/aarch64.md
(aarch64_reload_movcp<GPF_TF:mode><P:mode>): Delete reference to
aarch64_nopcrelative_literal_loads.
(aarch64_reload_movcp<VALL:mode><P:mode>): Likewise.
Change-Id: I734b2d4ee36a58c79daee33a2d221799e6c1efe2
Christophe Lyon [Tue, 24 Jan 2017 20:50:22 +0000 (20:50 +0000)]
gcc/
Backport from trunk r244716.
2017-01-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/71270
* config/arm/arm.c (neon_valid_immediate): Reject vector constants
in big-endian mode when they are not a single duplicated value.
Change-Id: Ic4d9bfae5ac18f63895ad5d4206027ce7cbcccd6
Christophe Lyon [Tue, 24 Jan 2017 20:49:19 +0000 (20:49 +0000)]
gcc/
Backport from trunk r244613.
2017-01-19 Richard Earnshaw <rearnsha@arm.com>
PR rtl-optimization/79121
* expr.c (expand_expr_real_2, case LSHIFT_EXPR): Look at the signedness
of the inner type when shifting an extended value.
gcc/testsuite/
Backport from trunk r244613.
2017-01-19 Richard Earnshaw <rearnsha@arm.com>
PR rtl-optimization/79121
* gcc.c-torture/execute/pr79121.c: New test.
Change-Id: If91063c6b5f6a7ce9b0ba96c75c04e6cd7a56bb4
Christophe Lyon [Tue, 24 Jan 2017 20:44:41 +0000 (20:44 +0000)]
gcc/
Backport from trunk r243820.
2016-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/78694
* config/arm/arm.c (dump_minipool): Copy mp->value before emitting it
in the minipool to avoid invalid RTL sharing.
gcc/testsuite/
Backport from trunk r243820.
2016-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/78694
* gcc.c-torture/compile/pr78694.c: New test.
Change-Id: Id655a90d077824831e9b365e52e749957c78226b
Christophe Lyon [Tue, 24 Jan 2017 20:48:18 +0000 (20:48 +0000)]
gcc/
Backport from trunk r244586.
2017-01-18 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_sched_adjust_priority)
New function.
(TARGET_SCHED_ADJUST_PRIORITY): Define target hook.
Change-Id: Id6f8c329d97ca125353b04ab813a453097bf45c0
Christophe Lyon [Tue, 24 Jan 2017 20:44:04 +0000 (20:44 +0000)]
gcc/
Backport from trunk r243755.
2016-12-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.md: New define_split above insv<mode>.
gcc/testsuite/
Backport from trunk r243755.
2016-12-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/ubfx_lsr_1.c: New test.
gcc/
Backport from trunk r243756.
2016-12-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.md: New define_split above bswap<mode>2.
gcc/testsuite/
Backport from trunk r243756.
2016-12-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/ubfiz_lsl_1.c: New test.
Change-Id: Ic891f120d65097d78a92ce5133c25d0710cf7405
Christophe Lyon [Tue, 24 Jan 2017 20:42:56 +0000 (20:42 +0000)]
gcc/
Backport from trunk r243744.
2016-12-16 Wilco Dijkstra <wdijkstr@arm.com>
* config/arm/arm.c (thumb_core_reg_alloc_order): Swap R12 and R14.
Change-Id: I31f4f5221b9bcb265cb8e461bcb028ee9e98c92a
Christophe Lyon [Tue, 24 Jan 2017 20:43:30 +0000 (20:43 +0000)]
gcc/
Backport from trunk r243745.
2016-12-16 Wilco Dijkstra <wdijkstr@arm.com>
* config/arm/arm.md (subsi3_carryin): Add Thumb-2 RSC #0.
(arm_negdi2) Rename to negdi2_insn, allow on Thumb-2.
* config/arm/thumb2.md (thumb2_negdi2): Remove pattern.
Change-Id: I596cd552bba3152c81f96e3e9aa9c47195e09c9f
Christophe Lyon [Tue, 24 Jan 2017 20:40:20 +0000 (20:40 +0000)]
gcc/
Backport from trunk r243011.
2016-11-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/78362
* config/aarch64/aarch64.md (add<mode>3): Extract inner expression
from a subreg in operands[1] and don't call REGNO on a non-reg
expression when deciding to force operands[2] into a reg.
gcc/testsuite/
Backport from trunk r243011.
2016-11-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/78362
* gcc.c-torture/compile/pr78362.c: New test.
Change-Id: I7c910ef24d5731c4bf14fae312da071d716cf1fb
Christophe Lyon [Tue, 24 Jan 2017 20:39:22 +0000 (20:39 +0000)]
gcc/testsuite/
Backport from trunk r242821.
2016-11-23 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* gcc.target/aarch64/fmaxmin.c : Add -fno-vect-cost-model.
* gcc.target/aarch64/fmul_fcvt_2.c : Likewise.
* gcc.target/aarch64/vect-abs-compile.c : Likewise.
* gcc.target/aarch64/vect-clz.c : Likewise.
* gcc.target/aarch64/vect-fcm-eq-d.c : Likewise.
* gcc.target/aarch64/vect-fcm-ge-d.c : Likewise.
* gcc.target/aarch64/vect-fcm-gt-d.c : Likewise.
* gcc.target/aarch64/vect-fmovd-zero.c : Likewise.
* gcc.target/aarch64/vect-fmovd.c : Likewise.
* gcc.target/aarch64/vect-fmovf-zero.c : Likewise.
* gcc.target/aarch64/vect-fmovf.c : Likewise.
* gcc.target/aarch64/vect_ctz_1.c : Likewise.
gcc/testsuite/
Backport from trunk r242827.
2016-11-23 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* gcc.target/aarch64/ldp_stp_1.c : Add -mcpu=generic.
* gcc.target/aarch64/store-pair-1.c : Likewise.
Change-Id: I554995f86636a9d3f9828fa7ae05406b5230be2b
Christophe Lyon [Tue, 24 Jan 2017 20:25:42 +0000 (20:25 +0000)]
gcc/
Backport from trunk r242471.
2016-11-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/78364
* config/arm/arm.md (*extv_reg): Restrict operands 2 and 3 to the
proper ranges for an SBFX instruction.
(extzv_t2): Likewise for UBFX.
Change-Id: I94a24294a7de7cf1c02fd841f4b184206520542e
Christophe Lyon [Tue, 24 Jan 2017 20:24:50 +0000 (20:24 +0000)]
gcc/
Backport from trunk r242384.
2016-11-14 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.md (aarch64_ashl_sisd_or_int_<mode>3)
Use bfx attribute.
(aarch64_lshr_sisd_or_int_<mode>3): Likewise.
(aarch64_ashr_sisd_or_int_<mode>3): Likewise.
(<optab>si3_insn_uxtw): Likewise.
(<optab><mode>3_insn): Likewise.
(<ANY_EXTEND:optab><GPI:mode>_ashl<SHORT:mode>): Likewise.
(zero_extend<GPI:mode>_lshr<SHORT:mode>): Likewise.
(extend<GPI:mode>_ashr<SHORT:mode>): Likewise.
(<optab><mode>): Likewise.
(insv<mode>): Likewise.
(andim_ashift<mode>_bfiz): Likewise.
* config/aarch64/thunderx.md (thunderx_shift): Add bfx.
* config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.
* config/arm/cortex-a57.md (cortex_a57_alu): Add bfx.
* config/arm/exynos-m1.md (exynos_m1_alu): Add bfx.
(exynos_m1_alu_p): Likewise.
* config/arm/types.md: Add bfx.
* config/arm/xgene1.md (xgene1_bfm): Add bfx.
gcc/
Backport from trunk r242385.
2016-11-14 Wilco Dijkstra <wdijkstr@arm.com>
* config/arm/cortex-a57.md (cortex_a57_alu): Move extend here, bfm...
(cortex_a57_alu_shift): ...here.
Change-Id: Iae492f8d77e9dfecb62dcee384f4db2abfbba6ae
Christophe Lyon [Tue, 24 Jan 2017 20:23:20 +0000 (20:23 +0000)]
gcc/
Backport from trunk r242383.
2016-11-14 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (cortexa57_vector_cost):
Change vec_stmt_cost, vec_align_load_cost and vec_unalign_load_cost.
Change-Id: Ica758a72d803d572db08b6bd23ffed90d5b71ad4
Christophe Lyon [Tue, 24 Jan 2017 20:15:28 +0000 (20:15 +0000)]
libgcc/
Backport from trunk r238215.
2016-07-11 Hale Wang <hale.wang@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/arm/lib1funcs.S: Add new wrapper.
Change-Id: I46326f9f5e5db3bda9c87a514e8b987883d8fede
Christophe Lyon [Wed, 11 Jan 2017 17:01:17 +0000 (18:01 +0100)]
gcc/
Backport from trunk r244322.
2017-01-11 Wilco Dijkstra <wdijkstr@arm.com>
* config/arm/cortex-a53.md: Add bypasses for
cortex_a53_r2f_cvt.
(cortex_a53_r2f): Only use for transfers.
(cortex_a53_f2r): Likewise.
(cortex_a53_r2f_cvt): Add reservation for conversions.
(cortex_a53_f2r_cvt): Likewise.
Change-Id: I2ea61c2da9127d3c2367227ad74a1a3d4bf76ab6
Christophe Lyon [Wed, 11 Jan 2017 17:00:37 +0000 (18:00 +0100)]
gcc/
Backport from trunk r244321.
2017-01-11 Tamar Christina <tamar.christina@arm.com>
* config/arm/arm_neon.h: Add __artificial__ and gnu_inline
to all inlined functions, change static to extern.
Change-Id: I2da244ae2cc8b480e301a010e225781d1bf405b9
Christophe Lyon [Wed, 11 Jan 2017 22:14:47 +0000 (23:14 +0100)]
gcc/
Backport from trunk r244320.
2017-01-11 Christophe Lyon <christophe.lyon@linaro.org>
PR target/78253
* config/arm/arm.c (legitimize_pic_address): Handle reference to
weak symbol.
(arm_assemble_integer): Likewise.
Change-Id: I477d2f99ddb334594188c53dd06d13591f941b97
Yvan Roux [Wed, 11 Jan 2017 17:08:17 +0000 (18:08 +0100)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.
Change-Id: If36dadaddae3ffcb1e7928f3c46161d793ef9303
Yvan Roux [Wed, 11 Jan 2017 15:42:06 +0000 (16:42 +0100)]
Make Linaro GCC Snapshot 6.3-2017.01.
gcc/
* LINARO-VERSION: Update.
Change-Id: Ib9f8d4c91a8652966f82c8f72f0430706dd2d498
Christophe Lyon [Tue, 10 Jan 2017 15:05:34 +0000 (16:05 +0100)]
gcc/
Backport from trunk r240504.
2016-09-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
* tree.h (memmodel_from_int, memmodel_base, is_mm_relaxed,
is_mm_consume, is_mm_acquire, is_mm_release, is_mm_acq_rel,
is_mm_seq_cst, is_mm_sync): Move to ...
* memmodel.h: This. New file.
* builtins.c: Include memmodel.h.
* optabs.c: Likewise.
* tsan.c: Likewise.
* config/aarch64/aarch64.c: Likewise.
* config/alpha/alpha.c: Likewise.
* config/arm/arm.c: Likewise.
* config/i386/i386.c: Likewise.
* config/ia64/ia64.c: Likewise.
* config/mips/mips.c: Likewise.
* config/rs6000/rs6000.c: Likewise.
* config/sparc/sparc.c: Likewise.
* genconditions.c: Include memmodel.h in generated file.
* genemit.c: Likewise.
* genoutput.c: Likewise.
* genpeep.c: Likewise.
* genpreds.c: Likewise.
* genrecog.c: Likewise.
gcc/c-family/
Backport from trunk r240504.
2016-09-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
* c-common.c: Include memmodel.h.
gcc/
Backport from trunk r241507.
2016-10-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/constraints.md (Q constraint): Document its use for
Thumb-1.
(Pf constraint): New constraint for relaxed, consume or relaxed memory
models.
* config/arm/sync.md (atomic_load<mode>): Add new ARMv8-M Baseline only
alternatives to allow any register when memory model matches Pf and
thus lda is used, but only low registers otherwise. Use unpredicated
output template for Thumb-1 targets.
(atomic_store<mode>): Likewise for stl.
(arm_load_exclusive<mode>): Add new ARMv8-M Baseline only alternative
whose output template does not have predication.
(arm_load_acquire_exclusive<mode>): Likewise.
(arm_load_exclusivesi): Likewise.
(arm_load_acquire_exclusivesi): Likewise.
(arm_store_release_exclusive<mode>): Likewise.
(arm_store_exclusive<mode>): Use unpredicated output template for
Thumb-1 targets.
gcc/
Backport from trunk r241577.
2016-10-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_expand_compare_and_swap): Add new bdst local
variable. Add the new parameter to the insn generator. Set that
parameter to be CC flag for 32-bit targets, bval otherwise. Set the
return value from the negation of that parameter for Thumb-1, keeping
the logic unchanged otherwise except for using bdst as the destination
register of the compare_and_swap insn.
(arm_split_compare_and_swap): Add explanation about how is the value
returned to the function comment. Rename scratch variable to
neg_bval. Adapt initialization of variables holding operands to the
new operand numbers. Use return register to hold result of store
exclusive for Thumb-1, scratch register otherwise. Construct the
appropriate cbranch for Thumb-1 targets, keeping the logic unchanged
for 32-bit targets. Guard Z flag setting to restrict to 32bit targets.
Use gen_cbranchsi4 rather than hand-written conditional branch to loop
for strongly ordered compare_and_swap.
* config/arm/predicates.md (cc_register_operand): New predicate.
* config/arm/sync.md (atomic_compare_and_swap<mode>_1): Use a
match_operand with the new predicate to accept either the CC flag or a
destination register for the boolean return value, restricting it to
CC flag only via constraint. Adapt operand numbers accordingly.
gcc/
Backport from trunk r241578.
2016-10-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/sync.md (atomic_compare_and_swap<mode>_1): Add new ARMv8-M
Baseline only alternatives to (i) hold store atomic success value in a
return register rather than a scratch register, (ii) use a low register
for it and to (iii) ensure the cbranchsi insn generated by the split
respect the constraints of Thumb-1 cbranchsi4_insn and
cbranchsi4_scratch.
* config/arm/thumb1.md (cbranchsi4_insn): Add comment to indicate
constraints must match those in atomic_compare_and_swap.
(cbranchsi4_scratch): Likewise.
gcc/
Backport from trunk r241614.
2016-10-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_split_atomic_op): Add function comment. Add
logic to to decide whether to copy over old value to register for new
value.
* config/arm/sync.md: Add comments explaning why mode and code
attribute are not defined in iterators.md
(thumb1_atomic_op_str): New code attribute.
(thumb1_atomic_newop_str): Likewise.
(thumb1_atomic_fetch_op_str): Likewise.
(thumb1_atomic_fetch_newop_str): Likewise.
(thumb1_atomic_fetch_oldop_str): Likewise.
(atomic_exchange<mode>): Add new ARMv8-M Baseline only alternatives to
mirror the more restrictive constraints of the Thumb-1 insns after
split compared to Thumb-2 counterpart insns.
(atomic_<sync_optab><mode>): Likewise. Add comment to keep constraints
in sync with non atomic version.
(atomic_nand<mode>): Likewise.
(atomic_fetch_<sync_optab><mode>): Likewise.
(atomic_fetch_nand<mode>): Likewise.
(atomic_<sync_optab>_fetch<mode>): Likewise.
(atomic_nand_fetch<mode>): Likewise.
* config/arm/thumb1.md (thumb1_addsi3): Add comment to keep contraint
in sync with atomic version.
(thumb1_subsi3_insn): Likewise.
(thumb1_andsi3_insn): Likewise.
(thumb1_iorsi3_insn): Likewise.
(thumb1_xorsi3_insn): Likewise.
gcc/
Backport from trunk r241615.
2016-10-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.h (TARGET_HAVE_LDREX): Define for ARMv8-M Baseline.
(TARGET_HAVE_LDREXBH): Likewise.
(TARGET_HAVE_LDACQ): Likewise.
gcc/testsuite/
Backport from trunk r241615.
2016-10-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/atomic-comp-swap-release-acquire-3.c: New test.
* gcc.target/arm/atomic-op-acq_rel-3.c: Likewise.
* gcc.target/arm/atomic-op-acquire-3.c: Likewise.
* gcc.target/arm/atomic-op-char-3.c: Likewise.
* gcc.target/arm/atomic-op-consume-3.c: Likewise.
* gcc.target/arm/atomic-op-int-3.c: Likewise.
* gcc.target/arm/atomic-op-relaxed-3.c: Likewise.
* gcc.target/arm/atomic-op-release-3.c: Likewise.
* gcc.target/arm/atomic-op-seq_cst-3.c: Likewise.
* gcc.target/arm/atomic-op-short-3.c: Likewise.
gcc/
Backport from trunk r241848.
2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-arches.def (armv8-m.base): Set Cortex-M23 as
representative core for this architecture.
* config/arm/arm-cores.def (cortex-m23): Define new processor.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* config/arm/arm.c (arm_v6m_tune): Add Cortex-M23 to the list of cores
this tuning parameters apply to in the comment.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add Cortex-M23 to the list of
valid -mcpu options.
* doc/invoke.texi (ARM Options): Document new Cortex-M23 processor.
gcc/
Backport from trunk r241849.
2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-arches.def (armv8-m.main+dsp): Set Cortex-M33 as
representative core for this architecture.
* config/arm/arm-cores.def (cortex-m33): Define new processor.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add Cortex-M33 to the list of
valid -mcpu options.
* doc/invoke.texi (ARM Options): Document new Cortex-M33 processor.
gcc/
Backport from trunk r242596.
2016-11-18 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-protos.h (FL_NONE, FL_ANY, FL_CO_PROC, FL_ARCH3M,
FL_MODE26, FL_MODE32, FL_ARCH4, FL_ARCH5, FL_THUMB, FL_LDSCHED,
FL_STRONG, FL_ARCH5E, FL_XSCALE, FL_ARCH6, FL_VFPV2, FL_WBUF,
FL_ARCH6K, FL_THUMB2, FL_NOTM, FL_THUMB_DIV, FL_VFPV3, FL_NEON,
FL_ARCH7EM, FL_ARCH7, FL_ARM_DIV, FL_ARCH8, FL_CRC32, FL_SMALLMUL,
FL_NO_VOLATILE_CE, FL_IWMMXT, FL_IWMMXT2, FL_ARCH6KZ, FL2_ARCH8_1,
FL2_ARCH8_2, FL2_FP16INST): Reindent comment, add final dot when
missing and make value unsigned.
(arm_feature_set): Use unsigned entries instead of unsigned long.
gcc/
Backport from trunk r242597.
2016-11-18 Terry Guo <terry.guo@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* common/config/arm/arm-common.c (arm_target_thumb_only): New function.
* config/arm/arm-opts.h: Include arm-flags.h.
(struct arm_arch_core_flag): Define.
(arm_arch_core_flags): Define.
* config/arm/arm-protos.h: Include arm-flags.h
(FL_NONE, FL_ANY, FL_CO_PROC, FL_ARCH3M, FL_MODE26, FL_MODE32,
FL_ARCH4, FL_ARCH5, FL_THUMB, FL_LDSCHED, FL_STRONG, FL_ARCH5E,
FL_XSCALE, FL_ARCH6, FL_VFPV2, FL_WBUF, FL_ARCH6K, FL_THUMB2, FL_NOTM,
FL_THUMB_DIV, FL_VFPV3, FL_NEON, FL_ARCH7EM, FL_ARCH7, FL_ARM_DIV,
FL_ARCH8, FL_CRC32, FL_SMALLMUL, FL_NO_VOLATILE_CE, FL_IWMMXT,
FL_IWMMXT2, FL_ARCH6KZ, FL2_ARCH8_1, FL2_ARCH8_2, FL2_FP16INST,
FL_TUNE, FL_FOR_ARCH2, FL_FOR_ARCH3, FL_FOR_ARCH3M, FL_FOR_ARCH4,
FL_FOR_ARCH4T, FL_FOR_ARCH5, FL_FOR_ARCH5T, FL_FOR_ARCH5E,
FL_FOR_ARCH5TE, FL_FOR_ARCH5TEJ, FL_FOR_ARCH6, FL_FOR_ARCH6J,
FL_FOR_ARCH6K, FL_FOR_ARCH6Z, FL_FOR_ARCH6ZK, FL_FOR_ARCH6KZ,
FL_FOR_ARCH6T2, FL_FOR_ARCH6M, FL_FOR_ARCH7, FL_FOR_ARCH7A,
FL_FOR_ARCH7VE, FL_FOR_ARCH7R, FL_FOR_ARCH7M, FL_FOR_ARCH7EM,
FL_FOR_ARCH8A, FL2_FOR_ARCH8_1A, FL2_FOR_ARCH8_2A, FL_FOR_ARCH8M_BASE,
FL_FOR_ARCH8M_MAIN, arm_feature_set, ARM_FSET_MAKE,
ARM_FSET_MAKE_CPU1, ARM_FSET_MAKE_CPU2, ARM_FSET_CPU1, ARM_FSET_CPU2,
ARM_FSET_EMPTY, ARM_FSET_ANY, ARM_FSET_HAS_CPU1, ARM_FSET_HAS_CPU2,
ARM_FSET_HAS_CPU, ARM_FSET_ADD_CPU1, ARM_FSET_ADD_CPU2,
ARM_FSET_DEL_CPU1, ARM_FSET_DEL_CPU2, ARM_FSET_UNION, ARM_FSET_INTER,
ARM_FSET_XOR, ARM_FSET_EXCLUDE, ARM_FSET_IS_EMPTY,
ARM_FSET_CPU_SUBSET): Move to ...
* config/arm/arm-flags.h: This new file.
* config/arm/arm.h (TARGET_MODE_SPEC_FUNCTIONS): Define.
(EXTRA_SPEC_FUNCTIONS): Add TARGET_MODE_SPEC_FUNCTIONS to its value.
(TARGET_MODE_SPECS): Define.
(DRIVER_SELF_SPECS): Add TARGET_MODE_SPECS to its value.
gcc/testsuite/
Backport from trunk r242597.
2016-11-18 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/optional_thumb-1.c: New test.
* gcc.target/arm/optional_thumb-2.c: New test.
* gcc.target/arm/optional_thumb-3.c: New test.
gcc/
Backport from trunk r242696.
2016-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config.gcc: Allow new rmprofile value for configure option
--with-multilib-list.
* config/arm/t-rmprofile: New file.
* doc/install.texi (--with-multilib-list): Document new rmprofile value
for ARM.
gcc/testsuite/
Backport from trunk r243013.
2016-11-30 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp (add_options_for_arm_arch_v6m): Add
-mfloat-abi=soft option.
(add_options_for_arm_arch_v8m_base): Likewise. Reindent containing
foreach loop.
gcc/
Backport from trunk r243015.
2016-11-30 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/t-rmprofile: Add mappings for Cortex-M23 and Cortex-M33.
gcc/
Backport from trunk r243187.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config.gcc (extra_headers): Added arm_cmse.h.
* config/arm/arm-arches.def (ARM_ARCH):
(armv8-m): Add FL2_CMSE.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-c.c
(arm_cpu_builtins): Added __ARM_FEATURE_CMSE macro.
* config/arm/arm-flags.h: Define FL2_CMSE.
* config/arm.c (arm_arch_cmse): New.
(arm_option_override): New error for unsupported cmse target.
* config/arm/arm.h (arm_arch_cmse): New.
* config/arm/arm.opt (mcmse): New.
* config/arm/arm_cmse.h: New file.
* doc/invoke.texi (ARM Options): Add -mcmse.
* doc/sourcebuild.texi (arm_cmse_ok): Add new effective target.
* doc/extend.texi: Add ARMv8-M Security Extensions entry.
gcc/testsuite/
Backport from trunk r243187.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse.exp: New.
* gcc.target/arm/cmse/cmse-1.c: New.
* gcc.target/arm/cmse/cmse-12.c: New.
* lib/target-supports.exp
(check_effective_target_arm_cmse_ok): New.
libgcc/
Backport from trunk r243187.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/t-arm (HAVE_CMSE): New.
* config/arm/cmse.c: New.
gcc/
Backport from trunk r243188.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_handle_cmse_nonsecure_entry): New.
(arm_attribute_table): Added cmse_nonsecure_entry
(arm_compute_func_type): Handle cmse_nonsecure_entry.
(cmse_func_args_or_return_in_stack): New.
(arm_handle_cmse_nonsecure_entry): New.
* config/arm/arm.h (ARM_FT_CMSE_ENTRY): New macro define.
(IS_CMSE_ENTRY): Likewise.
* doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute.
gcc/testsuite/
Backport from trunk r243188.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-3.c: New.
gcc/
Backport from trunk r243189.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (use_return_insn): Change to return with bxns
when cmse_nonsecure_entry.
(output_return_instruction): Likewise.
(arm_output_function_prologue): Likewise.
(thumb_pop): Likewise.
(thumb_exit): Likewise.
(thumb2_expand_return): Assert that entry functions always have simple
returns.
(arm_expand_epilogue): Handle entry functions.
(arm_function_ok_for_sibcall): Disable sibcall for entry functions.
(arm_asm_declare_function_name): New.
* config/arm/arm-protos.h (arm_asm_declare_function_name): New.
* config/arm/elf.h (ASM_DECLARE_FUNCTION_NAME): Redefine to
use arm_asm_declare_function_name.
gcc/testsuite/
Backport from trunk r243189.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-4.c: New.
* gcc.target/arm/cmse/cmse-9.c: New.
* gcc.target/arm/cmse/cmse-10.c: New.
gcc/
Backport from trunk r243190.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (output_return_instruction): Clear
registers.
(thumb2_expand_return): Likewise.
(thumb1_expand_epilogue): Likewise.
(thumb_exit): Likewise.
(arm_expand_epilogue): Likewise.
(cmse_nonsecure_entry_clear_before_return): New.
(comp_not_to_clear_mask_str_un): New.
(compute_not_to_clear_mask): New.
* config/arm/thumb1.md (*epilogue_insns): Change length attribute.
* config/arm/thumb2.md (*thumb2_return): Disable for
cmse_nonsecure_entry functions.
(*thumb2_cmse_entry_return): Duplicate thumb2_return pattern for
cmse_nonsecure_entry functions.
gcc/testsuite/
Backport from trunk r243190.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse.exp: Test different multilibs separate.
* gcc.target/arm/cmse/struct-1.c: New.
* gcc.target/arm/cmse/bitfield-1.c: New.
* gcc.target/arm/cmse/bitfield-2.c: New.
* gcc.target/arm/cmse/bitfield-3.c: New.
* gcc.target/arm/cmse/baseline/cmse-2.c: New.
* gcc.target/arm/cmse/baseline/softfp.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-5.c: New.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: New.
gcc/
Backport from trunk r243191.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (gimplify.h): New include.
(arm_handle_cmse_nonsecure_call): New.
(arm_attribute_table): Added cmse_nonsecure_call.
(arm_comp_type_attributes): Deny compatibility of function types
with without the cmse_nonsecure_call attribute.
* doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute.
gcc/testsuite/
Backport from trunk r243191.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-3.c: Add tests.
* gcc.target/arm/cmse/cmse-4.c: Add tests.
* gcc.target/arm/cmse/cmse-15.c: New.
gcc/
Backport from trunk r243192.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (detect_cmse_nonsecure_call): New.
(cmse_nonsecure_call_clear_caller_saved): New.
(arm_reorg): Use cmse_nonsecure_call_clear_caller_saved.
(arm_function_ok_for_sibcall): Disable sibcalls for
cmse_nonsecure_call.
* config/arm/arm-protos.h (detect_cmse_nonsecure_call): New.
* config/arm/arm.md (call): Handle cmse_nonsecure_entry.
(call_value): Likewise.
(nonsecure_call_internal): New.
(nonsecure_call_value_internal): New.
* config/arm/thumb1.md (*nonsecure_call_reg_thumb1_v5): New.
(*nonsecure_call_value_reg_thumb1_v5): New.
* config/arm/thumb2.md (*nonsecure_call_reg_thumb2): New.
(*nonsecure_call_value_reg_thumb2): New.
* config/arm/unspecs.md (UNSPEC_NONSECURE_MEM): New.
gcc/testsuite/
Backport from trunk r243192.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse.exp: Run tests in mainline dir.
* gcc.target/arm/cmse/cmse-9.c: Added some extra tests.
* gcc.target/arm/cmse/cmse-14.c: New.
* gcc.target/arm/cmse/baseline/bitfield-4.c: New.
* gcc.target/arm/cmse/baseline/bitfield-5.c: New.
* gcc.target/arm/cmse/baseline/bitfield-6.c: New.
* gcc.target/arm/cmse/baseline/bitfield-7.c: New.
* gcc.target/arm/cmse/baseline/bitfield-8.c: New.
* gcc.target/arm/cmse/baseline/bitfield-9.c: New.
* gcc.target/arm/cmse/baseline/bitfield-and-union-1.c: New.
* gcc.target/arm/cmse/baseline/cmse-11.c: New.
* gcc.target/arm/cmse/baseline/cmse-13.c: New.
* gcc.target/arm/cmse/baseline/cmse-6.c: New.
* gcc.target/arm/cmse/baseline/union-1.c: New.
* gcc.target/arm/cmse/baseline/union-2.c: New.
* gcc.target/arm/cmse/mainline/bitfield-4.c: New.
* gcc.target/arm/cmse/mainline/bitfield-5.c: New.
* gcc.target/arm/cmse/mainline/bitfield-6.c: New.
* gcc.target/arm/cmse/mainline/bitfield-7.c: New.
* gcc.target/arm/cmse/mainline/bitfield-8.c: New.
* gcc.target/arm/cmse/mainline/bitfield-9.c: New.
* gcc.target/arm/cmse/mainline/bitfield-and-union-1.c: New.
* gcc.target/arm/cmse/mainline/union-1.c: New.
* gcc.target/arm/cmse/mainline/union-2.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/hard/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/soft/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-13.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-7.c: New.
* gcc.target/arm/cmse/mainline/softfp/cmse-8.c: New.
libgcc/
Backport from trunk r243192.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/cmse_nonsecure_call.S: New.
* config/arm/t-arm: Compile cmse_nonsecure_call.S
gcc/
Backport from trunk r243193.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-builtins.c (arm_builtins): Define
ARM_BUILTIN_CMSE_NONSECURE_CALLER.
(bdesc_2arg): Add line for cmse_nonsecure_caller.
(arm_init_builtins): Handle cmse_nonsecure_caller.
(arm_expand_builtin): Likewise.
* config/arm/arm_cmse.h (cmse_nonsecure_caller): New.
gcc/testsuite/
Backport from trunk r243193.
2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-1.c: Add test for
cmse_nonsecure_caller.
gcc/
Backport from trunk r243216.
2016-12-01 Jeff Law <law@redhat.com>
* config/arm/arm.c (arm_handle_cmse_nonsecure_call): Remove unused
variable main_variant.
Change-Id: Ibe821b25c811c214c51d5cbaceb4ea960c619633
Christophe Lyon [Tue, 10 Jan 2017 15:38:47 +0000 (16:38 +0100)]
gcc/testsuite/
Backport from trunk r243973.
2016-12-29 Andrew Pinski <apinski@cavium.com>
* gcc.dg/atomic/c11-atomic-exec-5.c: Lower ITER_COUNT to 100
for AARCH64.
Change-Id: I78595ce9d2187fe883987a304cd277d98842c54b
Christophe Lyon [Tue, 10 Jan 2017 09:41:10 +0000 (10:41 +0100)]
gcc/
Backport from trunk r240117.
2016-09-13 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64-builtins.c
(aarch64_init_simd_builtins): Fix builtin type signature printing.
gcc/
Backport from trunk r242914.
2016-11-28 Tamar Christina <tamar.christina@arm.com>
* config/arm/arm_neon.h (vget_lane_p64): New.
gcc/
Backport from trunk r242915.
2016-11-28 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64-builtins.c (TYPES_SETREGP): Added poly type.
(TYPES_GETREGP): Likewise.
(TYPES_SHIFTINSERTP): Likewise.
(TYPES_COMBINEP): Likewise.
(TYPES_STORE1P): Likewise.
* config/aarch64/aarch64-simd-builtins.def
(combine): Added poly generator.
(get_dregoi): Likewise.
(get_dregci): Likewise.
(get_dregxi): Likewise.
(ssli_n): Likewise.
(ld1): Likewise.
(st1): Likewise.
* config/aarch64/arm_neon.h
(poly64x1x2_t, poly64x1x3_t): New.
(poly64x1x4_t, poly64x2x2_t): Likewise.
(poly64x2x3_t, poly64x2x4_t): Likewise.
(poly64x1_t): Likewise.
(vcreate_p64, vcombine_p64): Likewise.
(vdup_n_p64, vdupq_n_p64): Likewise.
(vld2_p64, vld2q_p64): Likewise.
(vld3_p64, vld3q_p64): Likewise.
(vld4_p64, vld4q_p64): Likewise.
(vld2_dup_p64, vld3_dup_p64): Likewise.
(vld4_dup_p64, vsli_n_p64): Likewise.
(vsliq_n_p64, vst1_p64): Likewise.
(vst1q_p64, vst2_p64): Likewise.
(vst3_p64, vst4_p64): Likewise.
(__aarch64_vdup_lane_p64, __aarch64_vdup_laneq_p64): Likewise.
(__aarch64_vdupq_lane_p64, __aarch64_vdupq_laneq_p64): Likewise.
(vget_lane_p64, vgetq_lane_p64): Likewise.
(vreinterpret_p8_p64, vreinterpretq_p8_p64): Likewise.
(vreinterpret_p16_p64, vreinterpretq_p16_p64): Likewise.
(vreinterpret_p64_f16, vreinterpret_p64_f64): Likewise.
(vreinterpret_p64_s8, vreinterpret_p64_s16): Likewise.
(vreinterpret_p64_s32, vreinterpret_p64_s64): Likewise.
(vreinterpret_p64_f32, vreinterpret_p64_u8): Likewise.
(vreinterpret_p64_u16, vreinterpret_p64_u32): Likewise.
(vreinterpret_p64_u64, vreinterpret_p64_p8): Likewise.
(vreinterpretq_p64_f64, vreinterpretq_p64_s8): Likewise.
(vreinterpretq_p64_s16, vreinterpretq_p64_s32): Likewise.
(vreinterpretq_p64_s64, vreinterpretq_p64_f16): Likewise.
(vreinterpretq_p64_f32, vreinterpretq_p64_u8): Likewise.
(vreinterpretq_p64_u16, vreinterpretq_p64_u32): Likewise.
(vreinterpretq_p64_u64, vreinterpretq_p64_p8): Likewise.
(vreinterpret_f16_p64, vreinterpretq_f16_p64): Likewise.
(vreinterpret_f32_p64, vreinterpretq_f32_p64): Likewise.
(vreinterpret_f64_p64, vreinterpretq_f64_p64): Likewise.
(vreinterpret_s64_p64, vreinterpretq_s64_p64): Likewise.
(vreinterpret_u64_p64, vreinterpretq_u64_p64): Likewise.
(vreinterpret_s8_p64, vreinterpretq_s8_p64): Likewise.
(vreinterpret_s16_p64, vreinterpret_s32_p64): Likewise.
(vreinterpretq_s32_p64, vreinterpret_u8_p64): Likewise.
(vreinterpret_u16_p64, vreinterpretq_u16_p64): Likewise.
(vreinterpret_u32_p64, vreinterpretq_u32_p64): Likewise.
(vset_lane_p64, vsetq_lane_p64): Likewise.
(vget_low_p64, vget_high_p64): Likewise.
(vcombine_p64, vst2_lane_p64): Likewise.
(vst3_lane_p64, vst4_lane_p64): Likewise.
(vst2q_lane_p64, vst3q_lane_p64): Likewise.
(vst4q_lane_p64, vget_lane_p64): Likewise.
(vget_laneq_p64, vset_lane_p64): Likewise.
(vset_laneq_p64, vcopy_lane_p64): Likewise.
(vcopy_laneq_p64, vdup_n_p64): Likewise.
(vdupq_n_p64, vdup_lane_p64): Likewise.
(vdup_laneq_p64, vld1_p64): Likewise.
(vld1q_p64, vld1_dup_p64): Likewise.
(vld1q_dup_p64, vld1q_dup_p64): Likewise.
(vmov_n_p64, vmovq_n_p64): Likewise.
(vst3q_p64, vst4q_p64): Likewise.
(vld1_lane_p64, vld1q_lane_p64): Likewise.
(vst1_lane_p64, vst1q_lane_p64): Likewise.
(vcopy_laneq_p64, vcopyq_laneq_p64): Likewise.
(vdupq_laneq_p64): Likewise.
gcc/
Backport from trunk r242916.
2016-11-28 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64-simd-builtins.def
(BSL_P): Added di and v2di mode.
* config/aarch64/arm_neon.h
(vsriq_n_p64, vsri_n_p64): Added poly type.
(vextq_p64, vext_p64): Likewise.
(vceq_p64, vbslq_p64, vbsl_p64): Likewise.
gcc/testsuite/
Backport from trunk r242962.
2016-11-29 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(AARCH64_ONLY, CHECK_CRYPTO): New macros.
(Poly64x1_t, Poly64x2_t): Added types.
* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c
(vmov_n_p64, vmovq_n_p64): Added.
(vld2_lane_p64, vld2q_lane_p64): Likewise.
(vld3_lane_p64, vld3q_lane_p64): Likewise.
(vld4_lane_p64, vld4q_lane_p64): Likewise.
(vst2_lane_p64, vst2q_lane_p64): Likewise.
(vst3_lane_p64, vst3q_lane_p64): Likewise.
(vst4_lane_p64, vst4q_lane_p64): Likewise.
(vget_lane_p64, vgetq_lane_p64): Likewise.
(vget_high_p64): Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c:
Added AArch64 flags.
(vreint_vector, vreint_vector_res): Moved to header.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c:
Added Aarch64 flags.
(vreint_vector, vreint_vector_res): Moved to header.
gcc/
Backport from trunk r243287.
2016-12-06 Tamar Christina <tamar.christina@arm.com>
* gcc/config/aarch64/arm_neon.h
(vreinterpretq_p8_p128, vreinterpretq_p16_p128): Added.
(vreinterpret_p64_p16, vreinterpretq_p64_p128): Likewise.
(vreinterpretq_p64_p16, vreinterpretq_p128_p8): Likewise.
(vreinterpretq_p128_p16, vreinterpretq_p128_f16): Likewise.
(vreinterpretq_p128_f32, vreinterpretq_p128_p64): Likewise.
(vreinterpretq_p128_s64, vreinterpretq_p128_u64): Likewise.
(vreinterpretq_p128_s8, vreinterpretq_p128_s16): Likewise.
(vreinterpretq_p128_s32, vreinterpretq_p128_u8): Likewise.
(vreinterpretq_p128_u16, vreinterpretq_p128_u32): Likewise.
(vreinterpretq_f16_p128, vreinterpretq_f32_p128): Likewise.
(vreinterpretq_s64_p128, vreinterpretq_u64_p128): Likewise.
(vreinterpretq_s8_p128, vreinterpretq_s16_p128): Likewise.
(vreinterpretq_s32_p128, vreinterpretq_u8_p128): Likewise.
(vreinterpretq_u16_p128, vreinterpretq_u32_p128): Likewise.
gcc/testsuite/
Backport from trunk r243430.
2016-12-08 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(CHECK_CRYPTO): Remove.
(expected_poly64x1_t, expected_poly64x2_t): Remove
Change-Id: Id2d62aace7d11db1bcd66d239aa5f6c3cdf25a55
Christophe Lyon [Tue, 10 Jan 2017 14:13:12 +0000 (15:13 +0100)]
gcc/
Backport from trunk r242869.
2016-11-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
PR tree-optimization/77673
* tree-ssa-math-opts.c (struct symbolic_number): Add new src field.
(init_symbolic_number): Initialize src field from src parameter.
(perform_symbolic_merge): Select most dominated statement as the
source statement. Set src field of resulting n structure from the
input src with the lowest address.
(find_bswap_or_nop): Rename source_stmt into ins_stmt.
(bswap_replace): Rename src_stmt into ins_stmt. Initially get source
of load from src field rather than insertion statement. Cancel
optimization if statement analyzed is not dominated by the insertion
statement.
(pass_optimize_bswap::execute): Rename src_stmt to ins_stmt. Compute
dominance information.
gcc/testsuite/
Backport from trunk r242869.
2016-11-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
PR tree-optimization/77673
* gcc.dg/pr77673.c: New test.
gcc/
Backport from trunk r242870.
2016-11-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* tree-ssa-math-opts.c (struct symbolic_number): Improve comment.
Change-Id: I79c6f848a9b7d80130b151cb62c4f2f0c672053b
Yvan Roux [Mon, 9 Jan 2017 20:09:13 +0000 (21:09 +0100)]
Merge branches/gcc-6-branch rev 244220.
Change-Id: I9f2d907c75595859355f909019b9109011440154
Yvan Roux [Wed, 14 Dec 2016 15:11:17 +0000 (16:11 +0100)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.
Change-Id: Id430e1b5a65024a895839e11db0662d0d90af206
Yvan Roux [Wed, 14 Dec 2016 13:47:07 +0000 (14:47 +0100)]
Make Linaro GCC Snapshot 6.2-2016.12.
gcc/
* LINARO-VERSION: Update.
Change-Id: Ic2b94e93d8261afe8017ada35d36f7c780298a7c
Yvan Roux [Tue, 13 Dec 2016 15:40:03 +0000 (16:40 +0100)]
Merge branches/gcc-6-branch rev 243594.
Change-Id: I681a233c1e96ce184d241bab38b61cd8ac8f08a8
Yvan Roux [Fri, 9 Dec 2016 11:54:22 +0000 (12:54 +0100)]
./
Backport from trunk r240949.
2016-10-10 Andreas Tobler <andreast@gcc.gnu.org>
* configure.ac: Add aarch64-*-freebsd*.
* configure: Regenerate.
gcc/
Backport from trunk r240949.
2016-10-10 Andreas Tobler <andreast@gcc.gnu.org>
* config.gcc: Add aarch64-*-freebsd* support.
* config.host: Likewise.
* config/aarch64/aarch64-freebsd.h: New file.
* config/aarch64/t-aarch64-freebsd: Ditto.
libgcc/
Backport from trunk r240949.
2016-10-10 Andreas Tobler <andreast@gcc.gnu.org>
* config.host: Add support for aarch64-*-freebsd*.
Change-Id: I7d3ce4b84d08de4f71d5e3e5076a66b462df1bf9
Yvan Roux [Fri, 9 Dec 2016 12:02:02 +0000 (13:02 +0100)]
gcc/
Backport from trunk r241791.
2016-11-26 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64-simd.md (aarch64_crypto_sha1hv4si):
New pattern.
(aarch64_be_crypto_sha1hv4si): New pattern.
Change-Id: Icf45bee1114d9ac5097ac38477ae1fb7a1b470e1
Yvan Roux [Fri, 9 Dec 2016 11:55:15 +0000 (12:55 +0100)]
gcc/
Backport from trunk r241116, 241119.
2016-10-13 Richard Earnshaw <rearnsha@arm.com>
* arm.h (TARGET_VFP): Unconditionally define to 1.
(arm_fpu_desc): Remove 'model' field.
(TARGET_FPU_MODEL): Delete.
* arm.c (all_fpus): Don't initialize the model field.
(arm_can_inline_p): Don't check the FPU model.
* arm-fpus.def: Remove redundant model field from all FPU
descriptions.
gcc/
Backport from trunk r241118, 241119.
2016-10-13 Richard Earnshaw <rearnsha@arm.com>
* arm.h (TARGET_VFP): Delete.
(TARGET_VFPD32): Remove references to TARGET_VFP.
(TARGET_VFP3, TARGET_VFP5): Likewise.
(TARGET_VFP_SINGLE, TARGET_VFP_DOUBLE): Likewise.
(TARGET_NEON_FP16): Likewise.
(TARGET_FMA): Likewise.
(TARGET_CRYPTO): Likewise.
(TARGET_NEON): Likewise.
(SECONDARY_OUTPUT_RELOAD_CLASS): Likewise.
(FUNCTION_ARG_REGNO_P): Likewise.
* arm.c (arm_option_check_internal): Likewise.
(arm_option_override): Likewise.
(use_return_insn): Likewise.
(arm_function_value_regno_p): Likewise.
(arm_apply_result_size): Likewise.
(use_vfp_abi): Likewise.
(arm_legitimate_address_outer_p): Likewise.
(thumb2_legitimate_address_p): Likewise.
(arm_legitimate_index_p): Likewise.
(thumb2_legitimate_index_p): Likewise.
(arm_legitimate_address): Likewise.
(arm_get_vfp_saved_size): Likewise.
(arm_emit_vfp_multi_reg_pop): Likewise.
(arm_get_frame_offsets): Likewise.
(arm_save_coproc_regs): Likewise.
(arm_hard_regno_mode_ok): Likewise.
(arm_expand_epilogue_apcs_frame): Likewise.
(arm_expand_epilogue): Likewise.
(arm_file_start): Likewise.
(arm_conditional_register_usage): Likewise.
(arm_validize_comparison): Use vfp_compare_operand directly.
* arm-builtins.c (arm_init_builtins): Remove references to TARGET_VFP.
(arm_expand_vfp_builtin): Use TARGET_HARD_FLOAT for detecting
unsupported usage.
(arm_atomic_assign_expand_fenv): Likewise.
* arm.md (divsf3): Likewise.
(arm_negsi2): Likewise.
(absdf2): Likewise.
(arm_movdi): Likewise.
(arm_movt): Likewise.
(cbranchsf4): Change predicate to vfp_compare_operand.
(cbranchdf4): Change predicate to vfp_compare_operand.
(cstorehf4): Change predicate to vfp_compare_operand.
(cstoresf4): Change predicate to vfp_compare_operand.
(cstoredf4): Change predicate to vfp_compare_operand.
(vfp_pop_multiple_with_writeback): Remove references to TARGET_VFP.
(movhi_insn_arch4, movhi_bytes): Likewise.
* constraints.md (Dt): Likewise.
(Dp): Likewise.
* iterators.md (SDF): Likewise.
* predicates.md (arm_float_compare_operand): Delete.
(const_double_vcvt_power_of_two_reciprocal): Remove references to
TARGET_VFP.
(const_double_vcvt_power_of_two): Likewise.
* thumb2.md thumb2_movsi_insn): Likewise.
* vfp.md (arm_movhi_vfp, thumb2_movhi_vfp): Likewise.
(movhf_vfp): Likewise.
(arm_movsi_vfp, thumb2_movsi_vfp): Likewise.
(movdi_vfp, movdi_vfp_cortexa8): Likewise.
(movsf_vfp, thumb2_movsf_vfp): Likewise.
(movdf_vfp, thumb2_movdf_vfp): Likewise.
(movsfcc_vfp, abssf2_vfp, negsf2_vfp, addsf3_vfp): Likewise.
(subsf3_vfp, divsf3_vfp): Likewise.
(mulsf3_vfp, mulsf3negsf_vfp, negmulsf3_vfp): Likewise.
(mulsf3addsf_vfp, (mulsf3subsf_vfp, mulsf3negsfaddsf_vfp): Likewise.
(mulsf3negsfsubsf_vfp): Likewise.
(truncsisf2_vfp, fixuns_truncsfsi2, floatsisf2_vfp): Likewise.
(floatunssisf2, sqrtsf2_vfp): Likewise.
(movcc_vfp): Likewise.
(cmpsf_split_vfp, cmpsf_trap_split_vfp): Likewise.
(cmpsf_vfp, cmpsf_trap_vfp): Likewise.
(push_multi_vfp): Likewise.
(set_fpscr, get_fpscr): Likewise.
* arm-c.c (arm_cpu_builtins): Unconditionally define __VFP_FP__.
Change-Id: Ia31339f87b894f8ef9944e782ac6a8db17feb3ed
Yvan Roux [Fri, 9 Dec 2016 12:00:26 +0000 (13:00 +0100)]
gcc/
Backport from trunk r241736.
2016-11-01 Bilyan Borisov <bilyan.borisov@arm.com>
Tamar Christina <tamar.christina@arm.com>
* config/arm/arm-c.c (arm_cpu_builtins): New macro definition.
* config/arm/arm_neon.h (vmaxnm_f32): New intrinsinc.
(vmaxnmq_f32): Likewise.
(vminnm_f32): Likewise.
(vminnmq_f32): Likewise.
* config/arm/arm_neon_builtins.def (vmaxnm): New builtin.
(vminnm): Likewise.
* config/arm/neon.md (neon_<fmaxmin_op><mode>, VCVTF): New
expander.
gcc/testsuite/
Backport from trunk r241736.
2016-11-01 Bilyan Borisov <bilyan.borisov@arm.com>
* gcc.target/arm/simd/vmaxnm_f32_1.c: New.
* gcc.target/arm/simd/vmaxnmq_f32_1.c: Likewise.
* gcc.target/arm/simd/vminnm_f32_1.c: Likewise.
* gcc.target/arm/simd/vminnmq_f32_1.c: Likewise.
gcc/testsuite/
Backport from trunk r241797.
2016-11-01 Tamar Christina <tamar.christina@arm.com>
* gcc.target/arm/simd/vmaxnm_f32_1.c (dg-require-effective-target):
Check for arm_v8_neon_hw.
* gcc.target/arm/simd/vmaxnmq_f32_1.c (dg-require-effective-target):
Likewise.
* gcc.target/arm/simd/vminnm_f32_1.c (dg-require-effective-target):
Likewise.
* gcc.target/arm/simd/vminnmq_f32_1.c(dg-require-effective-target):
Likewise.
Change-Id: I30c7b57e133fa41a3ea0ada0e5819ec645d28b45
Yvan Roux [Mon, 12 Dec 2016 13:19:10 +0000 (14:19 +0100)]
gcc/testsuite/
Backport from trunk r241957.
2016-11-08 Tamar Christina <tamar.christina@arm.com>
PR testsuite/78136
* gcc.dg/cpp/trad/trad.exp
(dg-runtest): Added $srcdir/$subdir/ to Include dirs.
* gcc.dg/cpp/trad/include.c: Use local header file.
gcc/testsuite/
Backport from trunk r242500.
2016-11-16 Tamar Christina <tamar.christina@arm.com>
PR testsuite/78136
* gcc.dg/cpp/trad/trad.exp
(dg-runtest): Moved $srcdir/$subdir/ to
DEFAULT_TRADCPPFLAGS.
Change-Id: I5271fc97361a49196ea7f5f57c4bdff8a1988405
Yvan Roux [Fri, 9 Dec 2016 11:56:39 +0000 (12:56 +0100)]
gcc/
Backport from trunk r241229.
2016-10-17 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR tree-optimization/71636
* match.pd (x & ((1 << b) - 1) -> x & ~(~0 << b)): New pattern.
gcc/testsuite/
Backport from trunk r241229.
2016-10-17 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* gcc.dg/pr71636-1.c: New test-case.
* gcc.dg/pr71636-2.c: Likewise.
Change-Id: Ie3ef5051eea791320865f339cb978a2c9e94aa0f
Yvan Roux [Fri, 9 Dec 2016 12:03:30 +0000 (13:03 +0100)]
gcc/
Backport from trunk r241958.
2016-11-08 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/t-aarch64 (aarch64-c.o): Depend on TARGET_H.
Change-Id: I7ffb83dbae1adc8b69a4e8b53f8df1ef2b28a43a
Yvan Roux [Fri, 9 Dec 2016 12:01:48 +0000 (13:01 +0100)]
gcc/
Backport from trunk r241790.
2016-11-02 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.md (add<mode>3): Remove
redundant code. Don't split frame based additions.
Change-Id: Icf72194a952010ebfa4b24a9941f587a30cd38ed
Yvan Roux [Fri, 9 Dec 2016 12:01:27 +0000 (13:01 +0100)]
gcc/
Backport from trunk r241777.
2016-11-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_register_saved_on_entry): Add
function comment.
(aarch64_next_callee_save): Likewise.
(aarch64_pushwb_single_reg): Likewise.
(aarch64_gen_storewb_pair): Likewise.
(aarch64_push_regs): Likewise.
(aarch64_gen_loadwb_pair): Likewise.
(aarch64_pop_regs): Likewise.
(aarch64_gen_store_pair): Likewise.
(aarch64_gen_load_pair): Likewise.
(aarch64_save_callee_saves): Likewise.
(aarch64_restore_callee_saves): Likewise.
Change-Id: I837088871c2b9bbe651818bfd5b362ea2925e75f
Yvan Roux [Fri, 9 Dec 2016 11:59:52 +0000 (12:59 +0100)]
gcc/
Backport from trunk r241686.
2016-10-30 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* config/arm/arm.c (arm_const_not_ok_for_debug_p): Use VAR_P.
Change-Id: I5b5356a7878821d4cc26bfb7b0d61bb9f663fbe4
Yvan Roux [Fri, 9 Dec 2016 11:59:02 +0000 (12:59 +0100)]
gcc/
Backport from trunk r241508.
2016-10-25 Wilco Dijkstra <wdijkstr@arm.com>
PR target/78041
* config/arm/neon.md (ashldi3_neon): Add "r 0 i" and "&r r i" variants.
Remove partial overlap check for shift by 1.
(ashldi3_neon): Likewise.
gcc/testsuite/
Backport from trunk r241508.
2016-10-25 Wilco Dijkstra <wdijkstr@arm.com>
PR target/78041
* gcc.target/arm/pr78041.c: New test.
Change-Id: I6f5331910f3f20e8d6f0f7a00a5c855a2acfdee2
Yvan Roux [Fri, 9 Dec 2016 11:58:32 +0000 (12:58 +0100)]
gcc/
Backport from trunk r241419.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_layout_frame):
Align FP callee-saves.
gcc/
Backport from trunk r241420.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_add_constant_internal):
Add extra argument to allow emitting the move immediate.
Use add/sub with positive immediate.
(aarch64_add_constant): Add inline function.
(aarch64_add_sp): Likewise.
(aarch64_sub_sp): Likewise.
(aarch64_expand_prologue): Call aarch64_sub_sp.
(aarch64_expand_epilogue): Call aarch64_add_sp.
Decide when to leave out move.
(aarch64_output_mi_thunk): Call aarch64_add_constant.
gcc/testsuite/
Backport from trunk r241420.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.target/aarch64/test_frame_17.c: New test.
gcc/testsuite/
Backport from trunk r241421.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.target/aarch64/test_frame_17.c: New test.
Change-Id: Ie080d3e66942f0a37b2f376bc2445f88eb079f7d
Yvan Roux [Fri, 9 Dec 2016 11:53:54 +0000 (12:53 +0100)]
gcc/
Backport from trunk r240846.
2016-10-06 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-cores.def: Add a comment before each
set of cores.
Change-Id: I123f8b902d5b5b5b2df7fce82815610ac8a3b7d6
Yvan Roux [Fri, 9 Dec 2016 11:53:10 +0000 (12:53 +0100)]
gcc/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* defaults.h (TARGET_FLT_EVAL_METHOD_NON_DEFAULT): Remove.
* system.h (TARGET_FLT_EVAL_METHOD_NON_DEFAULT): Poison.
gcc/ada/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* gcc-interface/misc.c (gnat_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard.
gcc/c-family/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* c-opts.c (c_common_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard
in C++.
gcc/fortran/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* options.c (gfc_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard.
gcc/java/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* lang.c (java_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard.
Change-Id: Ibed9daab2babc566ab0213077e682be5b40c28b1
Yvan Roux [Fri, 9 Dec 2016 11:52:42 +0000 (12:52 +0100)]
gcc/
Backport from trunk r240568.
2016-09-28 Wilco Dijkstra <wdijkstr@arm.com>
PR tree-optimization/61056
* gimple-fold.c (gimple_fold_builtin_strchr):
New function to optimize strchr (s, 0) to strlen.
(gimple_fold_builtin): Add BUILT_IN_STRCHR case.
gcc/testsuite/
Backport from trunk r240568.
2016-09-28 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.dg/strlenopt-20.c: Update test.
* gcc.dg/strlenopt-21.c: Likewise.
* gcc.dg/strlenopt-22.c: Likewise.
* gcc.dg/strlenopt-22g.c: Likewise.
* gcc.dg/strlenopt-26.c: Likewise.
* gcc.dg/strlenopt-5.c: Likewise.
* gcc.dg/strlenopt-7.c: Likewise.
* gcc.dg/strlenopt-9.c: Likewise.
gcc/
Backport from trunk r240585.
2016-09-28 Wilco Dijkstra <wdijkstr@arm.com>
* gimple-fold.c (gimple_fold_builtin): After failing to fold
strchr, also try the generic folding.
Change-Id: Ie8831d320766ac5083da722a36e92d7a44051597
Yvan Roux [Fri, 9 Dec 2016 11:52:03 +0000 (12:52 +0100)]
gcc/testsuite/
Backport from trunk r240314.
2016-09-21 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/fp16-aapcs-3.c: New.
* gcc.target/arm/fp16-aapcs-4.c: New.
* gcc.target/arm/aapcs/aapcs/vfp22.c: New.
* gcc.target/arm/aapcs/aapcs/vfp23.c: New.
* gcc.target/arm/aapcs/aapcs/vfp24.c: New.
* gcc.target/arm/aapcs/aapcs/vfp25.c: New.
Change-Id: I1473ed7fc6736a8d3e77a43c47607e1ab139abac
Yvan Roux [Fri, 9 Dec 2016 11:51:10 +0000 (12:51 +0100)]
contrib/
Backport from trunk r240288.
2016-09-20 Christophe Lyon <christophe.lyon@linaro.org>
* compare_tests: Take ERROR messages into account when
comparing.
contrib/
Backport from trunk r240289.
2016-09-20 Christophe Lyon <christophe.lyon@linaro.org>
* dg-extract-results.py: Report DejaGnu error in the final
summary.
* dg-extract-results.sh: Likewise.
Change-Id: Ib15f783dedc6b017a94e01f09b1e350b0459a890
Yvan Roux [Mon, 21 Nov 2016 11:34:20 +0000 (12:34 +0100)]
gcc/
Backport from trunk r239561.
2016-08-18 Tamar Christina <tamar.christina@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* varasm.c (default_use_anchors_for_symbol_p): Reject too large decls.
gcc/
Backport from trunk r242555.
2016-11-17 Jakub Jelinek <jakub@redhat.com>
PR middle-end/78201
* varasm.c (default_use_anchors_for_symbol_p): Fix a comment typo.
Don't test decl != NULL. Don't look at DECL_SIZE, but DECL_SIZE_UNIT
instead, return false if it is NULL, or doesn't fit into uhwi, or
is larger or equal to targetm.max_anchor_offset.
gcc/testsuite/
Backport from trunk r242555.
2016-11-17 Jakub Jelinek <jakub@redhat.com>
PR middle-end/78201
* g++.dg/opt/pr78201.C: New test.
Change-Id: I7fcc9d768209fac74de3ab6a80a8ccd880bbd185
Yvan Roux [Thu, 17 Nov 2016 14:27:08 +0000 (15:27 +0100)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.
Change-Id: I0ad4888f81ce7cbdfa7794c160018c659995cb86