Jagan Teki [Tue, 16 Jul 2019 11:57:01 +0000 (17:27 +0530)]
ram: rk3399: Introduce sys_reg3 for more capacity info
cs0_row, cs1_row and cs1_col needs more bits to show its
correct value, update to make use of both sys_reg2,
sys_reg3.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
(Squash similar patches into one patch)
Signed-off-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:00 +0000 (17:27 +0530)]
ram: rk3399: Rename sys_reg with sys_reg2
Use dram config variable name as sys_reg2 instead of sys_reg
since the final variable value is to written into a pmugrf
register named as sys_reg2.
This reflect the both variable and associated register
names are same and also help to add next sys_reg's to
add it in future.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:56:49 +0000 (17:26 +0530)]
ram: rk3399: Simply existing dram enc macro
Add simplified and meaningful macro for all setting.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
(Squash the similar patches into 1 patch)
Signed-off-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:55 +0000 (23:58 +0530)]
ram: rk3399: Enable sdram debug functions
This would help to debug the sdram base parameters while
debugging existing chip or while supporting new sdram type.
It require explicit enablement of CONFIG_RAM_ROCKCHIP_DEBUG
for showing the debug prints.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:54 +0000 (23:58 +0530)]
ram: rk3399: Add rank detection support
Right now the rk3399 sdram driver assume that the board
has configured with 2 channels, so any possibility to
enable single channel on the same driver will encounter
channel #1 data training failure.
Log:
U-Boot TPL board init
sdram_init: data training failed
rk3399_dmc_init DRAM init failed -5
So, add an algorithm that can capable to compute the active
or configured rank with associated channel like
a) do rank loop to compute the active rank, with associated
channel numbers
b) then, succeed the data training only for configured channel
c) preserve the rank for given channel
d) do channel loop for setting the active channel
e) if given rank is zero or inactive on the specific channel,
clear the timings for the associated channel
f) finally, return error if number of channels is zero
Tested in NanoPI-NEO4 since it support single channel sdram
configuration.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
(add PI_READ_GATE_TRAINING for LPDDR3 to support rk3399-evb case)
Signed-off-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:53 +0000 (23:58 +0530)]
ram: rk3399: Compute stride for 1 channel a
Add stride computation for the sdram which support
single channel a
This configuration available in NanoPi NEO4 and the
same can work with existing rk3399-sdram-ddr3-1866.dtsi
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:52 +0000 (23:58 +0530)]
ram: rk3399: Compute stride for 2 channels
stride value from sdram timings can be computed dynamically
based on the determined capacity for the given channel.
Right now these stride values are taken as part of sdram timings
via dtsi, but it possible to use same timings dtsi for given
frequency even though the configured board sdram do support
single channel with different size by dynamically detect the
stride value.
Example, NanoPi NEO4 do have DDR3-1866, but with single channel
and 1GB size with dynamic stride detection it is possible to
use existing rk3399-sdram-ddr3-1866.dtsi whose stride,
number of channels and capacity it support is d efferent.
So, add initial support to calculate the stride value for
2 channels sdram, which is available by default on existing
boards.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:51 +0000 (23:58 +0530)]
ram: rk3399: debug: Add sdram_print_stride
Add code to print the channel stride, this would help to
print the stride of associated channel.
Here is sample print on LPDDR4, 50MHz.
256B stride
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:50 +0000 (23:58 +0530)]
ram: rockchip: debug: Get the cs capacity
Add code to get the channel capacity, this would help to
print the capacity of specific channel.
Here is sample print on LPDDR4, 50MHz channel 0
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:49 +0000 (23:58 +0530)]
ram: rockchip: debug: Add sdram_print_ddr_info
Add sdram ddr info print support, this would help to
observe the sdram base parameters.
Here is sample print on LPDDR4, 50MHz channel 0
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:48 +0000 (23:58 +0530)]
ram: rockchip: Add debug sdram driver
Add sdram driver to handle debug across rockchip SoCs.
This would help to improve code debugging feature for
sdram drivers in rockchip family, whoever wants to
debug the driver should call these core debug code on
their respective platform sdram drivers.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:47 +0000 (23:58 +0530)]
debug_uart: Add printdec
Add printdec, this would help to print an
output a decimalism value.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:46 +0000 (23:58 +0530)]
ram: rockchip: Add initial Kconfig
Right now sdram drivers in rockchip SoC are built based
on the SoC configs which may not be an adequate solutions
while adding common or debug driver.
So, add meaningful Kconfig options start with rk3399.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:45 +0000 (23:58 +0530)]
ram: rk3399: Add pctl start support
Add support for pctl start for both channel 0, 1 control
and phy registers.
This would also handle pwrup_srefresh_exit init based
on the channel number.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:44 +0000 (23:58 +0530)]
ram: rk3399: Move pwrup_srefresh_exit to dram_info
Add pwrup_srefresh_exit to be part of dram_info so-that
the it can help to support pwrup_srefresh_exit in individual
channels while starting pctl in future.
No functionality change.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:43 +0000 (23:58 +0530)]
ram: rk3399: Add phy pctrl reset support
Add support for phy pctrl reset support for both channel 0, 1.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:42 +0000 (23:58 +0530)]
ram: rk3399: Use rank mask in wdql data training
Add rank_mask based on the rank number, this would keep
the wdql data training loop based on the desired rank mask
value instead of looping for all values.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:41 +0000 (23:58 +0530)]
ram: rk3399: Use rank mask in ca data training
Add rank_mask based on the rank number, this would keep
the ca data training loop based on the desired rank mask
value instead of looping for all values.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:40 +0000 (23:58 +0530)]
ram: rk3399: Clear PI_175 interrupts in data training
Clear the PI_175 interrupts before processing actual
data training in all relevant calls.
This would help to clear interrupt from previous training.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:39 +0000 (23:58 +0530)]
ram: rk3399: Handle data training return types
data trainings calls like ca, wl, rg, rl, wdql have proper
return types with -EIO and the return type missed to handle
in data_training function.
This patch, add proper return type checks along with useful
debug statement on each data training calls.
Incidentally this would help to prevent the sdram initialization
hang for single channel dram and when the code is trying to
initialize second channel with proper return type of relevant
data training call might failed.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:21:10 +0000 (23:51 +0530)]
clk: rockchip: rk3399: Fix check patch warnings and checks
- CHECK: spaces preferred around that '*'
- CHECK: spaces preferred around that '/'
- CHECK: space preferred before that '|'
- WARNING: macros should not use a trailing semicolon
- CHECK: Unnecessary parentheses around 'fbdiv <= min_fbdiv'
- CHECK: Unnecessary parentheses around 'parent->id == SCLK_MAC'
- CHECK: Unnecessary parentheses around 'parent->dev == clk->dev'
- WARNING: line over 80 characters
- CHECK: Prefer kernel type 'u8' over 'uint8_t'
- Add proper macro definitions arrangements
Note: there are still line over 80 characters and other warnings but
fixing those making code look unreadable, so I kept it as it is.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:21:09 +0000 (23:51 +0530)]
arm: include: rockchip: Add DDR4 enum
Add DDR4 enum number in common header.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:21:08 +0000 (23:51 +0530)]
arm: include: rockchip: Move dramtypes to common header
dramtype enum numbers as common across all dram controllers
in rockchip, so move the eneum values in common header.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:21:07 +0000 (23:51 +0530)]
ram: rk3399: Move common sdram structures in common header
Move common sdram structures like sdram_cap_info, sdram_base_params
into sdram_common header, this would help to reuse the same
from another controllers like px30.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:21:06 +0000 (23:51 +0530)]
ram: rk3399: s/rk3399_base_params/sdram_base_params
Most of the ddr parameters are common in rk3399_base_params
structure and which would reuse it in another controller like
px30 in future.
So, rename the structure from rk3399_base_params into
sdram_base_params.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:21:05 +0000 (23:51 +0530)]
ram: rockchip: rk3399: Add cap_info structure
Group common ddr attributes like
- rank
- col
- bk
- bw
- dbw
- row_3_4
- cs0_row
- cs1_row
- ddrconfig
into a common cap_info structure for more code readability and extend
if possible based on the new features.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:21:04 +0000 (23:51 +0530)]
ram: rk3399: Order tsel variables
Order tsel* variable declarations and assignment in proper
and meaningful way.
No functionality change.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:21:03 +0000 (23:51 +0530)]
ram: rk3399: s/ca_tsel_wr_select_p/tsel_wr_select_ca_p
Rename ca_tsel_wr_select_p to tsel_wr_select_ca_p based
on the bsp code.
No functionality change.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:21:02 +0000 (23:51 +0530)]
ram: rk3399: s/ca_tsel_wr_select_n/tsel_wr_select_ca_n
Rename ca_tsel_wr_select_n to tsel_wr_select_ca_n based
on the bsp code.
No functionality change.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:21:01 +0000 (23:51 +0530)]
ram: rk3399: s/tsel_wr_select_p/tsel_wr_select_dq_p
Rename tsel_wr_select_p to tsel_wr_select_dq_p based
on the bsp code.
No functionality change.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:21:00 +0000 (23:51 +0530)]
ram: rk3399: s/tsel_wr_select_n/tsel_wr_select_dq_n
Rename tsel_wr_select_n to tsel_wr_select_dq_n based
on the bsp code.
No functionality change.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:20:59 +0000 (23:50 +0530)]
ram: rk3399: Handle pctl_cfg return type
Add proper return type handling of pctl_cfg with
meaningful print statement.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:20:58 +0000 (23:50 +0530)]
ram: rk3399: s/sdram_params/params
Rename variable name of struct rk3399_sdram_params
from sdram_params with params for more code readability.
No functionality change.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:20:57 +0000 (23:50 +0530)]
ram: rk3399: Some trivial code fixes
- Add proper spaces in data training, rk3399_dmc_init, pctl_cfg
- Order include files
- Move macro after include files
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:20:56 +0000 (23:50 +0530)]
ram: rk3399: Fix code warnings
Fix checkpatch warninigs on sdram_rk3399.c like
- Avoid CamelCase
- Unnecessary parentheses
- Alignment should match open parenthesis
- multiple blank lines
- misspelled
- spaces preferred around that '>>'
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:33:05 +0000 (22:33 +0800)]
rockchip: rock960-rk3399: fix mail format in MAINTAINER file
The mail format should have '<>', or else the patman won't
recognize it correctley.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Andy Yan [Tue, 16 Jul 2019 08:04:53 +0000 (16:04 +0800)]
rockchip: dts: rk3399: Add 'same-as-spl' for Rock PI 4
Let the board continue boot from the storage device where
it bootup.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Andy Yan [Thu, 4 Jul 2019 06:52:47 +0000 (14:52 +0800)]
rockchip: dts: rk3399: Add spl-boot-order for Rock PI 4
RK3399 use sdhci for eMMC and DW MMC for SD Card, and
spl will only try to boot from SDMMC if we don't specify
other boot device for spl-boot-order. So add sdhci and sdmmc
for spl-boot-order here.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Peter Robinson [Mon, 1 Jul 2019 16:05:54 +0000 (17:05 +0100)]
configs: rockchip: rock960: enable USB3 support
Enable USB3 support via the dwc3 XHCI driver.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Peter Robinson [Mon, 1 Jul 2019 16:05:53 +0000 (17:05 +0100)]
configs: rockchip: rock960: Add support for USB ethernet adapters
As the Rock960 doesn't have an onboard wired ethernet interface
it's useful to have some common USB wired ethernet devices added
to enable testing.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Peter Robinson [Mon, 1 Jul 2019 16:05:52 +0000 (17:05 +0100)]
configs: rockchip: rock960: enable DMA for SDHCI controller
Enable the SDMA controller so the eMMC connected to the SDHCI
controller (sdhci@
fe330000) can make use of it.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Peter Robinson [Mon, 1 Jul 2019 16:05:51 +0000 (17:05 +0100)]
configs: rockchip: rock960: enable pmic and regulator commands
We have both PMIC and Regulator functionality so it's useful to
be able to see output and debug with the commands enabled.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Peter Robinson [Mon, 1 Jul 2019 16:05:50 +0000 (17:05 +0100)]
configs: rockchip: rock960: drop options for non-existent HW
The Rock960 doesn't contain SPI flash so drop related config options.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Peter Robinson [Mon, 1 Jul 2019 16:05:49 +0000 (17:05 +0100)]
arm64: rockchip: rock960: sync dts files from Linux 5.2-rc6
Sync the dts files for the Rock960 boards from Linux to get the
latest changes and fixes for the devices.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Mark Kettenis [Sun, 30 Jun 2019 16:01:56 +0000 (18:01 +0200)]
rockchip: xhci: Remove RK3399 support
Remove RK3399 compatible strings as this driver is no longer
used on that SoC.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Mark Kettenis [Sun, 30 Jun 2019 16:01:55 +0000 (18:01 +0200)]
usb: xhci-dwc3: Add USB2 PHY configuration
Configure USB2 PHY register based on "phy_type" property and
handle all the quirks that are relevant for Rockchip RK3399 SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Mark Kettenis [Sun, 30 Jun 2019 16:01:54 +0000 (18:01 +0200)]
usb: dwc3-of-simple: Add support for RK3399
Add compatible string for RK3399 and enable it by default on
Rockchip platforms with USB3 support.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Mark Kettenis [Sun, 30 Jun 2019 16:01:53 +0000 (18:01 +0200)]
rockchip: clk: rk3399: handle clk_enable requests for USB3
The "simple" OF glue layer for the Designware USB3 core enables
all refernced clocks. These need to be need to be implemented
otherwise the driver fails to probe. A dummy implementation
that simply returns success is sufficient since the RK3399 comes
out of reset with all clock gates open.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tom Rini [Thu, 18 Jul 2019 15:31:37 +0000 (11:31 -0400)]
Merge branch '2019-07-17-master-imports'
- Various FS/disk related fixes with security implications.
- Proper fix for the pci_ep test.
- Assorted bugfixes
- Some MediaTek updates.
- 'env erase' support.
Tom Rini [Wed, 17 Jul 2019 13:58:24 +0000 (09:58 -0400)]
Revert "test: Disable pci_ep test for now"
We now have a proper fix for this test, stop disabling it in CI.
This reverts commit
ae8d23a668755d804748a1cf848426b28338b3d5.
Signed-off-by: Tom Rini <trini@konsulko.com>
Ramon Fried [Mon, 15 Jul 2019 20:04:41 +0000 (23:04 +0300)]
pci_ep: fix wrong addressing to barno
barno was mistakely readed from the target structure,
resulting in undefined behavious depending on the previous memory
content. fix that.
Fixes:
bb413337826e ("pci_ep: add pci endpoint sandbox driver")
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
[trini: Drop unused bar_idx]
Signed-off-by: Tom Rini <trini@konsulko.com>
Oleksandr Zhadan [Thu, 11 Jul 2019 15:52:49 +0000 (11:52 -0400)]
board: Arcturus: ucp1020: Removing obsoleted stuff
Removed one of the defconfig(obsoleted) file
and unused CONFIG_MMC_SPI definition to avoid confusion
about if this board using non-DM stuff or not.
uCP1020 is completely DM free board, tested and runs well.
Signed-off-by: Oleksandr Zhadan <oleks@arcturusnetworks.com>
Signed-off-by: Michael Durrant <mdurrant@arcturusnetworks.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Weijie Gao [Thu, 11 Jul 2019 07:10:23 +0000 (15:10 +0800)]
blk: Invalidate block cache when switching hwpart
Some storage devices have multiple hw partitions and both address from
zero, for example eMMC.
However currently block cache invalidation only applies to block
write/erase.
This can cause a problem that data of current hw partition is cached
before switching to another hw partition. And the following read
operation of the latter hw partition will get wrong data when reading
from the addresses that have been cached previously.
To solve this problem, invalidate block cache after a successful
select_hwpart operation.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 11 Jul 2019 06:26:26 +0000 (14:26 +0800)]
arm: dts: MediaTek: remove tick-timer from mt7629.dtsi
This patch removes tick-timer as all mt7629 boards should use arch timer.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 11 Jul 2019 06:26:25 +0000 (14:26 +0800)]
configs: mt7629_rfb: use arm arch timer instead of mtk timer
This patch changes mt7629_rfb to use ARM's generic arch timer instead of
MediaTek's soc timer.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Thu, 11 Jul 2019 06:26:24 +0000 (14:26 +0800)]
arm: dts: MediaTek: fix clock order for timer0 node of mt7629.dtsi
The timer0 node has its two clocks written in reversed order. The timer0
is used as the tick timer which causes a problem that the time a delay
function used is 4 times longer.
This patch reverses these two clocks to solve this issue.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Simon Glass [Wed, 10 Jul 2019 17:04:13 +0000 (11:04 -0600)]
chromium: Update docs to clone vboot_reference directly
We don't need a full checkout of Chrome OS to build U-Boot with
Chromium OS verified boot. Update the instructions accordingly and fix a
typo which joins the output directory and defconfig.
Signed-off-by: Simon Glass <sjg@chromium.org>
Weijie Gao [Wed, 10 Jul 2019 09:35:42 +0000 (17:35 +0800)]
arm: mediatek: add missing arch timer configuration for MT7629
This patch sets CNTVOFF of ARM CP15 timer to zero to make sure the virtual
counter is fully usable for linux kernel.
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Anatolij Gustschin [Wed, 10 Jul 2019 08:03:13 +0000 (10:03 +0200)]
power-domain.h: Fix typo
%s/ot/to/
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Paul Emge [Mon, 8 Jul 2019 23:37:07 +0000 (16:37 -0700)]
CVE-2019-13106: ext4: fix out-of-bounds memset
In ext4fs_read_file in ext4fs.c, a memset can overwrite the bounds of
the destination memory region. This patch adds a check to disallow
this.
Signed-off-by: Paul Emge <paulemge@forallsecure.com>
Paul Emge [Mon, 8 Jul 2019 23:37:06 +0000 (16:37 -0700)]
ext4: gracefully fail on divide-by-0
This patch checks for 0 in several ext4 headers and gracefully
fails instead of raising a divide-by-0 exception.
Signed-off-by: Paul Emge <paulemge@forallsecure.com>
Paul Emge [Mon, 8 Jul 2019 23:37:05 +0000 (16:37 -0700)]
CVE-2019-13104: ext4: check for underflow in ext4fs_read_file
in ext4fs_read_file, it is possible for a broken/malicious file
system to cause a memcpy of a negative number of bytes, which
overflows all memory. This patch fixes the issue by checking for
a negative length.
Signed-off-by: Paul Emge <paulemge@forallsecure.com>
Paul Emge [Mon, 8 Jul 2019 23:37:04 +0000 (16:37 -0700)]
CVE-2019-13105: ext4: fix double-free in ext4_cache_read
ext_cache_read doesn't null cache->buf, after freeing, which results
in a later function double-freeing it. This patch fixes
ext_cache_read to call ext_cache_fini instead of free.
Signed-off-by: Paul Emge <paulemge@forallsecure.com>
Paul Emge [Mon, 8 Jul 2019 23:37:03 +0000 (16:37 -0700)]
CVE-2019-13103: disk: stop infinite recursion in DOS Partitions
part_get_info_extended and print_partition_extended can recurse infinitely
while parsing a self-referential filesystem or one with a silly number of
extended partitions. This patch adds a limit to the number of recursive
partitions.
Signed-off-by: Paul Emge <paulemge@forallsecure.com>
David Abdurachmanov [Wed, 3 Jul 2019 12:50:44 +0000 (15:50 +0300)]
qemu-riscv: enable VIRTIO_PCI
libvirt v.5.3.0 with QEMU 4.0.0 or above uses PCI automatically and
thus devices (network, storage, etc) are connected via PCI.
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
AKASHI Takahiro [Wed, 3 Jul 2019 01:44:40 +0000 (10:44 +0900)]
arm: qemu: fix failure in flash initialization if booting from TF-A
If U-Boot is loaded and started from TF-A (you need to change
SYS_TEXT_BASE to 0x60000000), it will hang up at flash initialization.
If secure mode is off (default, or -machine virt,secure=off) at qemu,
it will provide dtb with two flash memory banks:
flash@0 {
bank-width = <0x4>;
reg = <0x0 0x0 0x0 0x4000000 0x0 0x4000000 0x0 0x4000000>;
compatible = "cfi-flash";
};
If secure mode is on, on the other hand, qemu provides dtb with 1 bank:
flash@0 {
bank-width = <0x4>;
reg = <0x0 0x4000000 0x0 0x4000000>;
compatible = "cfi-flash";
};
As a result, flash_init()/flash_get_size() will eventually fail.
With this patch applied, relevant CONFIG values are modified.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
AKASHI Takahiro [Wed, 3 Jul 2019 01:44:39 +0000 (10:44 +0900)]
arm: move CONFIG_TFABOOT to generic Kconfig
Currently, CONFIG_TFABOOT is located in armv8/fsl-layerscape Kconfig,
but it will be also useful for other targets if some additional
configuration are necessary.
So move it to arch/arm/Kconfig.
Please note that CONFIG_TFABOOT still depends on
CONFIG_ARCH_SUPPORT_TFABOOT and so the menu won't come up
if any target doesn't need its own customization for TF-A boot.
This will maintain the compatibility.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Sriram Dash <sriram.dash@nxp.com>
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Peng Ma <peng.ma@nxp.com>
Cc: Yuantian Tang <andy.tang@nxp.com>
Cc: Pankit Garg <pankit.garg@nxp.com>
Sam Protsenko [Tue, 2 Jul 2019 18:14:57 +0000 (21:14 +0300)]
doc: Move fastboot protocol doc to android dir
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Jean-Jacques Hiblot [Tue, 2 Jul 2019 12:23:26 +0000 (14:23 +0200)]
cmd: mem: Add a command to fill the memory with random data
This command fills the memory with data produced by rand().
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Andre Przywara [Sun, 30 Jun 2019 01:45:01 +0000 (02:45 +0100)]
tools: mkenvimage: Always consider non-regular files
At the moment mkenvimage has two separate read paths: One to read from
a potential pipe, while dynamically increasing the buffer size, and a
second one using mmap(2), using the input file's size. This is
problematic for two reasons:
- The "pipe" path will be chosen if the input filename is missing or
"-". Any named, but non-regular file will use the other path, which
typically will cause mmap() to fail:
$ mkenvimage -s 256 -o out <(echo "foo=bar")
- There is no reason to have *two* ways of reading a file, since the
"pipe way" will always work, even for regular files.
Fix this (and simplify the code on the way) by always using the method
of dynamically resizing the buffer. The existing distinction between
the two cases will merely be used to use the open() syscall or not.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Sun, 30 Jun 2019 01:45:00 +0000 (02:45 +0100)]
tools: mkenvimage: Fix reading from slow pipe
It is perfectly fine for the read(2) syscall to return with less than
the requested number of bytes read (short read, see the "RETURN VALUE"
section of the man page). This typically happens with slow input
(keyboard, network) or with complex pipes.
So far mkenvimage expects the exact number of requested bytes to be
read, assuming an end-of-file condition otherwise. This wrong behaviour
can be easily shown with:
$ (echo "foo=bar"; sleep 1; echo "bar=baz") | mkenvimage -s 256 -o out -
The second line will be missing from the output.
Correct this by checking for any positive, non-zero return value.
This fixes a problem with a complex pipe in one of my scripts, where
the environment consist of two parts.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Alexander Dahl <ada@thorsis.com>
Sam Protsenko [Tue, 2 Jul 2019 18:20:32 +0000 (21:20 +0300)]
test/py: gpt: Use long options for sgdisk
sgdisk 0.8.10.2 from AOSP doesn't support short options, failing with
errors like this:
sgdisk: invalid option -- 'U'
Test fails due to that error. Let's use long options to make the test
work with any sgdisk version.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Frank Wunderlich [Sat, 29 Jun 2019 09:36:20 +0000 (11:36 +0200)]
env: mmc: add erase-function
this adds erase environment for mmc storage
squashed fixes:
- add CONFIG_CMD_ERASEENV
- env: erase redundant offset if defined
- changes mentioned by Simon
- fix whitespaces around errmsg
Suggested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Frank Wunderlich [Sat, 29 Jun 2019 09:36:19 +0000 (11:36 +0200)]
env: register erase command
this patch adds basic changes for adding a erase-subcommand to env
with this command the environment stored on non-volatile storage written
by saveenv can be cleared.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
squashed fixes
- start message with "Erasing"
- mark erase-function as optional
- env: separate eraseenv from saveenv
Suggested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Marek Vasut [Wed, 26 Jun 2019 22:17:27 +0000 (00:17 +0200)]
common: Fix autocompletion with CONFIG_CMDLINE_PS_SUPPORT
The autocompletion did not work if CONFIG_CMDLINE_PS_SUPPORT was enabled
because U-Boot was comparing the prompt string with CONFIG_SYS_PROMPT .
While this works if CONFIG_CMDLINE_PS_SUPPORT is disabled, this no longer
works if it's enabled because user can override the PS1 . Fix this by
checking prompt string against the current PS1 value.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Sven Schwermer [Mon, 24 Jun 2019 11:03:34 +0000 (13:03 +0200)]
regulator: Allow enabling GPIO regulator
Drivers need to be able to enable regulators that may be implemented as
GPIO regulators. Example: fsl_esdhc enables the vqmmc supply which is
commonly implemented as a GPIO regulator in order to switch between I/O
voltage levels.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Sven Schwermer [Mon, 24 Jun 2019 11:03:33 +0000 (13:03 +0200)]
regulator: Factor out common enable code
In preparation of being able to enable/disable GPIO regulators, the
code that will be shared among the two kinds to regulators is factored
out into its own source files.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Heinrich Schuchardt [Sun, 23 Jun 2019 10:59:31 +0000 (12:59 +0200)]
ARM: correct detection of thumb mode
When a crash occurs in thumb mode the crash dump is incorrect. This is due
to the usage of a non-existing configuration variable CONFIG_ARM_THUMB in
the definition of macro thumb_mode(regs).
Use CONFIG_IS_ENABLED(SYS_THUMB_BUILD) to detect that the code has been
compiled for thumb mode. Remove ARM_THUMB from config_whitelist.txt.
With the patch crash dumps indicate thumb mode correctly.
On a system with thumb mode:
=> exception unaligned
data abort
pc : [<
8f7a2b52>] lr : [<
8f7ab1ef>]
reloc pc : [<
1780cb52>] lr : [<
178151ef>]
sp :
8ed8c3f8 ip :
8f7a2b4d fp :
00000002
r10:
8f7f8228 r9 :
8ed95ea8 r8 :
8ed99488
r7 :
8f7ab141 r6 :
00000000 r5 :
8ed8c3f9 r4 :
8f7f6390
r3 :
8ed9948c r2 :
00000001 r1 :
00000000 r0 :
8f7f6390
Flags: nzCv IRQs off FIQs off Mode SVC_32 (T)
Code: 8f7e 466d f105 0501 (e9d5) 6700
The Flags line has '(T)' and in the Code line the output is in u16 groups.
On a system without thumb mode:
=> exception breakpoint
prefetch abort
pc : [<
7ff5a5c8>] lr : [<
7ff675ec>]
reloc pc : [<
0000e5c8>] lr : [<
0001b5ec>]
sp :
7ee0ad80 ip :
7ff5a5cc fp :
7ff674cc
r10:
00000002 r9 :
7ef0bed8 r8 :
7ffd6214
r7 :
7ef0e080 r6 :
00000000 r5 :
7ffd4090 r4 :
00000000
r3 :
7ef0e084 r2 :
00000001 r1 :
00000000 r0 :
7ffd4090
Flags: nzCv IRQs off FIQs off Mode SVC_32
Code:
e1a0500d e2855001 e1c560d0 e3a00001 (
e12fff1e)
The Flags line does not show '(T)' and in the Code line the output is in
u32 groups.
Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Marek Szyprowski [Fri, 21 Jun 2019 13:35:35 +0000 (15:35 +0200)]
ext4: add support for filesystems without JOURNAL
JOURNAL is optional for EXT4 (and EXT3) filesystems, so add support for
skipping it. This fixes corrupting EXT4 volumes without JOURNAL after
using uboot's 'ext4write' command.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Marek Szyprowski [Fri, 21 Jun 2019 13:32:51 +0000 (15:32 +0200)]
ext4: fix calculating inode blkcount for non-512 blocksize filesystems
The block count entry in the EXT4 filesystem disk structures uses
standard 512-bytes units for most of the typical files. The only
exception are HUGE files, which use the filesystem block size, but those
are not supported by uboot's EXT4 implementation anyway. This patch fixes
the EXT4 code to use proper unit count for inode block count. This fixes
errors reported by fsck.ext4 on disks with non-standard (i.e. 4KiB, in
case of new flash drives) PHYSICAL block size after using 'ext4write'
uboot's command.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Chuanhua Han [Fri, 21 Jun 2019 08:21:53 +0000 (16:21 +0800)]
rtc: Add DM support to ds3231
Add an implementation of the ds3231 driver that uses the driver
model i2c APIs.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Vesa Jääskeläinen [Sun, 16 Jun 2019 17:53:38 +0000 (20:53 +0300)]
lib: rsa: add support to other openssl engine types than pkcs11
There are multiple other openssl engines used by HSMs that can be used to
sign FIT images instead of forcing users to use pkcs11 type of service.
Relax engine selection so that other openssl engines can be specified and
use generic key id definition formula.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Cc: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 18 Jul 2019 15:30:30 +0000 (11:30 -0400)]
Merge branch '2019-07-17-ti-imports'
- Bring in the first three series that we need in order to enhance the
TI AM65x series support and then later introduce J721E support.
Tom Rini [Thu, 18 Jul 2019 15:30:12 +0000 (11:30 -0400)]
Merge branch '2019-07-17-ci-imports'
This brings in a small update to our Travis-CI config file and
introduces a GitLab CI file. Currently they have the same functionality
and the plan currently is to migrate away from Travis-CI.
Tom Rini [Thu, 18 Jul 2019 11:28:36 +0000 (07:28 -0400)]
gitlab-ci: Move the pyelfutils section
We need this for building some 64bit ARM platforms, not for test.py
runs.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 17 Jul 2019 21:51:28 +0000 (17:51 -0400)]
gitlab-ci: Split the world build into 4 jobs
To better allow for parallelization of the world build job split things
into 32bit ARM (687 boards), 64bit ARM (215), PowerPC (311 boards) and
everything else (167 boards).
While the 32bit ARM job is heavier than I would like, there is not a
natural split that would reduce it in half or so without requiring the
sort of hard to maintain splits we have to do in Travis CI.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 18 Jul 2019 02:51:31 +0000 (22:51 -0400)]
gitlab-ci: Add pyelftools when needed
In order to mirror current Travis CI support we need to install this
package via pip.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 17 Jul 2019 20:06:57 +0000 (16:06 -0400)]
gitlab-ci: Add evb-ast2500 test.py test
Bring us back into line with current Travis tests.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 19 Jun 2019 13:25:17 +0000 (09:25 -0400)]
gitlab-ci: Initial conversion of Travis CI build to GitLab CI
Migrate all of the logic in our current .travis.yml file to a GitLab CI
config file. Notable changes are that this will run the jobs on runners
with the "all" tag. The timeout for a job needs to be configured higher
than normal as we no longer split building the world up into a large
number of small jobs but instead perform one big build job. We make use
of stages so that we build and run all of the QEMU + test.py tests first
in order to increase the chance that any problems will be found before
starting the final big build.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 18 Jul 2019 02:50:33 +0000 (22:50 -0400)]
am335x_boneblack_vboot: Disable asm memcpy/memset in SPL
In order to save a little space in SPL, do not use the asm versions of
memcpy/memset.
Signed-off-by: Tom Rini <trini@konsulko.com>
Joel Stanley [Thu, 4 Jul 2019 01:35:18 +0000 (11:05 +0930)]
travis: Build aspeed board with qemu HEAD
In order to boot u-boot in the aspeed machine we need to run at least
qemu
3059c2f5a813 (v4.0.0-1592-g3059c2f5a813), which is not in a
released tag.
This should be changed to v4.1.0 when it is released.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 4 Jul 2019 01:35:17 +0000 (11:05 +0930)]
travis: Add ASPEED ast2500 to qemu tests
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 4 Jul 2019 01:35:15 +0000 (11:05 +0930)]
configs: aspeed: Add HUSH and random ethernet addr
Tests in test/py/tests/test_env.py like this fail without CONFIG_HUSH_PARSER:
=> => printenv test_env_0
## Error: "test_env_0" not defined
=> .=> setenv test_env_0
=> => echo $test_env_0
$test_env_0
=> F
We also want a mac address so the ethernet device works in qemu.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 4 Jul 2019 01:35:14 +0000 (11:05 +0930)]
configs: aspeed: Unset CONFIG_MMC
The aspeed board does not have an upstream MMC driver.
As CONFIG_MMC defaults on, the board would fail to build due to the
CONFIG_DM_MMC migration:
===================== WARNING ======================
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019.04 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
Change the defconfig to disable MMC until a driver is submitted.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Andreas Dannenberg [Tue, 4 Jun 2019 23:08:28 +0000 (18:08 -0500)]
configs: am65x_hs_evm: Add support for applying overlays
This will allow for downloading and applying overlays from an MMC/SD
boot media based on the overlay_files ENV variable containing a list
of overlay files.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Tue, 4 Jun 2019 23:08:27 +0000 (18:08 -0500)]
configs: am65x_evm: Add support for applying overlays
This will allow for downloading and applying overlays from an MMC/SD
boot media based on the overlay_files ENV variable containing a list
of overlay files.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Tue, 4 Jun 2019 23:08:26 +0000 (18:08 -0500)]
board: ti: am654: Use EEPROM-based board detection
The TI AM654x EVM base board and the associated daughtercards have on-
board I2C-based EEPROMs containing board configuration data. Use the
board detection infrastructure introduced earlier to do the following:
1) Parse the AM654x EVM base board EEPROM and populate items like board
name and MAC addresses into the TI common EEPROM data structure
residing in SRAM scratch space
2) Check for presence of daughter card(s) by probing the associated
presence signals via an I2C-based GPIO expander. Then, if such a
card is found, parse the data such as additional Ethernet MAC
addresses from its on-board EEPROM and populate into U-Boot
accordingly
3) Dynamically create an U-Boot ENV variable called overlay_files
containing a list of daugherboard-specific DTB overlays based on
daughercards found.
This patch adds support for the AM654x base board ("AM6-COMPROCEVM")
as well as for the IDK ("AM6-IDKAPPEVM"), OLDI LCD ("OLDI-LCD1EVM")
PCIe/USB3.0 ("SER-PCIEUSBEVM"), 2 Lane PCIe/USB2.0 ("SER-PCIE2LEVM"),
and general purpuse ("AM6-GPAPPEVM") daughtercards.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Tue, 4 Jun 2019 23:08:25 +0000 (18:08 -0500)]
ti: common: am6: Add support for setting MAC addresses
The AM654x EVM based on the TI K3 family of SoCs has an updated board
detection EEPROM structure that contains a TLV record of dedicated MAC
addresses rather than a range of MAC addresses as it was used on earlier
platforms such as DRA7. Add a basic function that allows us setting up
Ethernet MAC addresses into the U-Boot environment based on the MAC
address record contained in the common TI EEPROM structure.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Tue, 4 Jun 2019 23:08:24 +0000 (18:08 -0500)]
ti: common: am6: Add support for board description EEPROM
The AM654x EVM based on the TI K3 family of SoCs have an updated board
detection EEPROM structure, now comprising variable-sized TLV-type
records, containing a superset of what is already being provided on
earlier platforms such as DRA7. Add basic support for parsing the new
data structures contained on the base board into the common TI EEPROM
structure while also providing infrastructure that can be used later on
to parse data from additional EEPROMs such as the ones that are used on
daughtercards for this platform.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Tue, 4 Jun 2019 23:08:23 +0000 (18:08 -0500)]
arm: K3: am654: Map common EEPROM data into SRAM scratch space
The board detection scheme employed on various TI EVMs makes use of
SRAM scratch space to share data read from an on-board EEPROM between
the different bootloading stages. Map the associated definition that's
used to locate this data into the SRAM scratch space we use on AM654x.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>