Hai Pham [Thu, 26 Jan 2023 20:05:55 +0000 (21:05 +0100)]
mmc: renesas-sdhi: R-Car M3 r1.3 also uses 4 tuning taps
Early ES revisions of M3-W SoCs requires 4-tap HS400. Reflect the status
from datasheet.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:02:05 +0000 (21:02 +0100)]
clk: renesas: Drop core param from gen3_clk_get_rate64_pll_mul_reg
Drop 'core' parameter from gen3_clk_get_rate64_pll_mul_reg() function
as it is only used in debug print. No functional change except for the
debug print, which is disabled by default.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 26 Jan 2023 20:02:04 +0000 (21:02 +0100)]
clk: renesas: Use pre-defined offset for RPC clocks
Since commit
f7b4e4c0949f ("clk: renesas: Synchronize R-Car Gen3 tables
with Linux 5.12"), the custom macros for RPC clocks were dropped.
Use pre-defined offset for RPC clocks, same as what Linux does, instead
of retrieving it from the macros
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:02:03 +0000 (21:02 +0100)]
clk: renesas: Add and enable CPG reset driver
Add trivial reset driver extension to the CPG clock driver. The change
turns current CPG UCLASS_CLK driver instance into an UCLASS_NOP proxy
driver, which in turn binds both generic rcar3_clk UCLASS_CLK clock
driver as well as generic rcar_rst UCLASS_RESET reset driver to the
CPG DT node. This way, any other drivers which use the 'reset' DT
property can now obtain valid reset handle backed by a reset driver.
The clock tables have been updated to represent the CPG driver and only
implement the generic CPG proxy driver bind call, which binds the clock
and reset drivers.
The DM_RESET is now enabled for all R-Car Gen3 platforms.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 26 Jan 2023 20:02:02 +0000 (21:02 +0100)]
clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support
Add support for the R-Car M3-W+ (R8A77961) SoC.
R-Car M3-W+ is very similar to R-Car M3-W (R8A77960), which allows for
both SoCs to share a driver.
Based on Linux commit
2ba738d56db4 ("clk: renesas: r8a7796: Add R8A77961
CPG/MSSR support")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 26 Jan 2023 20:02:01 +0000 (21:02 +0100)]
clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960
Rename CONFIG_CLK_R8A7796 for R-Car M3-W (R8A77960) to
CONFIG_CLK_R8A77960, to avoid confusion with R-Car M3-W+ (R8A77961),
which will use CONFIG_CLK_R8A77961.
Based on Linux commit
92d1ebae9abf ("clk: renesas: Rename CLK_R8A7796
to CLK_R8A77960")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 29 Jan 2023 01:37:50 +0000 (02:37 +0100)]
clk: renesas: Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.1.7
Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:59 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.1.7
Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:58 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.1.7
Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:57 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.1.7
Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:56 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A779A0 V3U clock tables with Linux 6.1.7
Synchronize R-Car R8A779A0 V3U clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Rename CLK_TYPE_R8A779A0_ to CLK_TYPE_GEN4_ to match the new
clock tables. Add CLK_TYPE_GEN4_SD, CLK_TYPE_GEN4_RPC and
CLK_TYPE_GEN4_RPCD2 macros and handling into Gen3 CPG core.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:55 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A77995 D3 clock tables with Linux 6.1.7
Synchronize R-Car R8A77995 D3 clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:54 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A77990 E3 clock tables with Linux 6.1.7
Synchronize R-Car R8A77990 E3 clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:53 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A77980 V3H clock tables with Linux 6.1.7
Synchronize R-Car R8A77980 V3H clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:52 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.1.7
Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:51 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.1.7
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:50 +0000 (21:01 +0100)]
clk: renesas: Synchronize R8A7795 H3 clock tables with Linux 6.1.7
Synchronize R-Car R8A7795 H3 clock tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 26 Jan 2023 20:01:49 +0000 (21:01 +0100)]
clk: renesas: Add dummy SDnH clock
Currently, SDnH is handled together with SDn. This caused lots of
problems, so we want SDnH as a separate clock. Introduce a dummy SDnH
type here which creates a fixed-factor clock with factor 1. That allows
us to convert the per-SoC CPG drivers while keeping the old behaviour
for now. A later patch then will add the proper functionality.
Based on Linux series by Wolfram Sang:
commit
a31cf51bf6b4b ("clk: renesas: rcar-gen3: Add dummy SDnH clock"),
commit
1abd04480866c ("clk: renesas: rcar-gen3: Add SDnH clock"),
commit
63494b6f98f26 ("clk: renesas: r8a779a0: Add SDnH clock to V3U")
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Switch to gen3_clk_get_rate64
Hai Pham [Thu, 26 Jan 2023 20:01:48 +0000 (21:01 +0100)]
pinctrl: renesas: r8a7796: Add R8A77961 PFC support
R-Car M3-W+ (R8A77961) is pin compatible with R-Car M3-W (R8A77960),
which allows for both SoCs to share a driver.
Based on Linux commit
708c69e9eacc ("pinctrl: sh-pfc: r8a7796: Add
R8A77961 PFC support") and
74ce7a8044b0 ("pinctrl: renesas: r8a7796:
Optimize pinctrl image size for R8A774A1")
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Marek Vasut [Thu, 26 Jan 2023 20:01:47 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A779A0 V3U PFC tables with Linux 6.1.7
Synchronize R-Car R8A779A0 V3U PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:46 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A77995 D3 PFC tables with Linux 6.1.7
Synchronize R-Car R8A77995 D3 PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:45 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A77990 E3 PFC tables with Linux 6.1.7
Synchronize R-Car R8A77990 E3 PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:44 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A77980 V3H PFC tables with Linux 6.1.7
Synchronize R-Car R8A77980 V3H PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:43 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A77970 V3M PFC tables with Linux 6.1.7
Synchronize R-Car R8A77970 V3M PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:42 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A77965 M3-N PFC tables with Linux 6.1.7
Synchronize R-Car R8A77965 M3-N PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:41 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.1.7
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Note that the Kconfig option name has been updated to match the
Linux kernel Kconfig option name, from PINCTRL_PFC_R8A7796 to
PINCTRL_PFC_R8A77960 .
Also note that a new Kconfig option has been added to enable support
for R8A77961 M3-W+ , the Kconfig option name is PINCTRL_PFC_R8A77961 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:40 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A7795 H3 PFC tables with Linux 6.1.7
Synchronize R-Car R8A7795 H3 PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Note that the Kconfig option name has been updated to match the
Linux kernel Kconfig option name, from PINCTRL_PFC_R8A7795 to
PINCTRL_PFC_R8A77951 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:39 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A7794 E2 PFC tables with Linux 6.1.7
Synchronize R-Car R8A7794 E2 PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:38 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A7792 V2H PFC tables with Linux 6.1.7
Synchronize R-Car R8A7792 V2H PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:37 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A7791 M2-W and R8A7793 M2-N PFC tables with Linux 6.1.7
Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:36 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize R8A7790 H2 PFC tables with Linux 6.1.7
Synchronize R-Car R8A7790 H2 PFC tables with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Thu, 26 Jan 2023 20:01:35 +0000 (21:01 +0100)]
pinctrl: renesas: Synchronize PFC core with Linux 6.1.7
Synchronize R-Car PFC core with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Parts picked from
pinctrl: renesas: Synchronize R-Car Gen2/Gen3 tables with Linux 5.18.3
- Add pin groups for the green and high8 subsets of the Video IN pins
- Add MediaLB pins
- Add bias support for various SoCs
- Share more pin group data, to reduce size and ease review
- Miscellaneous cleanups, fixes and improvements.
This contains port of Linux kernel commit
6210905586ae ("pinctrl: renesas: Add shorthand for reserved register fields")
to handle negative entries in GROUP() macros correctly.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 26 Jan 2023 20:01:34 +0000 (21:01 +0100)]
dt-bindings: clock: Pick R-Car Gen3 R8A77961 M3W+ header from Linux 6.1.7
Pick R-Car Gen3 R8A77961 M3W+ CPG Core Clock header from Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Update commit message
Hai Pham [Thu, 26 Jan 2023 20:01:33 +0000 (21:01 +0100)]
dt-bindings: power: Pick R-Car Gen3 R8A77961 M3W+ header from Linux 6.1.7
Pick R-Car Gen3 R8A77961 M3W+ power domain header from Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Update commit message
Marek Vasut [Thu, 26 Jan 2023 20:01:32 +0000 (21:01 +0100)]
ARM: dts: rmobile: Synchronize DTs with Linux 6.1.7
Synchronize R-Car device trees with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
The following script has been used for the synchronization:
$ for i in $(cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) ; do
if [ -e /linux-2.6/arch/arm64/boot/dts/renesas/$i ] ; then
cp /linux-2.6/arch/arm64/boot/dts/renesas/$i arch/arm/dts/ ;
elif [ -e /linux-2.6/arch/arm/boot/dts/$i ] ; then
cp /linux-2.6/arch/arm/boot/dts/$i arch/arm/dts/
else
echo "NOT FOUND: $i"
fi
done
$ git add $( ( cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) | tr " " "\n" | sed 's@^@arch/arm/dts/@g' )
Move the include/dt-bindings/{clk,clock}/versaclock.h header used by
the renesas boards to match Linux 6.1.y as well.
Keep arch/arm/dts/r8a774c0-u-boot.dtsi sdhi3 node as it is now used
by the arch/arm/dts/r8a774c0-cat874.dts board.
Pick s@spi-flash@flash@ change in arch/arm/dts/r8a779a0-falcon-u-boot.dts
from "ARM: dts: Synchronize R-Car V3U DTs with Linux 5.18.3" .
Adjust R8A77990 Ebisu CONFIG_SYS_MMC_ENV_DEV from 2 to 0 to reflect
the card enumeration in ebisu.dtsi /aliases DT node .
Adjust R8A7795 and R8A7796 ULCB CONFIG_SYS_MMC_ENV_DEV from 1 to 0 to
reflect the card enumeration in ulcb.dtsi /aliases DT node .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> # r8a779a0-falcon-u-boot.dts
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> # r8a779a0-falcon-u-boot.dts
Marek Vasut [Thu, 26 Jan 2023 20:01:31 +0000 (21:01 +0100)]
ARM: dts: rmobile: Synchronize DT headers with Linux 6.1.7
Synchronize R-Car device tree headers with Linux 6.1.7,
commit
21e996306a6afaae88295858de0ffb8955173a15 .
This is only a copyright and SPDX identifier update, no
functional change.
The following script has been used for the synchronization:
$ for i in $(cd include/dt-bindings/clock/ ; ls -1 r8a*) ; do cp /linux-2.6/include/dt-bindings/clock/$i include/dt-bindings/clock/ ; done
$ for i in $(cd include/dt-bindings/power/ ; ls -1 r8a*) ; do cp /linux-2.6/include/dt-bindings/power/$i include/dt-bindings/power/ ; done
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tom Rini [Wed, 1 Feb 2023 14:31:17 +0000 (09:31 -0500)]
Merge tag 'fsl-qoriq-2023-2-1' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
make QSPI clock selection optional during SoC init for ls102xa
Fix regulator name for ls2_sfp
Update NXP RCW github repo
Tom Rini [Wed, 1 Feb 2023 14:30:52 +0000 (09:30 -0500)]
Merge tag 'u-boot-imx-
20230201' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
For 2023.04
-----------
- several conversion to DM_SERIAL and DM_I2C
- fixes for Toradex boards
- PSCI
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/14965
Sean Anderson [Fri, 27 Jan 2023 16:54:53 +0000 (11:54 -0500)]
misc: ls2_sfp: Fix regulator name
Unlike in Linux, -supply is not automatically appended to regulator
requests. Add it.
Fixes:
2645bc0e12 ("arm: layerscape: Add sfp driver")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Mario Kicherer [Wed, 1 Feb 2023 06:16:22 +0000 (14:16 +0800)]
armv7: ls102xa: make QSPI clock selection optional during SoC init
To improve startup times when booting from QSPI flash, the QSPI frequency
can be configured very early in the boot process [1] to reduce loading
times of U-Boot itself. This patch adds an option to disable setting the
frequency to a default value during SoC initialization.
[1] https://www.nxp.com/docs/en/application-note/AN12279.pdf
Signed-off-by: Mario Kicherer <dev@kicherer.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Fri, 13 Jan 2023 01:00:06 +0000 (22:00 -0300)]
ls1021atsn: Suggest the NXP RCW github repo
As explained in the text at the bottom of the page
https://source.codeaurora.org/external/qoriq/qoriq-components/rcw:
"QUIC repositories on this site will not receive any updates after
March 31, 2022, and will be deleted on March 31, 2023."
Point to the NXP RCW github repo instead.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Tue, 31 Jan 2023 23:28:07 +0000 (18:28 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Tue, 31 Jan 2023 23:18:22 +0000 (18:18 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-pmic
Oleksandr Suvorov [Mon, 16 Jan 2023 15:21:27 +0000 (17:21 +0200)]
arm: dts: imx8mn-u-boot: use versioned ddr4 firmware
NXP tested imx8mn-ddr4 with firmware version 201810 only. Use this
version for all imx8mn targets with DRAM DDR4.
Fixes:
93c4c0e4dd1 ("arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Manoj Sai [Mon, 28 Nov 2022 11:45:31 +0000 (17:15 +0530)]
configs: imx8mp_evk: revert to old ram settings
The 'commit
864ac2cf383e ("board: imx8mp: Add Engicam
i.Core MX8M Plus EDIMM2.2 Starter Kit")' has changed the imx8mp evk ram
settings from 6GB ram to 2GB.
This changeset reverts the above change.
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Reported-by : Peter Bergin <peter@berginkonsult.se>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Arnaud Ferraris [Thu, 15 Dec 2022 14:51:17 +0000 (15:51 +0100)]
imx8mq_pins: fix configuration for UART4 on ECSPI2 pads
When routing UART4 using the ECSPI2 pads, register
IOMUXC_UART4_RXD_SELECT_INPUT (offset 0x050C) should be changed only
when dealing with RX, as its name suggests.
Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Ye Li [Tue, 13 Dec 2022 04:08:02 +0000 (05:08 +0100)]
imx8: scu_api: sync sc_rm_is_pad_owned api change
SCFW has fixed a overflow issue in sc_rm_is_pad_owned API. This
requires u-boot to update API implementation, since it will cause
compatible issue. Otherwise all pad checking will have problem and
cause pad setting not continue.
Due to the compatible issue, the new u-boot only works with new
SCFW (API version: 1.21 and later).
old scfw + old u-boot: API overflow issue
old scfw + new u-boot, or new scfw + old u-boot: API compatible issue
new scfw + new u-boot: Working
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Jason Liu <Jason.hui.liu@nxp.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Michael Trimarchi [Fri, 9 Dec 2022 09:35:49 +0000 (15:05 +0530)]
engicam: imx6: migrate to DM_SERIAL
Add the needed DT overrides and configs to enable UART in SPL.
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Adam Ford [Sat, 19 Nov 2022 19:30:08 +0000 (13:30 -0600)]
configs: imx8mn_beacon_fspi: Add config for booting from QSPI
The imx8mn-beacon SOM has a QSPI part on it connected to the
FlexSPI controller. Add a defconfig option which supports
booting from the QSPI NOR flash instead of sd/mmc.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 19 Nov 2022 15:11:03 +0000 (09:11 -0600)]
configs: imx8m: Prepare imx8m-beacon boards for HAB support
In order to enable HAB, FSL_CAAM, ARCH_MISC_INIT and
SPL_CRYPTO should be enabled in Kconfig like other i.MX8M
boards.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tim Harvey [Fri, 11 Nov 2022 16:03:07 +0000 (08:03 -0800)]
board: gateworks: venice: poll I2C lines to wait for GSC firmware
In some situations the GSC firmware where the EEPROM containing the
model and DRAM configuration may not be ready by the time the SoC
is ready to talk to it over I2C.
Instead of a hard delay, poll the I2C lines to wait until they are
released to avoid the I2C drivers 'Arbitation lost' error message.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tim Harvey [Fri, 11 Nov 2022 16:03:06 +0000 (08:03 -0800)]
arm: dts: imx8m*-venice-*: add I2C GPIO bus recovery support
Add I2C GPIO bus recovery support by adding scl-gpios and sda-gpios for the
various I2C busses on Gateworks Venice boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tim Harvey [Fri, 11 Nov 2022 15:55:46 +0000 (07:55 -0800)]
arm64: dts: imx8m{m, n}-venice-gw7902: add gpio pins for new board revision
Add gpio pins present on new board revision:
* LTE modem support (imx8mm-gw7902 only)
- lte_pwr#
- lte_rst
- lte_int
* M2 power enable
- m2_pwr_en
* off-board 4.0V supply
- vdd_4p0_en
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Peng Fan [Mon, 7 Nov 2022 08:13:38 +0000 (16:13 +0800)]
imx: mx6sabresd: convert to DM_I2C
Convert to DM_I2C
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 7 Nov 2022 08:13:37 +0000 (16:13 +0800)]
imx: mx6sabreauto: convert to DM_I2C
Convert to DM_I2C
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Tue, 31 Jan 2023 15:15:39 +0000 (10:15 -0500)]
Merge tag 'u-boot-amlogic-
20230131' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- jethub j100: add rescue boot from microSD
- move meson sm command to cmd/meson and add efusedump sub-command
- switch dwc2 otg to DM for G12A, GXL & AXG
- Add new boards:
- Odroid Go Ultra
- Odroid-N2L
Fabio Estevam [Fri, 13 Jan 2023 00:52:23 +0000 (21:52 -0300)]
imx: Suggest the NXP ATF github repo
As explained in the text at the bottom of the page
https://source.codeaurora.org/external/imx/imx-atf:
"QUIC repositories on this site will not receive any updates after
March 31, 2022, and will be deleted on March 31, 2023."
Point to the NXP ATF github repo instead.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Peter Robinson [Mon, 14 Nov 2022 22:07:54 +0000 (22:07 +0000)]
include/configs: mx6/mx7: drop dangling comments
Cleanup some dangling comments left by automated migration
processes that are no longer value.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Max Krummenacher [Mon, 30 Jan 2023 12:39:06 +0000 (13:39 +0100)]
ARM: arm: colibri-imx6ull-emmc: fix emmc access
Synchronizing the device tree with linux introduced a regression.
The U-Boot specific dtsi mustn't override the alias settings for
the eMMC/SD interfaces.
Without this U-Boot cannot access the eMMC and boot the kernel.
Fixes:
c21b61bff15 ("colibri-imx6ull/-emmc: synchronise device tree with linux")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Andrejs Cainikovs [Tue, 17 Jan 2023 14:29:11 +0000 (15:29 +0100)]
board: apalis-imx8: add 2nd ethernet address
All Apalis iMX8 variants have 2nd RGMII on SoC, so add the address
for 2nd ethernet.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Marek Vasut [Thu, 22 Dec 2022 00:46:43 +0000 (01:46 +0100)]
arm: imx: imx8m: Add basic PSCI provider implementation
Implement basic PSCI provider to let OS turn CPU cores off and on,
power off and restart the system and determine PSCI version. This
is sufficient to remove the need for the ATF BL31 blob altogether.
To make use of this functionality, active the following Kconfig options:
# CONFIG_PSCI_RESET is not set
CONFIG_ARMV8_MULTIENTRY=y
CONFIG_ARMV8_SET_SMPEN=y
CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y
CONFIG_ARMV8_EA_EL3_FIRST=y
CONFIG_ARMV8_PSCI=y
CONFIG_ARMV8_PSCI_CPUS_PER_CLUSTER=4
CONFIG_ARMV8_SECURE_BASE=0x970000
CONFIG_ARM_SMCCC=y
CONFIG_SYS_HAS_ARMV8_SECURE_BASE=y
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 22 Dec 2022 00:46:42 +0000 (01:46 +0100)]
arm: imx: imx8m: Program CSU and TZASC if PSCI provider
In case U-Boot is the PSCI provider, it is necessary to correctly
program CSU and TZASC registers. Those are poorly documented, so
push in the correct values.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 22 Dec 2022 00:46:41 +0000 (01:46 +0100)]
arm: imx: imx8m: Define trampoline location if PSCI provider
The common code used to bring up secondary cores requires a final
jump location to be stored in some sort of memory location, define
this memory location to be the start of OCRAM, since it is available.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 22 Dec 2022 00:46:40 +0000 (01:46 +0100)]
arm: imx: imx8m: Map RAM as NS if PSCI provider
In case U-Boot is a PSCI provider, map RAM explicitly as NS,
otherwise secondary cores crash with SError when attempting
to access RAM mapped as secure in EL2.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 22 Dec 2022 00:46:39 +0000 (01:46 +0100)]
arm: imx: imx8m: Enable GICv3 support if PSCI provider
In case U-Boot is a PSCI provider, enable GICv3 support as this
is necessary to bring up secondary cores.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 22 Dec 2022 00:46:38 +0000 (01:46 +0100)]
arm: imx: imx8m: Only use ROM pointers if not PSCI provider
The ROM pointers are in fact populated by the ATF BL31 blob, in case
U-Boot itself if the PSCI provider, there is no ATF BL31 blob, hence
ignore the ROM pointers.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 22 Dec 2022 00:46:37 +0000 (01:46 +0100)]
arm: dts: imx8m: Require ATF BL31 blob only if not PSCI provider
In case U-Boot itself if the PSCI provider on i.MX8M, do not
require the ATF BL31 blob, as at that point the blob is useless
and would interfere with U-Boot operation.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 22 Dec 2022 00:46:36 +0000 (01:46 +0100)]
arm: imx: Drop custom lowlevel_init
The custom lowlevel_init implementation is no longer necessary, since
it is responsible for routing and trapping SErrors in U-Boot in EL2,
which is implemented in common code since commit:
6c7691edd55 ("armv8: Always unmask SErrors")
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 22 Dec 2022 00:46:35 +0000 (01:46 +0100)]
arm: psci: Fix RESET2 hook
The RESET2 hook is a PSCI v1.1 functionality, rename the macro accordinly.
Add missing handler for the RESET2 hook, so it can be implemented by U-Boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 22 Dec 2022 00:46:34 +0000 (01:46 +0100)]
arm: psci: Add PSCI v1.1 macro
Add macro representing the PSCI v1.1 .
Signed-off-by: Marek Vasut <marex@denx.de>
Detlev Casanova [Thu, 8 Dec 2022 18:15:52 +0000 (13:15 -0500)]
imx6q-sabrelite: Re-add mmc aliases
In commit
d0399a46e7cda63c07e3eb8558bef84cfb068028, the device tree was
synchronized from linux and the aliases were dropped.
They need to be kept so that the mmc cards are in the right order.
Without the aliases, u-boot reports:
MMC: FSL_SDHC: 2, FSL_SDHC: 3
With the aliases, u-boot reports:
MMC: FSL_SDHC: 0, FSL_SDHC: 1
The upstream linux device tree does not contain the same aliases than
u-boot (It keeps the devices order with /dev/mmcblk2 and /dev/mmcblk3).
Because this board has been using different aliases in u-boot
and linux, a imx6q-sabrelite-u-boot.dtsi file is added to be
automatically included in imx6q-sabrelite.dts.
This way, linux and u-boot each keep their own aliases and there
is no breakage on current installations.
This should never be done for new boards as we want to keep linux and
u-boot with the same aliases as much as possible.
This patch is only necessary to avoid breaking existing setups.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Frieder Schrempf [Mon, 14 Nov 2022 12:01:38 +0000 (13:01 +0100)]
imx: imx6ul: kontron-sl-mx6ul: Disable CONFIG_FSL_QSPI_AHB_FULL_MAP to fix SPI NAND read access
The introduction of CONFIG_FSL_QSPI_AHB_FULL_MAP as default in:
def88bce094e ("spi: fsl_qspi: Support to use full AHB space on i.MX")
broke the SPI NAND read access on the Kontron SL i.MX6UL/ULL boards.
Reading data from the flash returns garbage instead of the actual
content. Fix this for now by disabling the introduced option.
In the long run this should be fixed globally.
Fixes:
def88bce094e ("spi: fsl_qspi: Support to use full AHB space on i.MX")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
John Keeping [Thu, 19 Jan 2023 12:56:12 +0000 (12:56 +0000)]
power: act8846_pmic: fix number of registers
The highest register on ACT8846 is 0xf5, so set the number of registers
to 0xf6, ensuring that the pmic read/write commands are able to access
all of the supported registers (and many that are not valid, since the
register space is quite sparse).
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Ashok Reddy Soma [Tue, 10 Jan 2023 11:31:24 +0000 (04:31 -0700)]
mmc: zynq_sdhci: Add support and quirk for HS400
Add support for HS400 in mode2timing array.
Add a quirk for Versal NET platform to indicate that HS400 is supported
through bit63 of capability register.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Ashok Reddy Soma [Tue, 10 Jan 2023 11:31:23 +0000 (04:31 -0700)]
mmc: sdhci: Enable HS400 support if available in caps
HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Ashok Reddy Soma [Tue, 10 Jan 2023 11:31:22 +0000 (04:31 -0700)]
mmc: sdhci: Check and call config_dll callback functions
Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Ashok Reddy Soma [Tue, 10 Jan 2023 11:31:21 +0000 (04:31 -0700)]
mmc: zynq_sdhci: Add support for eMMC5.1 for Versal NET platform
Add support for eMMC 5.1 for Versal NET platform
- Add new compatible string(xlnx,versal-net-5.1-emmc).
- Add CONFIG_ARCH_VERSAL_NET condition wherever required.
- Add DLL and Delay Chain mode support
- Add input and output tap delays for eMMC.
- Add Strobe select tap for HS400 mode.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Marek Vasut [Thu, 5 Jan 2023 14:19:08 +0000 (15:19 +0100)]
cmd: mmc: Expand bkops handling
Add more capable "bkops" command which allows enabling and disabling both
manual and automatic bkops. The existing 'mmc bkops-enable' subcommand is
poorly named to cover all the possibilities, hence the new-ish subcommand.
Note that both commands are wrappers around the same common code.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Peng Fan [Mon, 7 Nov 2022 08:00:15 +0000 (16:00 +0800)]
imx: mx6sabreauto_defconfig: select DM_SERIAL
Select DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 7 Nov 2022 08:00:16 +0000 (16:00 +0800)]
imx: mx6sabresd: select DM_SERIAL
Select DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 7 Nov 2022 08:00:14 +0000 (16:00 +0800)]
imx: mx6sxsabreauto: select DM_SERIAL
Select DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 7 Nov 2022 08:00:13 +0000 (16:00 +0800)]
imx: mx6ul_evk: select DM_SERIAL
Select DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 7 Nov 2022 08:00:12 +0000 (16:00 +0800)]
imx: mx6slevk: select DM_SERIAL
Select DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 7 Nov 2022 08:00:11 +0000 (16:00 +0800)]
imx: mx6sllevk: select DM_SERIAL
Select DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 7 Nov 2022 08:00:10 +0000 (16:00 +0800)]
imx: mx6sllevk: correct pmic name
The prefix 0 has been dropped in dts, so correct in board file
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 7 Nov 2022 08:00:09 +0000 (16:00 +0800)]
imx: mx6ull/z_14x14_evk: clean up UART iomux
After DM_SERIAL, and set pinctrl_uart1 as pre-reloc, no need initialize
iomux at board file.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 7 Nov 2022 08:00:08 +0000 (16:00 +0800)]
imx: mx6ulz: select DM_SERIAL
Select DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 7 Nov 2022 08:00:07 +0000 (16:00 +0800)]
imx: mx6ull_14x14_evk: select DM_SERIAL
Select DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Tue, 3 Jan 2023 13:19:40 +0000 (10:19 -0300)]
pico-imx7d: Convert to DM_I2C and DM_PMIC
The conversion to DM_I2C is mandatory, so convert to it
and also to DM_PMIC.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Tue, 3 Jan 2023 13:19:38 +0000 (10:19 -0300)]
pico-imx7d: Convert to CONFIG_DM_SERIAL
The conversion to CONFIG_DM_SERIAL is mandatory, so select
this option.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Marek Vasut [Thu, 19 Jan 2023 21:46:11 +0000 (22:46 +0100)]
arm64: imx8mp: Enable SMSC LAN87xx PHY driver on i.MX8MP DHCOM
These SoMs may ship with SMSC LAN8740Ai PHYs, enable the SMSC PHY driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 19 Jan 2023 21:46:10 +0000 (22:46 +0100)]
arm64: imx8mp: Disable Atheros PHY driver on i.MX8MP DHCOM
These SoMs never ship with Atheros PHYs, disable the Atheros PHY driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Ye Li [Wed, 18 Jan 2023 09:31:15 +0000 (17:31 +0800)]
ARM: dts: imx8ulp-evk: Fix iomuxc issue
The property fsl,mux_mask is deleted by commit ed7bda5 (imx8ulp:
synchronise device tree with linux). This causes the pinctrl
driver not work on 8ULP, so fail to print any log.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Ying-Chun Liu (PaulLiu) [Tue, 17 Jan 2023 19:15:00 +0000 (03:15 +0800)]
dts: imx8mp-rsb3720: modify configrations to load fip into memory
The changes of commit
6a21c695213b ("arm: dts: imx8mp: add of-list
support to common imx8mp-u-boot.dtsi") breaks the loading of the fip.
This commit fixes the break by modify the configuration properly.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Ying-Chun Liu (PaulLiu) [Tue, 17 Jan 2023 19:14:59 +0000 (03:14 +0800)]
dts: imx8mp: assign binman_configuration label to config-SEQ
assign a label for config-SEQ so that the board dts can modify
the configuration more easily.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Mon, 16 Jan 2023 12:32:11 +0000 (09:32 -0300)]
mx53loco: Select CONFIG_CMD_EXT4
Select the CONFIG_CMD_EXT4 option so that files can be loaded
from an ext4 partition.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Loic Poulain [Thu, 12 Jan 2023 17:19:51 +0000 (18:19 +0100)]
serial: mxc: Speed-up character transmission
Instead of waiting for empty FIFO condition before writing a
character, wait for non-full FIFO condition.
This helps in saving several tens of milliseconds during boot
(depending verbosity).
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Tested-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Fabio Estevam <festevam@denx.de>
Loic Poulain [Thu, 12 Jan 2023 17:19:50 +0000 (18:19 +0100)]
serial: mxc: Wait for TX completion before reset
The u-boot console may show some corrupted characters when
printing in board_init() due to reset or baudrate change
of the UART (probe) before the TX FIFO has been completely
drained.
To fix this issue, and in case UART is still running, we now
try to flush the FIFO before proceeding to UART reinitialization.
For this we're waiting for Transmitter Complete bit, indicating
that the FIFO and the shift register are empty.
flushing has a 4ms timeout guard, which is normally more than
enough to consume the FIFO @ low baudrate (9600bps).
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Tested-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Wed, 11 Jan 2023 12:22:58 +0000 (09:22 -0300)]
pico-imx7d: Add support for the 2GB variant
Add the board detection mechanism to be able to support
the 2GB variant.
Based on the code from TechNexion U-Boot downstream tree.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Tue, 10 Jan 2023 20:18:08 +0000 (17:18 -0300)]
imx8mm-phg: Add board support
Add the board support for the i.MX8MM Cloos PHG board.
This board uses a imx8mm-tqma8mqml SoM from TQ-Group.
imx8mm-phg.dts and imx8mm-tqma8mqml.dtsi are taken
directly from Linux 6.2-rc3.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>