David Edelsohn [Mon, 22 Jun 2020 21:27:18 +0000 (21:27 +0000)]
build: Use -include instead of conditional include.
Automake and GNU Make both use the endif keyword, which conflicts and
elicits an error for matching if/ifdef and endif.
This patch changes the conditional include to use "-include" to prevent
a warning about a possible empty tmake_file.
libgomp/ChangeLog
2020-06-22 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am: Use -include.
* Makefile.in: Regenerate.
libatomic/ChangeLog
2020-06-22 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am: Use -include.
* Makefile.in: Regenerate.
libstdc++-v3/ChangeLog
2020-06-22 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am: Use -include.
* Makefile.in: Regenerate.
libgfortran/ChangeLog
2020-06-22 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am: Use -include.
* Makefile.in: Regenerate.
Segher Boessenkool [Mon, 22 Jun 2020 20:16:37 +0000 (20:16 +0000)]
rs6000: Testsuite changes to go with the previous commit
The "sanity checker" thinks it knows better than maintainers, and there
is no override.
2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/cfuged-0.c: I protest.
* gcc.target/powerpc/cfuged-1.c: I protest.
* gcc.target/powerpc/clone3.c: I protest.
* gcc.target/powerpc/cntlzdm-0.c: I protest.
* gcc.target/powerpc/cntlzdm-1.c: I protest.
* gcc.target/powerpc/cnttzdm-0.c: I protest.
* gcc.target/powerpc/cnttzdm-1.c: I protest.
* gcc.target/powerpc/cpu-future.c: I protest.
* gcc.target/powerpc/dg-future-0.c: I protest.
* gcc.target/powerpc/dg-future-1.c: I protest.
* gcc.target/powerpc/localentry-1.c: I protest.
* gcc.target/powerpc/localentry-detect-1.c: I protest.
* gcc.target/powerpc/mma-builtin-1.c: I protest.
* gcc.target/powerpc/mma-builtin-2.c: I protest.
* gcc.target/powerpc/mma-builtin-3.c: I protest.
* gcc.target/powerpc/mma-builtin-4.c: I protest.
* gcc.target/powerpc/mma-builtin-5.c: I protest.
* gcc.target/powerpc/mma-builtin-6.c: I protest.
* gcc.target/powerpc/notoc-direct-1.c: I protest.
* gcc.target/powerpc/pcrel-sibcall-1.c: I protest.
* gcc.target/powerpc/pdep-0.c: I protest.
* gcc.target/powerpc/pdep-1.c: I protest.
* gcc.target/powerpc/pextd-0.c: I protest.
* gcc.target/powerpc/pextd-1.c: I protest.
* gcc.target/powerpc/pr93122.c: I protest.
* gcc.target/powerpc/pr94740.c: I protest.
* gcc.target/powerpc/setbceq.c: I protest.
* gcc.target/powerpc/setbcge.c: I protest.
* gcc.target/powerpc/setbcgt.c: I protest.
* gcc.target/powerpc/setbcle.c: I protest.
* gcc.target/powerpc/setbclt.c: I protest.
* gcc.target/powerpc/setbcne.c: I protest.
* gcc.target/powerpc/setnbceq.c: I protest.
* gcc.target/powerpc/setnbcge.c: I protest.
* gcc.target/powerpc/setnbcgt.c: I protest.
* gcc.target/powerpc/setnbcle.c: I protest.
* gcc.target/powerpc/setnbclt.c: I protest.
* gcc.target/powerpc/setnbcne.c: I protest.
* gcc.target/powerpc/vec-cfuged-0.c: I protest.
* gcc.target/powerpc/vec-cfuged-1.c: I protest.
* gcc.target/powerpc/vec-clrl-0.c: I protest.
* gcc.target/powerpc/vec-clrl-1.c: I protest.
* gcc.target/powerpc/vec-clrl-2.c: I protest.
* gcc.target/powerpc/vec-clrl-3.c: I protest.
* gcc.target/powerpc/vec-clrr-0.c: I protest.
* gcc.target/powerpc/vec-clrr-1.c: I protest.
* gcc.target/powerpc/vec-clrr-2.c: I protest.
* gcc.target/powerpc/vec-clrr-3.c: I protest.
* gcc.target/powerpc/vec-cntlzm-0.c: I protest.
* gcc.target/powerpc/vec-cntlzm-1.c: I protest.
* gcc.target/powerpc/vec-cnttzm-0.c: I protest.
* gcc.target/powerpc/vec-cnttzm-1.c: I protest.
* gcc.target/powerpc/vec-extracth-0.c: I protest.
* gcc.target/powerpc/vec-extracth-1.c: I protest.
* gcc.target/powerpc/vec-extracth-2.c: I protest.
* gcc.target/powerpc/vec-extracth-3.c: I protest.
* gcc.target/powerpc/vec-extracth-4.c: I protest.
* gcc.target/powerpc/vec-extracth-5.c: I protest.
* gcc.target/powerpc/vec-extracth-6.c: I protest.
* gcc.target/powerpc/vec-extracth-7.c: I protest.
* gcc.target/powerpc/vec-extracth-be-0.c: I protest.
* gcc.target/powerpc/vec-extracth-be-1.c: I protest.
* gcc.target/powerpc/vec-extracth-be-2.c: I protest.
* gcc.target/powerpc/vec-extracth-be-3.c: I protest.
* gcc.target/powerpc/vec-extractl-0.c: I protest.
* gcc.target/powerpc/vec-extractl-1.c: I protest.
* gcc.target/powerpc/vec-extractl-2.c: I protest.
* gcc.target/powerpc/vec-extractl-3.c: I protest.
* gcc.target/powerpc/vec-extractl-4.c: I protest.
* gcc.target/powerpc/vec-extractl-5.c: I protest.
* gcc.target/powerpc/vec-extractl-6.c: I protest.
* gcc.target/powerpc/vec-extractl-7.c: I protest.
* gcc.target/powerpc/vec-extractl-be-0.c: I protest.
* gcc.target/powerpc/vec-extractl-be-1.c: I protest.
* gcc.target/powerpc/vec-extractl-be-2.c: I protest.
* gcc.target/powerpc/vec-extractl-be-3.c: I protest.
* gcc.target/powerpc/vec-gnb-0.c: I protest.
* gcc.target/powerpc/vec-gnb-1.c: I protest.
* gcc.target/powerpc/vec-gnb-2.c: I protest.
* gcc.target/powerpc/vec-pdep-0.c: I protest.
* gcc.target/powerpc/vec-pdep-1.c: I protest.
* gcc.target/powerpc/vec-pext-0.c: I protest.
* gcc.target/powerpc/vec-pext-1.c: I protest.
* gcc.target/powerpc/vec-stril-0.c: I protest.
* gcc.target/powerpc/vec-stril-1.c: I protest.
* gcc.target/powerpc/vec-stril-10.c: I protest.
* gcc.target/powerpc/vec-stril-11.c: I protest.
* gcc.target/powerpc/vec-stril-12.c: I protest.
* gcc.target/powerpc/vec-stril-13.c: I protest.
* gcc.target/powerpc/vec-stril-14.c: I protest.
* gcc.target/powerpc/vec-stril-15.c: I protest.
* gcc.target/powerpc/vec-stril-16.c: I protest.
* gcc.target/powerpc/vec-stril-17.c: I protest.
* gcc.target/powerpc/vec-stril-18.c: I protest.
* gcc.target/powerpc/vec-stril-19.c: I protest.
* gcc.target/powerpc/vec-stril-2.c: I protest.
* gcc.target/powerpc/vec-stril-20.c: I protest.
* gcc.target/powerpc/vec-stril-21.c: I protest.
* gcc.target/powerpc/vec-stril-22.c: I protest.
* gcc.target/powerpc/vec-stril-23.c: I protest.
* gcc.target/powerpc/vec-stril-3.c: I protest.
* gcc.target/powerpc/vec-stril-4.c: I protest.
* gcc.target/powerpc/vec-stril-5.c: I protest.
* gcc.target/powerpc/vec-stril-6.c: I protest.
* gcc.target/powerpc/vec-stril-7.c: I protest.
* gcc.target/powerpc/vec-stril-8.c: I protest.
* gcc.target/powerpc/vec-stril-9.c: I protest.
* gcc.target/powerpc/vec-stril_p-0.c: I protest.
* gcc.target/powerpc/vec-stril_p-1.c: I protest.
* gcc.target/powerpc/vec-stril_p-10.c: I protest.
* gcc.target/powerpc/vec-stril_p-11.c: I protest.
* gcc.target/powerpc/vec-stril_p-2.c: I protest.
* gcc.target/powerpc/vec-stril_p-3.c: I protest.
* gcc.target/powerpc/vec-stril_p-4.c: I protest.
* gcc.target/powerpc/vec-stril_p-5.c: I protest.
* gcc.target/powerpc/vec-stril_p-6.c: I protest.
* gcc.target/powerpc/vec-stril_p-7.c: I protest.
* gcc.target/powerpc/vec-stril_p-8.c: I protest.
* gcc.target/powerpc/vec-stril_p-9.c: I protest.
* gcc.target/powerpc/vec-strir-0.c: I protest.
* gcc.target/powerpc/vec-strir-1.c: I protest.
* gcc.target/powerpc/vec-strir-10.c: I protest.
* gcc.target/powerpc/vec-strir-11.c: I protest.
* gcc.target/powerpc/vec-strir-12.c: I protest.
* gcc.target/powerpc/vec-strir-13.c: I protest.
* gcc.target/powerpc/vec-strir-14.c: I protest.
* gcc.target/powerpc/vec-strir-15.c: I protest.
* gcc.target/powerpc/vec-strir-16.c: I protest.
* gcc.target/powerpc/vec-strir-17.c: I protest.
* gcc.target/powerpc/vec-strir-18.c: I protest.
* gcc.target/powerpc/vec-strir-19.c: I protest.
* gcc.target/powerpc/vec-strir-2.c: I protest.
* gcc.target/powerpc/vec-strir-20.c: I protest.
* gcc.target/powerpc/vec-strir-21.c: I protest.
* gcc.target/powerpc/vec-strir-22.c: I protest.
* gcc.target/powerpc/vec-strir-23.c: I protest.
* gcc.target/powerpc/vec-strir-3.c: I protest.
* gcc.target/powerpc/vec-strir-4.c: I protest.
* gcc.target/powerpc/vec-strir-5.c: I protest.
* gcc.target/powerpc/vec-strir-6.c: I protest.
* gcc.target/powerpc/vec-strir-7.c: I protest.
* gcc.target/powerpc/vec-strir-8.c: I protest.
* gcc.target/powerpc/vec-strir-9.c: I protest.
* gcc.target/powerpc/vec-strir_p-0.c: I protest.
* gcc.target/powerpc/vec-strir_p-1.c: I protest.
* gcc.target/powerpc/vec-strir_p-10.c: I protest.
* gcc.target/powerpc/vec-strir_p-11.c: I protest.
* gcc.target/powerpc/vec-strir_p-2.c: I protest.
* gcc.target/powerpc/vec-strir_p-3.c: I protest.
* gcc.target/powerpc/vec-strir_p-4.c: I protest.
* gcc.target/powerpc/vec-strir_p-5.c: I protest.
* gcc.target/powerpc/vec-strir_p-6.c: I protest.
* gcc.target/powerpc/vec-strir_p-7.c: I protest.
* gcc.target/powerpc/vec-strir_p-8.c: I protest.
* gcc.target/powerpc/vec-strir_p-9.c: I protest.
* gcc.target/powerpc/vec-ternarylogic-0.c: I protest.
* gcc.target/powerpc/vec-ternarylogic-1.c: I protest.
* gcc.target/powerpc/vec-ternarylogic-10.c: I protest.
* gcc.target/powerpc/vec-ternarylogic-2.c: I protest.
* gcc.target/powerpc/vec-ternarylogic-3.c: I protest.
* gcc.target/powerpc/vec-ternarylogic-4.c: I protest.
* gcc.target/powerpc/vec-ternarylogic-5.c: I protest.
* gcc.target/powerpc/vec-ternarylogic-6.c: I protest.
* gcc.target/powerpc/vec-ternarylogic-7.c: I protest.
* gcc.target/powerpc/vec-ternarylogic-8.c: I protest.
* gcc.target/powerpc/vec-ternarylogic-9.c: I protest.
* gcc.target/powerpc/xxgenpc-runnable.c: I protest.
* lib/target-supports.exp: Stuff.
Segher Boessenkool [Mon, 22 Jun 2020 20:15:46 +0000 (20:15 +0000)]
rs6000: Rename future to power10
This renames the command line options, the internal names, and mentions
in the comments, from "future" to "power10". Also, the file "future.md"
is renamed.
The predefined user macro _ARCH_PWR_FUTURE is renamed to _ARCH_PWR10.
"Future architecture" is renamed to "ISA 3.1".
2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
gcc/ChangeLog:
* config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
Update comment for ISA 3.1.
* config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
* config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
on AIX, and -mpower10 elsewhere.
* config/rs6000/future.md: Delete.
* config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
TARGET_FUTURE.
* config/rs6000/power10.md: New file.
* config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
PPC_PLATFORM_FUTURE.
* config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
Use BU_P10_* instead of BU_FUTURE_*.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
_ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
(altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
FUTURE_BUILTIN_VEC_XXEVAL.
* config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
Update compiler messages.
* config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
* config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
PROCESSOR_FUTURE.
* config/rs6000/rs6000-string.c: Ditto.
* config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
instead of "future", reorder it to right after "power9".
* config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
not ISA_FUTURE_MASKS_SERVER.
(rs6000_opt_masks): Use "power10" instead of "future".
(rs6000_builtin_mask_names): Ditto.
(rs6000_disable_incompatible_switches): Ditto.
* config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
-mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
not RS6000_BTM_FUTURE.
* config/rs6000/rs6000.md: Use "power10", not "future". Use
TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
"future.md".
* config/rs6000/rs6000.opt (mfuture): Delete.
(mpower10): New.
* config/rs6000/t-rs6000: Use "power10.md", not "future.md".
* config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
Joseph Myers [Mon, 22 Jun 2020 20:52:57 +0000 (20:52 +0000)]
Update gcc sv.po.
* sv.po: Update.
Richard Sandiford [Mon, 22 Jun 2020 19:15:36 +0000 (20:15 +0100)]
recog: Restore builds with Clang
Using parameter packs with function typedefs tripped a Clang bug
in which the packs were not being expanded correctly:
https://bugs.llvm.org/show_bug.cgi?id=46377
Work around that by going back to the decltype approach, but adding
a cast to void to suppress a warning about unused values.
2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* coretypes.h (first_type): Delete.
* recog.h (insn_gen_fn::operator()): Go back to using a decltype.
Srinath Parvathaneni [Mon, 22 Jun 2020 16:11:19 +0000 (17:11 +0100)]
arm: Fix the failing mve scalar shift execution tests.
In GCC testsuite the MVE scalar shift execution tests (mve_scalar_shifts[1-4].c) are failings
because of executing them on target hardware which doesn't support MVE instructions. This patch
restricts those tests to execute only on target hardware that support MVE instructions.
2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
gcc/
* doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
(arm_mve_hw): Likewise.
gcc/testsuite/
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts1.c: Modify.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts2.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts3.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts4.c: Likewise.
* lib/target-supports.exp (check_effective_target_arm_mve_hw): Define.
Mark Eggleston [Mon, 22 Jun 2020 12:35:01 +0000 (13:35 +0100)]
Fortran : ICE in resolve_fl_procedure PR95708
Now issues an error "Intrinsic procedure 'num_images' not
allowed in PROCEDURE" instead of an ICE.
2020-06-22 Steven G. Kargl <kargl@gcc.gnu.org>
gcc/fortran/
PR fortran/95708
* intrinsic.c (add_functions): Replace CLASS_INQUIRY with
CLASS_TRANSFORMATIONAL for intrinsic num_images.
(make_generic): Replace ACTUAL_NO with ACTUAL_YES for
intrinsic team_number.
* resolve.c (resolve_fl_procedure): Check pointer ts.u.derived
exists before using it.
2020-06-22 Mark Eggleston <markeggleston@gcc.gnu.org>
gcc/testsuite/
PR fortran/95708
* gfortran.dg/pr95708.f90: New test.
H.J. Lu [Sat, 20 Jun 2020 23:02:42 +0000 (16:02 -0700)]
x86: Skip EXT_REX_SSE_REG_P for vzeroupper optimization
Skip EXT_REX_SSE_REG_P for vzeroupper optimization since upper 16 vector
registers don't trigger SSE <-> AVX transition penalty.
gcc/
PR target/95791
* config/i386/i386.c (ix86_dirflag_mode_needed): Skip
EXT_REX_SSE_REG_P.
gcc/testsuite/
PR target/95791
* gcc.target/i386/pr95791.c: New test.
Mark Eggleston [Thu, 11 Jun 2020 05:42:36 +0000 (06:42 +0100)]
Fortran : ICE in gfc_check_reshape PR95585
Issue an error where an array is used before its definition
instead of an ICE.
2020-06-22 Steven G. Kargl <kargl@gcc.gnu.org>
gcc/fortran/
PR fortran/95585
* check.c (gfc_check_reshape): Add check for a value when
the symbol has an attribute flavor FL_PARAMETER.
2020-06-22 Mark Eggleston <markeggleston@gcc.gnu.org>
gcc/testsuite/
PR fortran/95585
* gfortran.dg/pr95585.f90: New test.
Mark Eggleston [Wed, 10 Jun 2020 10:41:56 +0000 (11:41 +0100)]
Fortran : Missing gcc-internal-format PR42693
Messages in gfc_arith_error contain gcc internal format specifiers
which should be enclosed in G_() in order to be correctly translated.
2020-06-22 Mark Eggleston <markeggleston@gcc.gnu.org>
gcc/fortran/
PR fortran/42693
* arith.c (gfc_arith_error): Enclose strings in G_() instead
of _().
Richard Biener [Mon, 22 Jun 2020 10:14:54 +0000 (12:14 +0200)]
tree-optimization/95770 - fix SLP vectorized stmt placement compute
This fixes the vectorized stmt placement compute for the case of
external defs.
2020-06-22 Richard Biener <rguenther@suse.de>
PR tree-optimization/95770
* tree-vect-slp.c (vect_schedule_slp_instance): Also consider
external defs.
* gcc.dg/pr95770.c: New testcase.
Andrew Stubbs [Tue, 31 Mar 2020 16:46:17 +0000 (17:46 +0100)]
amdgcn: Pass vector parameters in memory
gcc/ChangeLog:
* config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
(gcn_return_in_memory): Return vectors in memory.
Jakub Jelinek [Mon, 22 Jun 2020 09:06:08 +0000 (11:06 +0200)]
openmp: Compute triangular loop number of iterations at compile time
2020-06-22 Jakub Jelinek <jakub@redhat.com>
* omp-general.c (omp_extract_for_data): For triangular loops with
all loop invariant expressions constant where the innermost loop is
executed at least once compute number of iterations at compile time.
Kito Cheng [Fri, 19 Jun 2020 08:59:52 +0000 (16:59 +0800)]
RISC-V: Normalize arch string in driver time
- Normalize arch string would help the multi-lib handling, e.g. rv64gc and
rv64g_c are both valid and same arch, but latter one would confuse
the detection of multi-lib, earlier normalize can resolve this issue.
gcc/ChangeLog:
* config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
(DRIVER_SELF_SPECS): New.
Kito Cheng [Fri, 19 Jun 2020 06:07:39 +0000 (14:07 +0800)]
RISC-V: Fix compilation failed for frflags builtin in C++ mode
- g++ will complain too few arguments for frflags builtin like bellow
message:
error: too few arguments to function 'unsigned int __builtin_riscv_frflags(void)'
- However it's no arguments needed, it because we declare the function
type with VOID arguments, that seems like require a VOID argument
in the c++ front-end when GCC tried to resolve the function.
gcc/ChangeLog
* config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
(RISCV_FTYPE_ATYPES0): New.
(riscv_builtins): Using RISCV_USI_FTYPE for frflags.
* config/riscv/riscv-ftypes.def: Remove VOID argument.
gcc/testsuite/ChangeLog
* g++.target/riscv/frflags.C: New.
GCC Administrator [Mon, 22 Jun 2020 00:16:23 +0000 (00:16 +0000)]
Daily bump.
David Edelsohn [Fri, 15 May 2020 21:46:08 +0000 (17:46 -0400)]
aix: Add GCC64 configuration and FAT target libraries.
This patch adds the ability to configure GCC on AIX to build as a
64 bit application and to build target libraries "FAT" libraries in both
32 bit and 64 bit mode.
The patch adds makefile fragment hooks to target libraries that allows
them to include target-specific rules. The target specific rules for
AIX place both 32 bit and 64 bit objects and shared objects
in archives at the top-level, not multilib subdirectories. The
multilibs are built in subdirectories, but must be combined during the
last parts of the target library build process. Because of the way
that GCC bootstrap works, the libraries must be combined during the
multiple stages of GCC bootstrap, not solely when installed in the
final destination, so the libraries are correct at the end of
each target library build stage, not solely an install recipe.
gcc/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
* config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
(ASM_SPEC32): New.
(ASM_SPEC64): New.
(ASM_CPU_SPEC): Remove vsx and altivec options.
(CPP_SPEC_COMMON): Rename from CPP_SPEC.
(CPP_SPEC32): New.
(CPP_SPEC64): New.
(CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
(TARGET_DEFAULT): Only define if not BIARCH.
(LIB_SPEC_COMMON): Rename from LIB_SPEC.
(LIB_SPEC32): New.
(LIB_SPEC64): New.
(LINK_SPEC_COMMON): Rename from LINK_SPEC.
(LINK_SPEC32): New.
(LINK_SPEC64): New.
(STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
(ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
(CPP_SPEC): Same.
(CPLUSPLUS_CPP_SPEC): Same.
(LIB_SPEC): Same.
(LINK_SPEC): Same.
(SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
* config/rs6000/defaultaix64.h: New file.
* config/rs6000/t-aix64: New file.
libgcc/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* config.host (extra_parts): Add crtcxa_64 and crtdbase_64.
* config/rs6000/t-aix-cxa: Explicitly compile 32 bit with -maix32
and 64 bit with -maix64.
* config/rs6000/t-slibgcc-aix: Remove extra @multilib_dir@ level.
Build and install AIX-style FAT libraries.
libgomp/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
* Makefile.in: Regenerate
* configure.ac (tmake_file): Substitute.
* configure: Regenerate.
* configure.tgt (powerpc-ibm-aix*): Define tmake_file.
* config/t-aix: New file.
libstdc++-v3/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
* Makefile.in: Regenerate.
* configure.ac (tmake_file): Substitute.
* configure: Regenerate.
* configure.host (aix*): Define tmake_file.
* config/os/aix/t-aix: New file.
libatomic/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
* Makefile.in: Regenerate.
* configure.ac (tmake_file): Substitute.
* configure: Regenerate.
* configure.tgt (powerpc-ibm-aix*): Define tmake_file.
* config/t-aix: New file.
libgfortran/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
* Makefile.in: Regenerate.
* configure.ac (tmake_file): Substitute.
* configure: Regenerate.
* configure.host: Add system configury stanza. Define tmake_file.
* config/t-aix: New file.
Peter Bergner [Sun, 21 Jun 2020 04:23:02 +0000 (23:23 -0500)]
rs6000: Add MMA built-in function definitions and test cases.
Add the Matrix-Multiply Assist (MMA) built-ins. The MMA accumulators are
INOUT operands for most MMA instructions, but they are also very expensive
to move around. For this reason, we have implemented a built-in API where
the accumulators are passed using pass-by-reference/pointers, so the user
won't use one accumulator as input and another as output, which wouldentail
a lot of copies. However, using pointers gives us poor code generation
when we expand the built-ins at normal expand time. We therefore expand
the MMA built-ins early into gimple, converting the pass-by-reference calls
to an internal built-in that uses pass-by-value calling convention, where
we can enforce the input and output accumulators are the same. This gives
us much better code generation.
2020-06-20 Peter Bergner <bergner@linux.ibm.com>
gcc/
* config/rs6000/predicates.md (mma_assemble_input_operand): New.
* config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
built-in functions.
(ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
* config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
Allow zero constants.
(print_operand) <case 'A'>: New output modifier.
(rs6000_split_multireg_move): Add support for inserting accumulator
priming and depriming instructions. Add support for splitting an
assemble accumulator pattern.
* config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
rs6000_gimple_fold_mma_builtin): New functions.
(RS6000_BUILTIN_M): New macro.
(def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
(bdesc_mma): Add new MMA built-in support.
(htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
(rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
RS6000_BTM_MMA.
(rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
(rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
and rs6000_gimple_fold_mma_builtin.
(rs6000_expand_builtin): Call mma_expand_builtin.
Use RS6000_BTC_OPND_MASK.
(rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
(htm_init_builtins): Use RS6000_BTC_OPND_MASK.
(builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
VSX_BUILTIN_XVCVBF16SP.
* config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
(RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
* config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
(UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
(MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
MMA_AVVI4I4I4): New define_int_iterator.
(acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
avvi4i4i4): New define_int_attr.
(*movpxi): Add zero constant alternative.
(mma_assemble_pair, mma_assemble_acc): New define_expand.
(*mma_assemble_acc): New define_insn_and_split.
(mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
* config/rs6000/rs6000.md (define_attr "type"): New type mma.
* config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
(UNSPEC_VSX_XVCVSPBF16): Likewise.
(XVCVBF16): New define_int_iterator.
(xvcvbf16): New define_int_attr.
(vsx_<xvcvbf16>): New define_insn.
* doc/extend.texi: Document the mma built-ins.
Peter Bergner [Sun, 21 Jun 2020 03:00:15 +0000 (22:00 -0500)]
rs6000: Add base support and types for defining MMA built-ins.
Add the new -mmma option as well as the initial MMA support, which includes
the target specific __vector_pair and __vector_quad types, the POImode and
PXImode partial integer modes they are mapped to, and their associated
move patterns. Support for the restrictions on the registers these modes
can be assigned to as also been added.
2020-06-20 Peter Bergner <bergner@linux.ibm.com>
Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/mma.md: New file.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
__MMA__ for mma.
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
for __vector_pair and __vector_quad types.
* config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
OPTION_MASK_MMA.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
(POI, PXI): New partial integer modes.
* config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
(rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
(rs6000_hard_regno_mode_ok_uncached): Likewise.
Add support for POImode being allowed in VSX registers and PXImode
being allowed in FP registers.
(rs6000_modes_tieable_p): Adjust comment.
Add support for POImode and PXImode.
(rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
(rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
Set up appropriate addr_masks for vector pair and vector quad addresses.
(rs6000_init_hard_regno_mode_ok): Add support for vector pair and
vector quad registers. Setup reload handlers for POImode and PXImode.
(rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
(rs6000_option_override_internal): Error if -mmma is specified
without -mcpu=future.
(rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
(quad_address_p): Change size test to less than 16 bytes.
(reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
and vector quad instructions.
(avoiding_indexed_address_p): Likewise.
(rs6000_emit_move): Disallow POImode and PXImode moves involving
constants.
(rs6000_preferred_reload_class): Prefer VSX registers for POImode
and FP registers for PXImode.
(rs6000_split_multireg_move): Support splitting POImode and PXImode
move instructions.
(rs6000_mangle_type): Adjust comment. Add support for mangling
__vector_pair and __vector_quad types.
(rs6000_opt_masks): Add entry for mma.
(rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
(rs6000_function_value): Use VECTOR_ALIGNMENT_P.
(address_to_insn_form): Likewise.
(reg_to_non_prefixed): Likewise.
(rs6000_invalid_conversion): New function.
* config/rs6000/rs6000.h (MASK_MMA): Define.
(BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
(VECTOR_ALIGNMENT_P): New helper macro.
(ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
(RS6000_BTM_MMA): Define.
(RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
(rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
RS6000_BTI_vector_quad.
(vector_pair_type_node): New.
(vector_quad_type_node): New.
* config/rs6000/rs6000.md: Include mma.md.
(define_mode_iterator RELOAD): Add POI and PXI.
* config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
* config/rs6000/rs6000.opt (-mmma): New.
* doc/invoke.texi: Document -mmma.
GCC Administrator [Sun, 21 Jun 2020 00:16:21 +0000 (00:16 +0000)]
Daily bump.
Iain Sandoe [Sat, 20 Jun 2020 13:01:21 +0000 (14:01 +0100)]
coroutines: Update handling and failure for g-r-o-o-a-f [PR95505]
The actual issue is that (in the testcase) std::nothrow is not
available. So update the handling of the get-return-on-alloc-fail
to include the possibility that std::nothrow might not be
available.
gcc/cp/ChangeLog:
PR c++/95505
* coroutines.cc (morph_fn_to_coro): Update handling of
get-return-object-on-allocation-fail and diagnose missing
std::nothrow.
gcc/testsuite/ChangeLog:
PR c++/95505
* g++.dg/coroutines/pr95505.C: New test.
Jason Merrill [Fri, 12 Jun 2020 03:58:54 +0000 (23:58 -0400)]
c++: Refinements to "more constrained".
P2113 from the last C++ meeting clarified that we only compare constraints
on functions or function templates that have equivalent template parameters
and function parameters.
I'm not currently implementing the complicated handling of reversed
comparison operators here; thinking about it now, it seems like a lot of
complexity to support a very weird usage. If I write two similar comparison
operators to be distinguished by their constraints, why would I write one
reversed? If they're two unrelated operators, they're very unlikely to be
similar enough for the complexity to help. I've started a discussion on the
committee reflector about changing these rules.
This change breaks some greedy_ops tests in libstdc++ that were relying on
comparing constraints on unrelated templates, which seems pretty clearly
wrong, so I'm removing those tests for now.
gcc/cp/ChangeLog:
* call.c (joust): Only compare constraints for non-template
candidates with matching parameters.
* pt.c (tsubst_pack_expansion): Fix getting a type parameter
pack.
(more_specialized_fn): Only compare constraints for candidates with
matching parameters.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts-return-req1.C: Expect error.
* g++.dg/cpp2a/concepts-p2113a.C: New test.
* g++.dg/cpp2a/concepts-p2113b.C: New test.
libstdc++-v3/ChangeLog:
* testsuite/24_iterators/move_iterator/rel_ops_c++20.cc:
Remove greedy_ops tests.
* testsuite/24_iterators/reverse_iterator/rel_ops_c++20.cc:
Remove greedy_ops tests.
Harald Anlauf [Sat, 20 Jun 2020 14:15:16 +0000 (16:15 +0200)]
PR fortran/95707 - ICE in finish_equivalences, at fortran/trans-common.c:1319
With submodules and equivalence declarations, name mangling may result in
long internal symbols overflowing internal buffers. We now check that
we do not exceed the enlarged buffer sizes.
gcc/fortran/
PR fortran/95707
* gfortran.h (gfc_common_head): Enlarge buffer.
* trans-common.c (gfc_sym_mangled_common_id): Enlarge temporary
buffers, and add check on length on mangled name to prevent
overflow.
Harald Anlauf [Sat, 20 Jun 2020 14:14:00 +0000 (16:14 +0200)]
PR fortran/95688 - ICE in gfc_get_string, at fortran/iresolve.c:70
With submodules, name mangling of character pointer declarations produces long
internal symbols that overflowed a static internal buffer. Adjust the buffer
size.
gcc/fortran/
PR fortran/95688
* iresolve.c (gfc_get_string): Enlarge static buffer size.
Harald Anlauf [Sat, 20 Jun 2020 14:11:48 +0000 (16:11 +0200)]
PR fortran/95687 - ICE in get_unique_hashed_string, at fortran/class.c:508
With submodules and PDTs, name mangling of interfaces may result in long
internal symbols overflowing a previously static internal buffer. We now
set the buffer size dynamically.
gcc/fortran/
PR fortran/95687
* class.c (get_unique_type_string): Return a string with dynamic
length.
(get_unique_hashed_string, gfc_hash_value): Use dynamic result
from get_unique_type_string instead of static buffer.
Harald Anlauf [Sat, 20 Jun 2020 14:09:45 +0000 (16:09 +0200)]
PR fortran/95689 - ICE in check_sym_interfaces, at fortran/interface.c:2015
With submodules, name mangling of interfaces may result in long internal
symbols overflowing an internal buffer. We now check that we do not
exceed the enlarged buffer size.
gcc/fortran/
PR fortran/95689
* interface.c (check_sym_interfaces): Enlarge temporary buffer,
and add check on length on mangled name to prevent overflow.
Harald Anlauf [Sat, 20 Jun 2020 14:05:13 +0000 (16:05 +0200)]
PR fortran/95587 - ICE in gfc_target_encode_expr, at fortran/target-memory.c:362
EQUIVALENCE objects are subject to constraints listed in the Fortran 2018
standard, section 8.10.1.1. These constraints are to be checked
also for CLASS variables.
gcc/fortran/
PR fortran/95587
* match.c (gfc_match_equivalence): Check constraints on
EQUIVALENCE objects also for CLASS variables.
Bin Cheng [Sat, 20 Jun 2020 07:42:12 +0000 (15:42 +0800)]
Record and restore postorder information in breaking alias sccs.
gcc/
PR tree-optimization/95638
* tree-loop-distribution.c (pg_edge_callback_data): New field.
(loop_distribution::break_alias_scc_partitions): Record and restore
postorder information. Fix memory leak.
gcc/testsuite/
PR tree-optimization/95638
* g++.dg/tree-ssa/pr95638.C: New test.
GCC Administrator [Sat, 20 Jun 2020 00:16:27 +0000 (00:16 +0000)]
Daily bump.
David Edelsohn [Fri, 19 Jun 2020 20:15:21 +0000 (16:15 -0400)]
testsuite: popcount[45]ll require lp64
popcount[45]ll require __builtin_popcountll, but the test can succeed
without libcall through expand_doubleword_popcount. However the Tree-SSA
optiization requires recognition of POPCOUNT. This patch limits the test
to lp64 for the targets that fall through the cracks and were not
caught by the dg-require-effective-target popcountll.
gcc/testsuite/ChangeLog
2020-06-19 David Edelsohn <dje.gcc@gmail.com>
* gcc.dg/tree-ssa/popcount4ll.c: Add target lp64.
* gcc.dg/tree-ssa/popcount5ll.c: Same.
Jonathan Wakely [Fri, 19 Jun 2020 17:15:15 +0000 (18:15 +0100)]
libstdc++: Fix some -Wsystem-headers warnings (PR 95765)
PR libstdc++/95765
* include/bits/stl_algobase.h (__size_to_integer(float))
(__size_to_integer(double), __size_to_integer(long double))
(__size_to_integer(__float128)): Cast return type explicitly.
* include/bits/stl_uninitialized.h (__uninitialized_default_1<true>):
Remove unused typedef.
Jason Merrill [Thu, 18 Jun 2020 21:41:43 +0000 (17:41 -0400)]
c++: Allow defaulted comparison outside class.
Implementing P2085, another refinement to the operator<=> specification from
the Prague meeting. It was deemed desirable to be able to have a non-inline
defaulted definition of a comparison operator just like you can with other
defaulted functions.
gcc/cp/ChangeLog:
* method.c (early_check_defaulted_comparison): Allow defaulting
comparison outside class. Complain if non-member operator isn't a
friend.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/spaceship-friend1.C: New test.
* g++.dg/cpp2a/spaceship-err4.C: Adjust diagnostic.
David Edelsohn [Fri, 19 Jun 2020 15:53:52 +0000 (11:53 -0400)]
rs6000: apply -mbig option to vec-extract[hl] testcases conditionally.
gcc/testsuite/ChangeLog
2020-06-19 David Edelsohn <dje.gcc@gmail.com>
* gcc.target/powerpc/vec-extracth-be-0.c: Apply -mbig
conditionally for powerpc64le*-*-*.
* gcc.target/powerpc/vec-extracth-be-1.c: Same.
* gcc.target/powerpc/vec-extracth-be-2.c: Same.
* gcc.target/powerpc/vec-extracth-be-3.c: Same.
* gcc.target/powerpc/vec-extractl-be-0.c: Same.
* gcc.target/powerpc/vec-extractl-be-1.c: Same.
* gcc.target/powerpc/vec-extractl-be-2.c: Same.
* gcc.target/powerpc/vec-extractl-be-3.c: Same.
Tobias Burnus [Fri, 19 Jun 2020 16:12:11 +0000 (18:12 +0200)]
amdgcn: Silence compile warnings
gcc/ChangeLog:
* config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
(output_file_start): Use const 'char *'.
Przemyslaw Wirkus [Fri, 19 Jun 2020 15:48:55 +0000 (16:48 +0100)]
Fix PR94880: Failure to recognize andn pattern
Pattern "(x | y) - y" can be optimized to simple "(x & ~y)" andn
pattern.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/ChangeLog:
PR tree-optimization/94880
* match.pd (A | B) - B -> (A & ~B): New simplification.
gcc/testsuite/ChangeLog:
PR tree-optimization/94880
* gcc.dg/tree-ssa/pr94880.c: New Test.
Richard Biener [Mon, 20 Apr 2020 08:05:06 +0000 (10:05 +0200)]
Handle SLP_TREE_LANE_PERMUTATION in scalar costing
This properly handles a lane permutation in scalar costing.
For the current only use this doesn't matter much but with
permutes that change the number of lanes it will eventually
ICE.
2020-06-19 Richard Biener <rguenther@suse.de>
* tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
for lane permutations.
Jonathan Wakely [Fri, 19 Jun 2020 14:02:54 +0000 (15:02 +0100)]
libstdc++: Remove redundant std:: qualification
* include/bits/stl_pair.h (_Index_tuple): Remove redundant
namespace qualification.
(pair::pair(tuple<>&, tuple<>&, _Index_tuple, _Index_tuple)):
Likewise.
* include/std/tuple (_Head_base, _Tuple_impl, tuple_size)
(tuple_element, __get_helper, get, __make_tuple_impl)
(__make_1st_indices, __tuple_concater)
(pair::pair(tuple<>&, tuple<>&, _Index_tuple, _Index_tuple)):
Likewise.
* include/std/utility (tuple_element, __is_tuple_like_impl)
(tuple_size, __pair_get, get): Likewise.
Jonathan Wakely [Fri, 19 Jun 2020 13:37:52 +0000 (14:37 +0100)]
libstdc++: Define all std::function members inline
* include/bits/std_function.h (function): Define all member
functions inline.
Marc Glisse [Fri, 19 Jun 2020 12:03:45 +0000 (13:03 +0100)]
libstdc++: std::includes performance tweak
A small tweak to the implementation of __includes, which in my
application saves 20% of the running time. I noticed it because using
range-v3 was giving unexpected performance gains.
Some of the gain comes from pulling the 2 calls ++__first1 out of the
condition so there is just one call. And most of the gain comes from
replacing the resulting
if (__comp(__first1, __first2))
;
else
++__first2;
with
if (!__comp(__first1, __first2))
++__first2;
I was very surprised that the code ended up being so different for such
a change, and I still don't really understand where the extra time is
going...
Anyway, while I blame the compiler for not generating very good code
with the current implementation, I believe the change can be seen as a
simplification.
libstdc++-v3/ChangeLog:
* include/bits/stl_algo.h (__includes): Simplify the code.
Richard Biener [Fri, 19 Jun 2020 08:03:46 +0000 (10:03 +0200)]
tree-optimization/95761 - fix vector insertion place compute
I missed that indeed SLP permutation code generation can end up
refering to a non-last vectorized stmt in the last SLP_TREE_VEC_STMTS
element as optimization. So walk them all.
2020-06-19 Richard Biener <rguenther@suse.de>
PR tree-optimization/95761
* tree-vect-slp.c (vect_schedule_slp_instance): Walk all
vectorized stmts for finding the last one.
* gcc.dg/torture/pr95761.c: New testcase.
Marc Glisse [Fri, 19 Jun 2020 11:07:33 +0000 (12:07 +0100)]
libstdc++: Optimize std::optional default constructor
The attached patch changes the code generated for
std::optional<std::array<int,1024>>f(){return{};}
from
movq $0, (%rdi)
movq %rdi, %r8
leaq 8(%rdi), %rdi
xorl %eax, %eax
movq $0, 4084(%rdi)
movq %r8, %rcx
andq $-8, %rdi
subq %rdi, %rcx
addl $4100, %ecx
shrl $3, %ecx
rep stosq
movq %r8, %rax
or with different tuning
subq $8, %rsp
movl $4100, %edx
xorl %esi, %esi
call memset
addq $8, %rsp
to the much shorter
movb $0, 4096(%rdi)
movq %rdi, %rax
i.e. the same as the nullopt constructor.
The constructor was already non-trivial, so we don't lose that. It passes the
testsuite without regression, but there is no new testcase to verify the
better codegen.
libstdc++-v3/ChangeLog:
* include/std/optional (optional()): Explicitly define it.
Eric Botcazou [Fri, 10 Apr 2020 09:19:22 +0000 (09:19 +0000)]
[Ada] Remove handling of 'Pos and 'Val attributes from gigi
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* gcc-interface/trans.c (lvalue_required_for_attribute_p): Do not deal
with 'Pos or 'Val.
(Attribute_to_gnu): Likewise.
* gcc-interface/utils.c (create_field_decl): Small formatting fix.
Eric Botcazou [Mon, 9 Mar 2020 17:20:59 +0000 (17:20 +0000)]
[Ada] Consolidate handling of implicit dereferences
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* gcc-interface/trans.c (adjust_for_implicit_deref): Delete.
(maybe_implicit_deref): Likewise.
(Attribute_to_gnu): Replace calls to maybe_implicit_deref by calls
to maybe_padded_object.
(Call_to_gnu): Likewise.
(gnat_to_gnu) <N_Indexed_Component>: Likewise.
<N_Slice>: Likewise.
<N_Selected_Component>: Likewise.
<N_Free_Statement>: Remove call to adjust_for_implicit_deref and
manually make sure that the designated type is complete.
* gcc-interface/utils2.c (build_simple_component_ref): Add comment.
Eric Botcazou [Tue, 3 Mar 2020 17:57:51 +0000 (17:57 +0000)]
[Ada] AI12-0028-1 Import of variadic C functions
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* gcc-interface/decl.c (gnat_to_gnu_param): Tidy up.
(gnat_to_gnu_subprog_type): For a variadic C function, do not
build unnamed parameters and do not add final void node.
* gcc-interface/misc.c: Include snames.h.
* gcc-interface/trans.c (Attribute_to_gnu): Tidy up.
(Call_to_gnu): Implement support for unnamed parameters in a
variadic C function.
* gcc-interface/utils.c: Include snames.h.
(copy_type): Tidy up.
Eric Botcazou [Sun, 3 May 2020 21:26:11 +0000 (23:26 +0200)]
[Ada] Further cleanup in constraint checking code for allocators
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* exp_ch5.adb (Expand_N_Assignment_Statement): Do not apply
range checks to allocators here.
Justin Squirek [Sat, 2 May 2020 21:17:24 +0000 (17:17 -0400)]
[Ada] Crash on compiling project with multiple subunits per file
2020-06-19 Justin Squirek <squirek@adacore.com>
gcc/ada/
* lib.adb (Check_Same_Extended_Unit): Add check to determine if
the body for the subunits exist in the same file as their
specifications.
Eric Botcazou [Sat, 2 May 2020 15:45:21 +0000 (17:45 +0200)]
[Ada] Fix check for bounds in aggregate expansion of allocator
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* exp_aggr.adb (In_Place_Assign_OK): In an allocator context,
check the bounds of an array aggregate against those of the
designated type, except if the latter is unconstrained.
Eric Botcazou [Sat, 2 May 2020 15:35:02 +0000 (17:35 +0200)]
[Ada] Fix small fallout of previous change for Analyze_Selected_Component
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* sem_ch3.adb (Is_Visible_Component): Reason only on the private
status of the original type in an instance body.
Eric Botcazou [Sat, 2 May 2020 09:35:42 +0000 (11:35 +0200)]
[Ada] Fix small fallout of previous change for allocator
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* sem_res.adb (Resolve_Qualified_Expression): Do not override the
type of the node when it is unconstrained if it is for an allocator.
Eric Botcazou [Fri, 1 May 2020 13:26:08 +0000 (15:26 +0200)]
[Ada] Plug small loophole in implementation of AI12-0100
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* sem_res.adb (Resolve_Allocator): Call Resolve_Qualified_Expression
on the qualified expression, if any, instead of doing an incomplete
type resolution manually.
(Resolve_Qualified_Expression): Apply predicate check to operand.
Eric Botcazou [Thu, 30 Apr 2020 22:27:12 +0000 (00:27 +0200)]
[Ada] Fix internal error on component of class-wide parameter in instance body
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* sem_ch4.adb (Analyze_Selected_Component): In an instance body,
also invoke Find_Component_In_Instance on the parent subtype of
a derived tagged type immediately visible. Remove obsolete case.
Eric Botcazou [Wed, 29 Apr 2020 19:42:22 +0000 (21:42 +0200)]
[Ada] Deal with enumeration types with very large size
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* exp_attr.adb (Get_Integer_Type): Return the largest supported
unsigned integer type if need be.
Justin Squirek [Thu, 30 Apr 2020 20:04:26 +0000 (16:04 -0400)]
[Ada] Spurious condition warning on type conversion in return
2020-06-19 Justin Squirek <squirek@adacore.com>
gcc/ada/
* sem_warn.adb (Warn_On_Known_Condition): Add general sanity
check that asserts the original source node being checked
contains an entity. If not, it could be the result of special
case expansion for type conversions.
Ed Schonberg [Thu, 30 Apr 2020 19:19:16 +0000 (15:19 -0400)]
[Ada] Spurious error on private type in ghost expression function
2020-06-19 Ed Schonberg <schonberg@adacore.com>
gcc/ada/
* sem_ch6.adb (Analyze_Expression_Function): Do not indicate
that the function has a completion if it appears within a Ghost
generic package.
Bob Duff [Thu, 30 Apr 2020 18:40:26 +0000 (14:40 -0400)]
[Ada] AI12-0293-1 Remove pragma Assert
2020-06-19 Bob Duff <duff@adacore.com>
gcc/ada/
* libgnat/a-ststbo.adb (Write): Replace pragma Assert with "if
... raise Constraint_Error".
Justin Squirek [Thu, 30 Apr 2020 12:55:33 +0000 (08:55 -0400)]
[Ada] Style checks on invalid UTF character cause crash
2020-06-19 Justin Squirek <squirek@adacore.com>
gcc/ada/
* widechar.adb, widechar.ads (Skip_Wide): Catch validity check
failure when skipping over characters, and update comment to
reflect Skip_Wide's usage in error printing.
Javier Miranda [Thu, 30 Apr 2020 15:55:42 +0000 (11:55 -0400)]
[Ada] ACATS 4.1G - C760A02 - Near infinite finalization
2020-06-19 Javier Miranda <miranda@adacore.com>
gcc/ada/
* exp_ch3.ads (Ensure_Activation_Chain_And_Master): New
subprogram.
* exp_ch3.adb (Ensure_Activation_Chain_And_Master): New
subprogram that factorizes code.
(Expand_N_Object_Declaration): Call new subprogram.
* sem_ch6.adb (Analyze_Function_Return): Returning a
build-in-place unconstrained array type defer the full analysis
of the returned object to avoid generating the corresponding
constrained subtype; otherwise the bounds would be created in
the stack and a dangling reference would be returned pointing to
the bounds.
Arnaud Charlet [Wed, 29 Apr 2020 16:38:22 +0000 (12:38 -0400)]
[Ada] AI12-0366 Changes to Big_Integer and Big_Real
2020-06-19 Arnaud Charlet <charlet@adacore.com>
gcc/ada/
* libgnat/a-nbnbin.adb, libgnat/a-nbnbin.ads,
libgnat/a-nbnbin__gmp.adb, libgnat/a-nbnbre.adb,
libgnat/a-nbnbre.ads: Update spec according to AI12-0366.
Piotr Trojanek [Wed, 29 Apr 2020 16:52:22 +0000 (18:52 +0200)]
[Ada] Minor remove extra whitespace in check suppression functions
2020-06-19 Piotr Trojanek <trojanek@adacore.com>
gcc/ada/
* checks.ads: Remove excessive whitespace in declarations of
functions for check suppression.
Eric Botcazou [Tue, 28 Apr 2020 20:19:17 +0000 (22:19 +0200)]
[Ada] Attempt to hide public entities in nested instance bodies
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* sem_ch7.adb (Hide_Public_Entities): Split handling of objects
and subprograms, and do not reject the latter upfront in nested
instance specs if there are no referencer subprograms at all.
(Analyze_Package_Body_Helper): Also call Hide_Public_Entities on
nested generic instances.
Piotr Trojanek [Wed, 29 Apr 2020 09:30:46 +0000 (11:30 +0200)]
[Ada] Reject junk expressions in attribute Update
2020-06-19 Piotr Trojanek <trojanek@adacore.com>
gcc/ada/
* sem_attr.adb (Analyze_Attribute): Reject illegal positional
component associations; fix syntax in comment about named
component associations.
Piotr Trojanek [Tue, 28 Apr 2020 16:10:10 +0000 (18:10 +0200)]
[Ada] Decorate record delta aggregate for GNATprove
2020-06-19 Piotr Trojanek <trojanek@adacore.com>
gcc/ada/
* sem_aggr.adb (Resolve_Delta_Record_Aggregate): Modify a nested
Get_Component_Type routine to return a component and not just
its type; use this routine to decorate the identifier within the
delta aggregate.
Arnaud Charlet [Sun, 26 Apr 2020 10:08:29 +0000 (06:08 -0400)]
[Ada] universal_access equality and 'Access attributes
2020-06-19 Arnaud Charlet <charlet@adacore.com>
gcc/ada/
* sem_ch4.adb (Find_Equality_Types.Check_Access_Attribute): New.
(Find_Equality_Types): Move universal_access related checks at
the end of the processing and add call to
Check_Access_Attribute.
Eric Botcazou [Tue, 28 Apr 2020 18:51:51 +0000 (20:51 +0200)]
[Ada] Remove second warning for convention C_Variadic_n
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* sem_prag.adb (Process_Convention): Revert previous change.
Eric Botcazou [Sat, 25 Apr 2020 15:10:43 +0000 (17:10 +0200)]
[Ada] Small cleanup in Apply_Range_Check implementation
2020-06-19 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* checks.ads (Apply_Static_Length_Check): Move up.
(Apply_Range_Check): Add parameter Insert_Node.
* checks.adb (Apply_Selected_Range_Checks): Merge into...
(Apply_Range_Check): ...this. Add parameter Insert_Node,
pass it as Warn_Node to Selected_Range_Checks and use it
as insertion point for the checks.
* sem_ch3.adb (Analyze_Subtype_Declaration): Rewrite block
dealing with the range checks for the subtype indication.
Use local variable and call Apply_Range_Check in both cases.
Piotr Trojanek [Mon, 27 Apr 2020 12:22:53 +0000 (14:22 +0200)]
[Ada] Fix validity checks on attribute 'Old prefix
2020-06-19 Piotr Trojanek <trojanek@adacore.com>
gcc/ada/
* exp_attr.adb (Expand_N_Attribute_Reference): Call Ensure_Valid
on the expression of an object declaration that captures the
value of 'Old prefix.
Piotr Trojanek [Mon, 27 Apr 2020 09:30:06 +0000 (11:30 +0200)]
[Ada] Add comments about attribute 'Valid_Scalars on private tagged types
2020-06-19 Piotr Trojanek <trojanek@adacore.com>
gcc/ada/
* exp_attr.adb (Expand_N_Attribute_Reference): Add comment.
* sem_attr.adb (Analyze_Attribute): Add ??? comment.
* sem_util.ads (Valid_Scalars): This routine is only used for
'Valid_Scalars and not for 'Valid.
Piotr Trojanek [Mon, 27 Apr 2020 09:14:31 +0000 (11:14 +0200)]
[Ada] Simplify processing of 'Valid_Scalars on array types
2020-06-19 Piotr Trojanek <trojanek@adacore.com>
gcc/ada/
* exp_attr.adb (Expand_N_Attribute_Reference): Do not call
Scalar_Part_Present on the array component's type.
(Build_Array_VS_Func): Remove Comp_Typ parameter, because it can
be easily computed from the Array_Top parameter *and redundant
parameters are confusing and error-prone).
Piotr Trojanek [Mon, 27 Apr 2020 07:56:17 +0000 (09:56 +0200)]
[Ada] Fix validity checking for class-wide objects
2020-06-19 Piotr Trojanek <trojanek@adacore.com>
gcc/ada/
* exp_attr.adb (Build_Record_VS_Func): Strip privacy and type
derivation from the root type when 'Valid_Scalars is applied to
a class-wide type.
Piotr Trojanek [Fri, 24 Apr 2020 15:36:24 +0000 (17:36 +0200)]
[Ada] Remove repeated testing of Check_Validity_Of_Parameters
2020-06-19 Piotr Trojanek <trojanek@adacore.com>
gcc/ada/
* checks.adb (Apply_Parameter_Validity_Checks): Remove testing
of Check_Validity_Of_Parameters for every formal parameter and
function result.
Arnaud Charlet [Fri, 24 Apr 2020 16:17:51 +0000 (12:17 -0400)]
[Ada] Add missing warning tag for some overlapping actuals warnings
2020-06-19 Arnaud Charlet <charlet@adacore.com>
gcc/ada/
* sem_warn.adb (Warn_On_Overlapping_Actuals): Add missing
warning tag.
GCC Administrator [Fri, 19 Jun 2020 00:16:32 +0000 (00:16 +0000)]
Daily bump.
Jason Merrill [Wed, 17 Jun 2020 20:22:33 +0000 (16:22 -0400)]
c++: More P2002 operator<=> refinements.
* Disallow && references.
* Allow empty unions.
* Improve diagnostics for a subobject comparison with
non-comparison-category type.
gcc/cp/ChangeLog:
* method.c (early_check_defaulted_comparison): Check for &&.
(build_comparison_op): Allow empty union. Diagnose non-category
type.
(common_comparison_type): Remove handling for non-category type.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/spaceship-ref1.C: New test.
* g++.dg/cpp2a/spaceship-synth-neg4.C: New test.
* g++.dg/cpp2a/spaceship-union1.C: New test.
Fei Yang [Thu, 18 Jun 2020 19:11:09 +0000 (20:11 +0100)]
vect: Use vect_relevant_for_alignment_p consistently
Minor code refactorings in tree-vect-data-refs.c. When trying loop peeling
to force alignment, call vect_relevant_for_alignment_p to filter out data
references in the loop whose alignment is irrelevant.
2020-06-18 Felix Yang <felix.yang@huawei.com>
gcc/
* tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
vect_relevant_for_alignment_p to filter out data references in
the loop whose alignment is irrelevant when trying loop peeling
to force alignment.
Uros Bizjak [Thu, 18 Jun 2020 18:12:48 +0000 (20:12 +0200)]
i386: Fix mode of ZERO_EXTRACT RTXes, remove ext_register_operand predicate.
The mode of ZERO_EXTRACT RTX should match the mode of its LOC register
operand. The mode should be HI, SI or DImode to enable combine to synthesize
extractions from HImode and DImode operands, in addition to existing SImode.
Further, these changes tighten allowed modes for extv, extzv and insv
named patterns and finally enable removal of ext_register_operand
special predicate.
2020-18-06 Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
* config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
mode iterator for the first operand of ZERO_EXTRACT RTX.
Change ext_register_operand predicate to register_operand.
Rename from *cmpqi_ext_1.
(*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
(*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
(*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
(cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
(*extv<mode>): Use SWI24 mode iterator for the first operand
of ZERO_EXTRACT RTX. Change ext_register_operand predicate
to register_operand.
(*extzv<mode>): Use SWI248 mode iterator for the first operand
of ZERO_EXTRACT RTX. Change ext_register_operand predicate
to register_operand.
(*extzvqi): Use SWI248 mode iterator instead of SImode for
ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
register_operand.
(*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
mode iterator for the first operand of ZERO_EXTRACT RTX.
Change ext_register_operand predicate to register_operand.
(@insv<mode>_1): Use SWI248 mode iterator for the first operand
of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
register_operand.
(*insvqi_1): Use SWI248 mode iterator instead of SImode
for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
first operand of ZERO_EXTRACT RTX. Change ext_register_operand
predicate to register_operand.
(*insvqi_2): Ditto.
(*insvqi_3): Ditto.
(*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
mode iterator for the first operand of ZERO_EXTRACT RTX.
Change ext_register_operand predicate to register_operand.
(addqi_ext_1): New expander.
(*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
to register_operand. Rename from *addqi_ext_1.
(*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
(divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
(udivmodqi4): Ditto.
(testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
(*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
to register_operand. Rename from *testqi_ext_1.
(*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
(andqi_ext_1): New expander.
(*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
to register_operand. Rename from andqi_ext_1.
(*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
(*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
(*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
(*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
(xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
(*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
to register_operand. Rename from *xorqi_ext_1_cc.
* config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
in mode, matching its first operand.
(promote_duplicated_reg): Update for renamed insv<mode>_1.
* config/i386/predicates.md (ext_register_operand): Remove predicate.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr78904-1a.c: New test.
* gcc.target/i386/pr78904-1b.c: Ditto.
* gcc.target/i386/pr78904-2a.c: Ditto.
* gcc.target/i386/pr78904-2b.c: Ditto.
* gcc.target/i386/pr78904-3a.c: Ditto.
* gcc.target/i386/pr78904-3b.c: Ditto.
* gcc.target/i386/pr78904-4a.c: Ditto.
* gcc.target/i386/pr78904-4b.c: Ditto.
* gcc.target/i386/pr78904-5a.c: Ditto.
* gcc.target/i386/pr78904-5b.c: Ditto.
* gcc.target/i386/pr78904-6a.c: Ditto.
* gcc.target/i386/pr78904-6b.c: Ditto.
* gcc.target/i386/pr78967-1a.c: Ditto.
* gcc.target/i386/pr78967-1b.c: Ditto.
* gcc.target/i386/pr78967-2a.c: Ditto.
* gcc.target/i386/pr78967-2b.c: Ditto.
Martin Sebor [Thu, 18 Jun 2020 18:00:36 +0000 (12:00 -0600)]
Avoid warning for memset writing over multiple members.
Resolves:
PR middle-end/95667 - unintended warning for memset writing across multiple members
PR middle-end/92814 - missing -Wstringop-overflow writing into a dynamically allocated flexible array member
gcc/ChangeLog:
PR middle-end/95667
PR middle-end/92814
* builtins.c (compute_objsize): Remove call to
compute_builtin_object_size and instead compute conservative sizes
directly here.
gcc/testsuite/ChangeLog:
PR middle-end/95667
PR middle-end/92814
* gcc.dg/Wstringop-overflow-25.c: Remove xfails.
* gcc.dg/Wstringop-overflow-39.c: New test.
Marek Polacek [Thu, 18 Jun 2020 13:38:42 +0000 (09:38 -0400)]
c++: ICE in requires-expressions with invalid args [PR95735]
This ICE-on-invalid goes back to GCC 6. In finish_template_variable,
if coerce_innermost_template_parms returns error_mark_node, we pass
it down to constraints_satisfied_p and that error_mark_node flows
down to various satisfy_* functions and then to various tsubst_*
functions, where we crash. diagnose_constraints also doesn't cope
with error arglist, so I think we should just return as in the
patch below.
gcc/cp/ChangeLog:
PR c++/95735
* pt.c (finish_template_variable): Return if
coerce_innermost_template_parms return error_mark_node.
gcc/testsuite/ChangeLog:
PR c++/95735
* g++.dg/cpp2a/concepts-err2.C: New test.
Christophe Lyon [Thu, 18 Jun 2020 15:25:18 +0000 (15:25 +0000)]
Fix use of inaccessible member in pr94052.C
The recent PR41437 fix exposed a latent use of an inaccessible member in
the below testcase.
gcc/testsuite/ChangeLog:
* g++.target/aarch64/pr94052.C: Give z::ad public access.
Martin Liska [Thu, 11 Jun 2020 11:25:40 +0000 (13:25 +0200)]
vectorizer: add _bb_vec_info::region_stmts and reverse_region_stmts
gcc/ChangeLog:
* coretypes.h (struct iterator_range): New type.
* tree-vect-patterns.c (vect_determine_precisions): Use
range-based iterator.
(vect_pattern_recog): Likewise.
* tree-vect-slp.c (_bb_vec_info): Likewise.
(_bb_vec_info::~_bb_vec_info): Likewise.
(vect_slp_check_for_constructors): Likewise.
* tree-vectorizer.h:Add new iterators
and functions that use it.
Jonathan Wakely [Thu, 18 Jun 2020 14:34:51 +0000 (15:34 +0100)]
Add missing PR number to ChangeLog (PR 95378)
gcc/c-family/ChangeLog:
* ChangeLog:
Martin Liska [Thu, 18 Jun 2020 07:25:32 +0000 (09:25 +0200)]
rs6000: Fix creation of VEC_COND_EXPR
gcc/ChangeLog:
* config/rs6000/rs6000-call.c (fold_build_vec_cmp):
Since
502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
of a VEC_COND_EXPR cannot be tcc_comparison and so that
a SSA_NAME needs to be created before we use it for the first
argument of the VEC_COND_EXPR.
(fold_compare_helper): Pass gsi to fold_build_vec_cmp.
Tobias Burnus [Thu, 18 Jun 2020 13:27:30 +0000 (15:27 +0200)]
OpenMP/Fortran: Reject allocatable components in map clause
gcc/fortran/ChangeLog:
* openmp.c (resolve_omp_clauses): Reject vars with
allocatable components in OpenMP map clauses.
gcc/testsuite/ChangeLog:
* gfortran.dg/gomp/map-alloc-comp-1.f90: New test.
Richard Biener [Thu, 18 Jun 2020 12:45:03 +0000 (14:45 +0200)]
middle-end/95739 - fix vector condition IFN expansion
This fixes the omission of moving the expansion result to the
target.
2020-06-18 Richard Biener <rguenther@suse.de>
PR middle-end/95739
* internal-fn.c (expand_vect_cond_optab_fn): Move the result
to the target if necessary.
(expand_vect_cond_mask_optab_fn): Likewise.
Martin Liska [Thu, 18 Jun 2020 12:46:02 +0000 (14:46 +0200)]
Fix typo in tree-ssa-reassoc.c.
gcc/ChangeLog:
* tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
vcond as we check for NULL pointer.
Martin Liska [Thu, 18 Jun 2020 12:44:04 +0000 (14:44 +0200)]
gcc-changelog: checkout & pull order
contrib/ChangeLog:
* gcc-changelog/git_update_version.py: First checkout and then
run git pull ---rebase.
Marek Polacek [Wed, 17 Jun 2020 23:23:10 +0000 (19:23 -0400)]
c++: Fix tsubst ICE with invalid static_cast [PR95728]
Since r11-423 tsubst_copy_and_build/TREE_LIST uses tsubst_tree_list
instead of open coding it. While the latter could return an error
node wrapped in a TREE_LIST, the former can return a naked error node.
That broke in tsubst_copy_and_build/NEW_EXPR:
tree placement = RECUR (TREE_OPERAND (t, 0));
// placement is now error_mark_node, so...
for (; placement != NULL_TREE; placement = TREE_CHAIN (placement))
// ... this crashes
If we just return, we avoid the ICE and improve the diagnostic a bit.
gcc/cp/ChangeLog:
PR c++/95728
* pt.c (tsubst_copy_and_build) <case NEW_EXPR>: Return error_mark_node
if placement is erroneous.
gcc/testsuite/ChangeLog:
PR c++/95728
* g++.dg/template/cast6.C: New test.
Martin Liska [Thu, 18 Jun 2020 12:14:24 +0000 (14:14 +0200)]
gcc-changelog: support merge commits in git_update_version
contrib/ChangeLog:
* gcc-changelog/git_update_version.py: Support merge commits
and walk only on the branch that is being merged and generate
missing ChangeLog entries.
Tobias Burnus [Thu, 18 Jun 2020 11:19:03 +0000 (13:19 +0200)]
silence empty-body warning
gcc/ChangeLog:
* gimple-pretty-print.c (dump_binary_rhs): Use braces to
silence empty-body warning with gcc_fallthrough.
Jakub Jelinek [Thu, 18 Jun 2020 10:11:09 +0000 (12:11 +0200)]
phiopt: Improve minmax optimization [PR95699]
As discussed in the PR, the
x < 0x80000000U to (int) x >= 0
optimization stands in the way of minmax_replacement optimization,
so for comparisons with most of the constants it works well, but when the
above mentioned optimization triggers, it is unable to do it.
The match.pd (cond (cmp (convert? x) c1) (op x c2) c3) -> (op (minmax x c1) c2)
optimization is able to look through that and this patch
teaches minmax_replacement about it too.
2020-06-18 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/95699
* tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
declarations to the statements that set them where possible.
* gcc.dg/tree-ssa/pr95699.c: New test.
Jakub Jelinek [Thu, 18 Jun 2020 10:08:06 +0000 (12:08 +0200)]
forwprop: simplify_vector_constructor follow-up fix [PR95713]
As the following testcase shows, the exception for the aarch64
vec_pack_trunc_di is not sufficient on x86, the halfvectype
"vectors" have SImode but the x86 vec_pack_trunc_si meant for
the bool bitmasks combines 2x SImode into DImode, while in the
testcase the halfvectype is 1x SImode "vector" with SImode and
result is 2x HImode "vector" with SImode.
Richard Sandiford's reply:
FWIW, since the aarch64 case was only found by inspection and might
not be useful, personally I'd prefer to drop that case after all.
2020-06-18 Jakub Jelinek <jakub@redhat.com>
PR target/95713
* tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
scalar mode halfvectype other than vector boolean for
VEC_PACK_TRUNC_EXPR.
* gcc.dg/pr95713.c: New test.
Richard Biener [Thu, 18 Jun 2020 09:02:26 +0000 (11:02 +0200)]
avoid early asm output
This avoids early assembler output via the gimplifier creating
new static CTORs. The output machinery seems to be prepared to
output constants recursively and it's just a matter of
appropriately defering or not defering output.
This also has the advantage of not outputting .string for
optimized away local aggregate initializers containing string
references.
2020-06-18 Richard Biener <rguenther@suse.de>
* varasm.c (assemble_variable): Make sure to not
defer output when outputting addressed constants.
(output_constant_def_contents): Likewise.
(add_constant_to_table): Take and pass on whether to
defer output.
(output_addressed_constants): Likewise.
(output_constant_def): Pass on whether to defer output
to add_constant_to_table.
(tree_output_constant_def): Defer output of constants.
Richard Biener [Wed, 25 Mar 2020 13:42:49 +0000 (14:42 +0100)]
remove SLP_TREE_TWO_OPERATORS, add SLP permutation node
This removes the SLP_TREE_TWO_OPERATORS hack in favor of having
explicit SLP nodes for both computations and the blend operation.
For this introduce a generic merge + select + permute SLP node
(with implementation limits).
Building upon earlier patches it adds vect_stmt_dominates_stmt_p
and the ability to compute a vector insertion place from
vectorized stmts (which now have UID zero) as needed for
the permute node.
2020-06-17 Richard Biener <rguenther@suse.de>
* tree-vectorizer.h (_slp_tree::two_operators): Remove.
(_slp_tree::lane_permutation): New member.
(_slp_tree::code): Likewise.
(SLP_TREE_TWO_OPERATORS): Remove.
(SLP_TREE_LANE_PERMUTATION): New.
(SLP_TREE_CODE): Likewise.
(vect_stmt_dominates_stmt_p): Declare.
* tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
* tree-vect-stmts.c (vect_model_simple_cost): Remove
SLP_TREE_TWO_OPERATORS handling.
* tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
(_slp_tree::~_slp_tree): Likewise.
(vect_two_operations_perm_ok_p): Remove.
(vect_build_slp_tree_1): Remove verification of two-operator
permutation here.
(vect_build_slp_tree_2): When we have two different operators
build two computation SLP nodes and a blend.
(vect_print_slp_tree): Print the lane permutation if it exists.
(slp_copy_subtree): Copy it.
(vect_slp_rearrange_stmts): Re-arrange it.
(vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
VEC_PERM_EXPR explicitely.
(vect_schedule_slp_instance): Likewise. Remove old
SLP_TREE_TWO_OPERATORS code.
(vectorizable_slp_permutation): New function.
Eric Botcazou [Sun, 26 Apr 2020 10:46:03 +0000 (12:46 +0200)]
[Ada] Fix small inefficiency in previous change to expander
2020-06-18 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* exp_ch4.adb (Get_Size_For_Range): Only make sure to return a
size lower than that of the original type if possible.
* libgnat/s-rannum.adb (Random_Discrete): Back out optimization
added for 32-bit types.
Arnaud Charlet [Thu, 23 Apr 2020 18:46:27 +0000 (14:46 -0400)]
[Ada] ACATS 4.1J - B854003 - Subtype conformance check missed
2020-06-18 Arnaud Charlet <charlet@adacore.com>
gcc/ada/
* sem_ch6.ads, sem_ch6.adb (Check_Formal_Conformance): New
subprogram.
(Check_Conformance): Move code to Check_Formal_Conformance.
* sem_ch8.adb (Analyze_Subprogram_Renaming): Check for formal
conformance when needed.
Eric Botcazou [Fri, 24 Apr 2020 20:50:50 +0000 (22:50 +0200)]
[Ada] Narrow large arithmetic and comparison operations
2020-06-18 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* exp_ch4.adb (Narrow_Large_Operation): New procedure to try
and narrow large arithmetic and comparison operations.
(Expand_N_In): Call it.
(Expand_N_Op_Abs): Likewise.
(Expand_N_Op_Add): Likewise.
(Expand_N_Op_Divide): Likewise.
(Expand_N_Op_Eq): Likewise.
(Expand_N_Op_Ge): Likewise.
(Expand_N_Op_Gt): Likewise.
(Expand_N_Op_Le): Likewise.
(Expand_N_Op_Lt): Likewise.
(Expand_N_Op_Minus): Likewise.
(Expand_N_Op_Mod): Likewise.
(Expand_N_Op_Multiply): Likewise.
(Expand_N_Op_Ne): Likewise.
(Expand_N_Op_Plus): Likewise.
(Expand_N_Op_Rem): Likewise.
(Expand_N_Op_Subtract): Likewise.
(Expand_N_Type_Conversion): Use Convert_To procedure.
* exp_ch9.adb (Is_Pure_Barrier) <N_Identifier>: Skip all
numeric types.
<N_Type_Conversion>: Use explicit criterion.
Eric Botcazou [Fri, 24 Apr 2020 20:05:35 +0000 (22:05 +0200)]
[Ada] Small cleanup in constraint checking code for allocators
2020-06-18 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* exp_ch4.adb (Expand_Allocator_Expression): Apply constraint
and predicate checks for the qualified expression on entry,
followed by constraint and predicate checks for the allocator
itself, and return early if this results in a static error.
(Expand_N_Allocator): Do not do the same here. Instead apply
constraint and predicate checks for arrays in the subtype
indication case.
* exp_ch5.adb (Expand_N_Assignment_Statement): Do not apply
range checks to allocators here.
Javier Miranda [Thu, 23 Apr 2020 17:36:43 +0000 (13:36 -0400)]
[Ada] Crash in tagged type constructor with task components
2020-06-18 Javier Miranda <miranda@adacore.com>
gcc/ada/
* exp_ch6.adb (BIP_Suffix_Kind, Is_Build_In_Place_Entity): Move
declarations...
* exp_ch6.ads: Here.
* exp_util.adb (Is_Secondary_Stack_BIP_Func_Call): Do not rely
on the name of the scope to locate the extra formal BIPalloc
since they are copied when the pointer type associated with
dispatching calls is built; rely on routines
Is_Build_In_Place_Entity and BIP_Suffix_Kind.
* exp_disp.adb (Expand_Dispatching_Call): Set the scope of the
first extra formal of the internally built pointer type.
* sem_ch3.adb (Derive_Subprogram): Do not inherit extra formals
from a limited interface parent since limitedness is not
inherited in such case (AI-419) and this affects the extra
formals.
* sprint.adb (Write_Itype): Output extra formals of subprogram
types.
Ghjuvan Lacambre [Thu, 23 Apr 2020 09:26:54 +0000 (11:26 +0200)]
[Ada] Update output of verbose error summary
2020-06-18 Ghjuvan Lacambre <lacambre@adacore.com>
gcc/ada/
* errout.adb (Write_Error_Summary): Display number of warnings
treated as errors.
* errutil.ads: Update comment.
Eric Botcazou [Thu, 23 Apr 2020 17:33:47 +0000 (19:33 +0200)]
[Ada] Small cleanup in the attribute code of the expander
2020-06-18 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* exp_attr.adb (Analyze_Attribute) <Asm_{In,Out}put>: Alphabetize.
<Component_Size>: Add check for universal integer attribute.
<Aft>, <Bit_Order>, <Definite>, <Max_Alignment_For_Allocation>,
<Scalar_Storage_Order>: Raise Program_Error on them.
* sem_attr.adb (Eval_Attribute) <Component_Size>: Add comment on
the packed array case.
Steve Baird [Thu, 23 Apr 2020 21:39:55 +0000 (14:39 -0700)]
[Ada] Implement AI12-0032 fixes for 'Old attribute accessibility
2020-06-18 Steve Baird <baird@adacore.com>
gcc/ada/
* sem_util.adb (Object_Access_Level): Treat a 'Old attribute
reference like an aggregate in determining its static
accessibility level; after the evaluation of the relevant
post-condition, the implicitly declared constant associated with
an Old attribute reference ceases to exist. Similarly for
Loop_Entry attribute.
* exp_ch6.adb (Expand_Call_Helper): For an attribute reference
that is expanded into a reference to an implicitly declared
constant (e.g., a 'Old or 'Loop_Entry attribute), compute the
dynamic accessibility level of that constant by looking at the
declaration of the constant (as opposed to looking at the
attribute reference).