platform/upstream/llvm.git
3 years ago[RISCV] Guard the ISD::EXTRACT_VECTOR_ELT handling in ReplaceNodeResults against...
Craig Topper [Thu, 18 Feb 2021 02:19:22 +0000 (18:19 -0800)]
[RISCV] Guard the ISD::EXTRACT_VECTOR_ELT handling in ReplaceNodeResults against fixed vectors and non-MVT types.

The type legalizer is calling this code based on the scalar type so
we need to verify the input type is a scalable vector.

The vector type has also not been legalized yet when this is called
so we need to use EVT for it.

3 years ago[mlir][sparse] generalize sparse storage format to many more types
Aart Bik [Thu, 18 Feb 2021 00:47:33 +0000 (16:47 -0800)]
[mlir][sparse] generalize sparse storage format to many more types

Rationale:
Narrower types for overhead storage yield a smaller memory footprint for
sparse tensors and thus needs to be supported. Also, more value types
need to be supported to deal with all kinds of kernels. Since the
"one-size-fits-all" sparse storage scheme implementation is used
instead of actual codegen, the library needs to be able to support
all combinations of desired types. With some crafty templating and
overloading, the actual code for this is kept reasonably sized though.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D96819

3 years ago[Clang][RISCV] Define RISC-V V builtin types
Hsiangkai Wang [Thu, 4 Feb 2021 04:57:36 +0000 (12:57 +0800)]
[Clang][RISCV] Define RISC-V V builtin types

Add the types for the RISC-V V extension builtins.

These types will be used by the RISC-V V intrinsics which require
types of the form <vscale x 1 x i64>(LMUL=1 element size=64) or
<vscale x 4 x i32>(LMUL=2 element size=32), etc. The vector_size
attribute does not work for us as it doesn't create a scalable
vector type. We want these types to be opaque and have no operators
defined for them. We want them to be sizeless. This makes them
similar to the ARM SVE builtin types. But we will have quite a bit
more types. This patch adds around 60. Later patches will add
another 230 or so types representing tuples of these types similar
to the x2/x3/x4 types in ARM SVE. But with extra complexity that
these types are combined with the LMUL concept that is unique to
RISCV.

For more background see this RFC
http://lists.llvm.org/pipermail/llvm-dev/2020-October/145850.html

Authored-by: Roger Ferrer Ibanez <roger.ferrer@bsc.es>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Differential Revision: https://reviews.llvm.org/D92715

3 years ago[AMDGPU] Fixed msan build
Stanislav Mekhanoshin [Thu, 18 Feb 2021 01:59:24 +0000 (17:59 -0800)]
[AMDGPU] Fixed msan build

LoadStoreOptimizer was using uninitialized SCC value for
instructions where it is unsupported.

3 years ago[flang][fir][NFC] clang-tidy change. Add include.
Eric Schweitz [Wed, 17 Feb 2021 23:34:18 +0000 (15:34 -0800)]
[flang][fir][NFC] clang-tidy change. Add include.

Differential Revision: https://reviews.llvm.org/D96912

3 years ago[XCOFF][NFC] make csect properties optional for getXCOFFSection
Chen Zheng [Thu, 18 Feb 2021 01:42:45 +0000 (20:42 -0500)]
[XCOFF][NFC] make csect properties optional for getXCOFFSection

We are going to support debug sections for XCOFF. So the csect
properties are not necessary. This patch makes these properties
optional.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D95931

3 years ago[flang][fir][NFC] Merge tablegen files.
Eric Schweitz [Wed, 17 Feb 2021 23:16:04 +0000 (15:16 -0800)]
[flang][fir][NFC] Merge tablegen files.

Differential Revision: https://reviews.llvm.org/D96908

3 years ago[libunwind] Add support for PC reg column in arm64
Marco Vanotti [Wed, 17 Feb 2021 21:42:40 +0000 (13:42 -0800)]
[libunwind] Add support for PC reg column in arm64

This change adds support for the dwarf PC register column in arm64, allowing
CFI directives to make use of it.

As of the last revision of the DWARF for ARM 64-bit architecture[0], the pc
register has been added as a valir register, with number 32.

This allows libunwinder to restore both pc and lr, which is useful
for stack switches and signal contexts.

[0]:
https://github.com/ARM-software/abi-aa/blob/f52e1ad3f81254497a83578dc102f6aac89e52d0/aadwarf64/aadwarf64.rst

Reviewed By: phosek, #libunwind

Differential Revision: https://reviews.llvm.org/D96901

3 years ago[NetBSD] Use cortex-a8 as default CPU for ARMv7
Joerg Sonnenberger [Thu, 18 Feb 2021 00:53:04 +0000 (01:53 +0100)]
[NetBSD] Use cortex-a8 as default CPU for ARMv7

This matches the platform default for GCC. It primarily matters when the
integrated assembler is not used as there is no default CPU defined for
ARMv7-A and GNU as is upset with -mcpu=generic.

3 years ago[AMDGPU] Mark SMRD atomics
Stanislav Mekhanoshin [Wed, 17 Feb 2021 00:34:24 +0000 (16:34 -0800)]
[AMDGPU] Mark SMRD atomics

We did not have atomic flags on SMRD, did not copy TSFlags
to real instructions, and did not have ret/noret atomic map.

At the moment it is NFC, but needed for D96469.

Differential Revision: https://reviews.llvm.org/D96823

3 years ago[WPD] Add an optional checking mode for debugging devirtualization
Teresa Johnson [Wed, 3 Feb 2021 21:12:40 +0000 (13:12 -0800)]
[WPD] Add an optional checking mode for debugging devirtualization

This adds an internal option -wholeprogramdevirt-check which if enabled
will guard each devirtualization with a runtime check against the
expected target, and an invocation of a debug trap if the check fails.
This is useful for debugging WPD failures involving undefined behavior
(e.g. casting to another class type not in the inheritance chain).

Differential Revision: https://reviews.llvm.org/D95969

3 years ago[gn build] add a comment to the goma_dir arg
Nico Weber [Thu, 18 Feb 2021 00:36:36 +0000 (19:36 -0500)]
[gn build] add a comment to the goma_dir arg

3 years ago[WebAssembly] Remove dependency of reference types from EH
Heejin Ahn [Wed, 17 Feb 2021 22:25:56 +0000 (14:25 -0800)]
[WebAssembly] Remove dependency of reference types from EH

The new spec does not have `exnref` so EH does not have dependency of
the reference types proposal anymore.

Reviewed By: dschuff

Differential Revision: https://reviews.llvm.org/D96903

3 years ago[AMDGPU] gfx90a support
Stanislav Mekhanoshin [Wed, 17 Feb 2021 21:37:46 +0000 (13:37 -0800)]
[AMDGPU] gfx90a support

Differential Revision: https://reviews.llvm.org/D96906

3 years ago[obj2yaml,yaml2obj] Add NumBlocks to the BBAddrMapEntry yaml field.
Rahman Lavaee [Wed, 17 Feb 2021 02:43:56 +0000 (18:43 -0800)]
[obj2yaml,yaml2obj] Add NumBlocks to the BBAddrMapEntry yaml field.

As discussed in D95511, this allows us to encode invalid BBAddrMap
sections to be used in more rigorous testing.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D96831

3 years ago[flang][fir][NFC] clang-tidy change
Eric Schweitz [Wed, 17 Feb 2021 23:27:55 +0000 (15:27 -0800)]
[flang][fir][NFC] clang-tidy change

Differential Revision: https://reviews.llvm.org/D96911

3 years ago[gn build] Port 7397905ab0a0
LLVM GN Syncbot [Wed, 17 Feb 2021 23:33:31 +0000 (23:33 +0000)]
[gn build] Port 7397905ab0a0

3 years ago[SampleFDO] Third Try: Refactor SampleProfile.cpp
Rong Xu [Wed, 17 Feb 2021 22:19:36 +0000 (14:19 -0800)]
[SampleFDO] Third Try: Refactor SampleProfile.cpp

Apply the patch for the third time after fixing buildbot failures.

Refactor SampleProfile.cpp to use the core code in CodeGen.
The main changes are:
(1) Move SampleProfileLoaderBaseImpl class to a header file.
(2) Split SampleCoverageTracker to a head file and a cpp file.
(3) Move the common codes (common options and callsiteIsHot())
to the common cpp file.
(4) Add inline keyword to avoid duplicated symbols -- they will
be removed later when the class is changed to a template.

Differential Revision: https://reviews.llvm.org/D96455

3 years ago[gold] Match lld WPD behavior for shared library symbols and add test
Teresa Johnson [Mon, 15 Feb 2021 17:19:50 +0000 (09:19 -0800)]
[gold] Match lld WPD behavior for shared library symbols and add test

lld already marks shared library defs as ExportDynamic, which prevents
potentially unsafe devirtualization of symbols defined in shared
libraries. Match that behavior in the gold plugin, and add the same
test.

Depends on D96721.

Differential Revision: https://reviews.llvm.org/D96722

3 years ago[OpenMP] fix race condition in test
AndreyChurbanov [Wed, 17 Feb 2021 23:27:49 +0000 (02:27 +0300)]
[OpenMP] fix race condition in test

3 years ago[libomptarget][amdgcn] Remove lookup of .language msgpack field
Jon Chesterfield [Wed, 17 Feb 2021 23:02:16 +0000 (23:02 +0000)]
[libomptarget][amdgcn] Remove lookup of .language msgpack field

3 years ago[MLIR][TOSA] Expand Tosa int types to I8 and I16
Rob Suderman [Wed, 17 Feb 2021 22:01:32 +0000 (14:01 -0800)]
[MLIR][TOSA] Expand Tosa int types to I8 and I16

Tosa integers should include I8 and I16 values.

Differential Revision: https://reviews.llvm.org/D96900

3 years ago[libc++abi] Add builtins to dynamic library link
Patrick Oppenlander [Wed, 17 Feb 2021 22:04:36 +0000 (17:04 -0500)]
[libc++abi] Add builtins to dynamic library link

Otherwise libc++abi.so fails to link on arm with undefined references to
some __aeabi_ builtins.

Differential Revision: https://reviews.llvm.org/D96574

3 years ago[GlobalISel] Implement computeKnownBits for G_ASSERT_SEXT
Jessica Paquette [Wed, 17 Feb 2021 19:54:51 +0000 (11:54 -0800)]
[GlobalISel] Implement computeKnownBits for G_ASSERT_SEXT

Implementation is the same as G_SEXT_INREG.

Differential Revision: https://reviews.llvm.org/D96899

3 years ago[GlobalISel] Implement computeNumSignBits for G_ASSERT_SEXT
Jessica Paquette [Wed, 17 Feb 2021 19:35:46 +0000 (11:35 -0800)]
[GlobalISel] Implement computeNumSignBits for G_ASSERT_SEXT

Same implementation as G_SEXT_INREG.

Add a testcase to combine-sext-inreg for a concrete example, and a testcase
to KnownBitsTest.

Differential Revision: https://reviews.llvm.org/D96897

3 years ago[Driver] Clean up some Separate form options
Fangrui Song [Wed, 17 Feb 2021 21:49:41 +0000 (13:49 -0800)]
[Driver] Clean up some Separate form options

Drop the `Separate` form of `-fmodule-name X`, `-fprofile-remapping-file X`, and `-frewrite-map-file X`.
To the best of my knowledge they are not used. Their conventional Joined forms (`-fFOO=`) should be used instead.

`-fdebug-compilation-dir X` is used in several places, e.g.  chromium/infra/goma.
It is also advertised in http://blog.llvm.org/2019/11/deterministic-builds-with-clang-and-lld.html
So we keep it but make the EQ form canonical and the Separate form an alias.

Differential Revision: https://reviews.llvm.org/D96886

3 years ago[OpenMP][NFC] replaced 'dependencies' with 'dependences' in comments and debug prints
AndreyChurbanov [Wed, 17 Feb 2021 21:38:18 +0000 (00:38 +0300)]
[OpenMP][NFC] replaced 'dependencies' with 'dependences' in comments and debug prints

3 years ago[flang] Warn about useless explicit typing of intrinsics
peter klausler [Wed, 17 Feb 2021 18:24:14 +0000 (10:24 -0800)]
[flang] Warn about useless explicit typing of intrinsics

Fortran 2018 explicitly permits an ignored type declaration
for the result of a generic intrinsic function.  See the comment
added to Semantics/expression.cpp for an explanation of why this
is somewhat dangerous and worthy of a warning.

Differential Revision: https://reviews.llvm.org/D96879

3 years ago[SystemZ] Separate LoZ ELF specifics in tablegen.
Yusra Syeda [Wed, 17 Feb 2021 21:06:02 +0000 (16:06 -0500)]
[SystemZ] Separate LoZ ELF specifics in tablegen.

Separate the LoZ ELF calling convention in tablegen.
This will make it easier to add the z/OS ABI in future patches.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D96867

3 years ago[GlobalISel] Add G_ASSERT_SEXT
Jessica Paquette [Wed, 17 Feb 2021 18:57:10 +0000 (10:57 -0800)]
[GlobalISel] Add G_ASSERT_SEXT

This adds a G_ASSERT_SEXT opcode, similar to G_ASSERT_ZEXT. This instruction
signifies that an operation was already sign extended from a smaller type.

This is useful for functions with sign-extended parameters.

E.g.

```
define void @foo(i16 signext %x) {
 ...
}
```

This adds verifier, regbankselect, and instruction selection support for
G_ASSERT_SEXT equivalent to G_ASSERT_ZEXT.

Differential Revision: https://reviews.llvm.org/D96890

3 years agoBugfix for collecting features from very small DSOs.
Aaron Green [Wed, 17 Feb 2021 21:00:44 +0000 (13:00 -0800)]
Bugfix for collecting features from very small DSOs.

During unit tests, it was observed that crafting an artificially small DSO could cause OOB memory to be accessed. This change fixes that (but again, the affected DSOs are unlikely to ever occur outside unit tests).

Reviewed By: morehouse, charco

Differential Revision: https://reviews.llvm.org/D94507

3 years ago[WPD][lld] Test handling of vtable definition from shared libraries
Teresa Johnson [Mon, 15 Feb 2021 01:48:34 +0000 (17:48 -0800)]
[WPD][lld] Test handling of vtable definition from shared libraries

Adds a lld test for a case that the handling added for dynamically
exported symbols in 1487747e990ce9f8851f3d92c3006a74134d7518 already
fixes. Because isExportDynamic returns true when the symbol is
SharedKind with default visibility, it will treat as dynamically
exported and block devirtualization when the definition of a vtable
comes from a shared library. This is desireable as it is dangerous to
devirtualize in that case, since there could be hidden overrides in the
shared library. Typically that happens when the shared library header
contains available externally definitions, which applications can
override. An example is std::error_category, which is overridden in LLVM
and causing failures after a self build with WPD enabled, because
libstdc++ contains hidden overrides of the virtual base class methods.

The regular LTO case in the new test already worked, but there are
2 fixes in this patch needed for the index-only case and the hybrid
LTO case. For the index-only case, WPD should not simply ignore
available externally vtables. A follow on fix will be made to clang to
emit type metadata for those vtables, which the new test is modeling.
For the hybrid case, we need to ensure when the module is split that any
llvm.*used globals are cloned to the regular LTO split module so
available externally vtable definitions are not prematurely deleted.

Another follow on fix will add the equivalent gold test, which requires
a small fix to the plugin to treat symbols in dynamic libraries the same
way lld already is.

Differential Revision: https://reviews.llvm.org/D96721

3 years agoBasic block sections should enable not function sections implicitly.
Sriraman Tallam [Wed, 17 Feb 2021 20:34:37 +0000 (12:34 -0800)]
Basic block sections should enable not function sections implicitly.

Basic block sections enables function sections implicitly, this is not needed
and is inefficient with "=list" option.

We had basic block sections enable function sections implicitly in clang. This
is particularly inefficient with "=list" option as it places functions that do
not have any basic block sections in separate sections. This causes unnecessary
object file overhead for large applications.

This patch disables this implicit behavior. It only creates function sections
for those functions that require basic block sections.

This patch is the second of two patches and this patch removes the implicit
enabling of function sections with basic block sections in clang.

Differential Revision: https://reviews.llvm.org/D93876

3 years agofix comment typo to cycle bots
Nico Weber [Wed, 17 Feb 2021 20:29:39 +0000 (15:29 -0500)]
fix comment typo to cycle bots

3 years ago[WebAssemblly] Fix EHPadStack update in fixCallUnwindMismatches
Heejin Ahn [Mon, 15 Feb 2021 15:32:51 +0000 (07:32 -0800)]
[WebAssemblly] Fix EHPadStack update in fixCallUnwindMismatches

Updating `EHPadStack` with respect to `TRY` and `CATCH` instructions
have to be done after checking all other conditions, not before. Because
we did this before checking other conditions, when we encounter `TRY`
and we want to record the current mismatching range, we already have
popped up the entry from `EHPadStack`, which we need to access to record
the range.

The `baz` call in the added test needs try-delegate because the previous
TRY marker placement for `quux` was placed before `baz`, because `baz`'s
return value was stackified in RegStackify. If this wasn't stackified
this try-delegate is not strictly necessary, but at the moment it is not
easy to identify cases like this. I plan to transfer `nounwind`
attributes from the LLVM IR to prevent cases like this. The call in the
test does not have `unwind` attribute in order to test this bug, but in
many cases of this pattern the previous call has `nounwind` attribute.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D96711

3 years ago[NFC][RegAlloc] InlineSpiller::Original is a Register
Mircea Trofin [Wed, 17 Feb 2021 20:07:27 +0000 (12:07 -0800)]
[NFC][RegAlloc] InlineSpiller::Original is a Register

3 years ago[gn build] make WindowsManifestMerger.cpp build fine with sysroot
Nico Weber [Wed, 17 Feb 2021 19:47:02 +0000 (14:47 -0500)]
[gn build] make WindowsManifestMerger.cpp build fine with sysroot

This already works in the cmake build.

Differential Revision: https://reviews.llvm.org/D96889

3 years ago[NFC][clang] Bump up DIAG_SIZE_SEMA for downstream diagnostics
Zixu Wang [Wed, 17 Feb 2021 19:44:43 +0000 (11:44 -0800)]
[NFC][clang] Bump up DIAG_SIZE_SEMA for downstream diagnostics

Bump DIAG_SIZE_SEMA up by 500 to accommodate extra downstream diagnostics

Differential Revision: https://reviews.llvm.org/D96888

3 years ago[RISCV] Localize RISCVZvlssegTable to RISCVISelDAGToDAG.cpp, the only place it is...
Craig Topper [Wed, 17 Feb 2021 19:37:06 +0000 (11:37 -0800)]
[RISCV] Localize RISCVZvlssegTable to RISCVISelDAGToDAG.cpp, the only place it is used.

3 years ago[flang] Ensure that intrinsic procedures are PURE &/or ELEMENTAL
peter klausler [Wed, 17 Feb 2021 18:11:29 +0000 (10:11 -0800)]
[flang] Ensure that intrinsic procedures are PURE &/or ELEMENTAL

The intrinsic procedure table properly classify the various
intrinsics, but the PURE and ELEMENTAL attributes that these
classifications imply don't always make it to the utility
predicates that test symbols for them, leading to spurious
error messages in some contexts.  So set those attribute flags
as appropriate in name resolution, using a new function to
isolate the tests.

An alternate solution, in which the predicates would query
the intrinsic procedure table for these attributes on demand,
was something I also tried, so that this information could
come directly from an authoritative source; but it would have
required references to the intrinsic table to be passed along
on too many seemingly unrelated APIs and ended up looking messy.

Several symbol table tests needed to have their expected outputs
augmented with the PURE and ELEMENTAL flags.  Some bogus messages
that were flagged as such in test/Semantics/doconcurrent01.f90 were
removed, since they are now correctly not emitted.

Differential Revision: https://reviews.llvm.org/D96878

3 years ago[WebAssembly] Do not use EHCatchret symbols with wasm EH
Derek Schuff [Wed, 17 Feb 2021 00:35:27 +0000 (16:35 -0800)]
[WebAssembly] Do not use EHCatchret symbols with wasm EH

D94835 added support for WinEH to export public symbols pointing to
basic blocks which are catchret targets for use with Windows CET.
Wasm currently doesn't support public symbols to non-function code
addresses (they get treated like new functions in asm but then don't
lower to object files correctly).
It created them unconditionally for all catchret targets.

This change disables those symbols unless the exceptionHandlingType
is WinEH (since they aren't used with ExceptionHandling::Wasm)

Differential Revision: https://reviews.llvm.org/D96824

3 years ago[RISCV] Use bits<7> instead of bits<11> for the EEW field size in the RISCVZvlsseg...
Craig Topper [Wed, 17 Feb 2021 19:11:58 +0000 (11:11 -0800)]
[RISCV] Use bits<7> instead of bits<11> for the EEW field size in the RISCVZvlsseg searchable table. NFCI

We only support 8, 16, 32, and 64 for EEW. These only need 7 bits
to represent.

3 years ago[SROA] Amend failing test from D95826
William S. Moses [Wed, 17 Feb 2021 18:54:42 +0000 (13:54 -0500)]
[SROA] Amend failing test from D95826

3 years agosysroot.py: add support for non-darwin platforms
Nico Weber [Wed, 17 Feb 2021 18:48:10 +0000 (13:48 -0500)]
sysroot.py: add support for non-darwin platforms

CMAKE_SYSROOT works fine here, and `sysroot.py make-fake`
borders on trivial here, but I suppose it's still nice
to have a consistent script to set these up across platforms.

And these are the platforms where we can do real sysroot management one
day.

Differential Revision: https://reviews.llvm.org/D96882

3 years ago[gn build] Port c28622fbf363
LLVM GN Syncbot [Wed, 17 Feb 2021 18:30:02 +0000 (18:30 +0000)]
[gn build] Port c28622fbf363

3 years ago[mlir] silence unused-function warnings in table-generated code
Alex Zinenko [Mon, 15 Feb 2021 09:52:19 +0000 (10:52 +0100)]
[mlir] silence unused-function warnings in table-generated code

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D96695

3 years agoRevert "[SampleFDO] Reapply: Refactor SampleProfile.cpp"
Vedant Kumar [Wed, 17 Feb 2021 18:20:40 +0000 (10:20 -0800)]
Revert "[SampleFDO] Reapply: Refactor SampleProfile.cpp"

Revert "[SampleFDO] Add missing #includes to unbreak modules build after D96455"

This reverts commit c73cbf218a289029cc0b54183c3cf79454ecc76f.

Revert "[SampleFDO] Fix MSVC "namespace uses itself" warning (NFC)"

This reverts commit a23e6b321ca623b83252f8b1e06a2ad4fc441f89.

Revert "[SampleFDO] Reapply: Refactor SampleProfile.cpp"

This reverts commit 6fd5ccff72eeaffcb3b3ba2696282015aab755bc.

Still seeing link failures when building llc (or other tools), due to
the new SampleProfileLoaderBaseImpl.h containing definitions that get
duplicated across multiple TU's.

```
duplicate symbol 'llvm::SampleProfileLoaderBaseImpl::findEquivalenceClasses(llvm::Function&)' in:
    tools/llc/CMakeFiles/llc.dir/llc.cpp.o
    lib/libLLVMInstCombine.a(InstCombineVectorOps.cpp.o)
duplicate symbol 'llvm::SampleProfileLoaderBaseImpl::buildEdges(llvm::Function&)' in:
    tools/llc/CMakeFiles/llc.dir/llc.cpp.o
    lib/libLLVMInstCombine.a(InstCombineVectorOps.cpp.o)
duplicate symbol 'llvm::SampleProfileLoaderBaseImpl::computeDominanceAndLoopInfo(llvm::Function&)' in:
    tools/llc/CMakeFiles/llc.dir/llc.cpp.o
    lib/libLLVMInstCombine.a(InstCombineVectorOps.cpp.o)
duplicate symbol 'llvm::SampleProfileLoaderBaseImpl::getFunctionLoc(llvm::Function&)' in:
    tools/llc/CMakeFiles/llc.dir/llc.cpp.o
    lib/libLLVMInstCombine.a(InstCombineVectorOps.cpp.o)
duplicate symbol 'llvm::SampleProfileLoaderBaseImpl::getBlockWeight(llvm::BasicBlock const*)' in:
    tools/llc/CMakeFiles/llc.dir/llc.cpp.o
    lib/libLLVMInstCombine.a(InstCombineVectorOps.cpp.o)
duplicate symbol 'llvm::SampleProfileLoaderBaseImpl::printBlockWeight(llvm::raw_ostream&, llvm::BasicBlock const*) const' in:
    tools/llc/CMakeFiles/llc.dir/llc.cpp.o
    lib/libLLVMInstCombine.a(InstCombineVectorOps.cpp.o)
duplicate symbol 'llvm::SampleProfileLoaderBaseImpl::printBlockEquivalence(llvm::raw_ostream&, llvm::BasicBlock const*)' in:
    tools/llc/CMakeFiles/llc.dir/llc.cpp.o
    lib/libLLVMInstCombine.a(InstCombineVectorOps.cpp.o)
duplicate symbol 'llvm::SampleProfileLoaderBaseImpl::printEdgeWeight(llvm::raw_ostream&, std::__1::pair<llvm::BasicBlock const*, llvm::BasicBlock const*>)' in:
    tools/llc/CMakeFiles/llc.dir/llc.cpp.o
    lib/libLLVMInstCombine.a(InstCombineVectorOps.cpp.o)
```

3 years ago[WebAssembly] Change catch_all's opcode
Heejin Ahn [Wed, 17 Feb 2021 13:27:19 +0000 (05:27 -0800)]
[WebAssembly] Change catch_all's opcode

We decided to change `catch_all`'s opcode from 0x05, which is the same
as `else`, to 0x19, to avoid some complicated handling in the tools.

See: https://github.com/WebAssembly/exception-handling/issues/147

Reviewed By: sbc100

Differential Revision: https://reviews.llvm.org/D96863

3 years ago[RISCV] Merge the handlers for masked and unmasked segment loads/stores.
Craig Topper [Wed, 17 Feb 2021 06:58:14 +0000 (22:58 -0800)]
[RISCV] Merge the handlers for masked and unmasked segment loads/stores.

A lot of the code for the masked and unmasked is the same. This
patch adds a boolean to handle the differences so we can share
the code.

Differential Revision: https://reviews.llvm.org/D96841

3 years ago[RISCV] Merge the vsetvli and vsetvlimax intrinsic selection
Craig Topper [Wed, 17 Feb 2021 03:46:44 +0000 (19:46 -0800)]
[RISCV] Merge the vsetvli and vsetvlimax intrinsic selection

These have very similar code just with a different number of
operands and handling for vsetivl.

Differential Revision: https://reviews.llvm.org/D96834

3 years ago[mlir] Add fma operation to std dialect
Eugene Zhulenev [Wed, 17 Feb 2021 16:34:33 +0000 (08:34 -0800)]
[mlir] Add fma operation to std dialect

Will remove `vector.fma` operation in the followup CLs.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D96801

3 years agotsan: fix mmap_lots test
Dmitry Vyukov [Wed, 17 Feb 2021 16:43:16 +0000 (17:43 +0100)]
tsan: fix mmap_lots test

If tsan runtime will try to allocate something during exit handling,
the allocation will fail because there is no VA whatsoever.
It's observed to fail with the following error in some cases:
failed to allocate 0x1000 (4096) bytes of DTLS_NextBlock.
So terminate the process immediately.

Reviewed-in: https://reviews.llvm.org/D96874

3 years ago[SampleFDO] Add missing #includes to unbreak modules build after D96455
Vedant Kumar [Wed, 17 Feb 2021 18:01:09 +0000 (10:01 -0800)]
[SampleFDO] Add missing #includes to unbreak modules build after D96455

Bot: http://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/28999

```
/Users/buildslave/jenkins/workspace/lldb-cmake/llvm-project/llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h:124:19: error: missing '#include "llvm/Analysis/PostDominators.h"'; 'PostDominatorTree' must be declared before it is used
  std::unique_ptr<PostDominatorTree> PDT;
                  ^
/Users/buildslave/jenkins/workspace/lldb-cmake/llvm-project/llvm/include/llvm/Analysis/PostDominators.h:28:7: note: declaration here is not visible
class PostDominatorTree : public PostDomTreeBase<BasicBlock> {
      ^
While building module 'LLVM_Transforms' imported from /Users/buildslave/jenkins/workspace/lldb-cmake/llvm-project/llvm/lib/Transforms/CFGuard/CFGuard.cpp:15:
In file included from <module-includes>:191:
/Users/buildslave/jenkins/workspace/lldb-cmake/llvm-project/llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h:125:19: error: missing '#include "llvm/Analysis/LoopInfo.h"'; 'LoopInfo' must be declared before it is used
  std::unique_ptr<LoopInfo> LI;
                  ^
/Users/buildslave/jenkins/workspace/lldb-cmake/llvm-project/llvm/include/llvm/Analysis/LoopInfo.h:1079:7: note: declaration here is not visible
class LoopInfo : public LoopInfoBase<BasicBlock, Loop> {
      ^
While building module 'LLVM_Transforms' imported from /Users/buildslave/jenkins/workspace/lldb-cmake/llvm-project/llvm/lib/Transforms/CFGuard/CFGuard.cpp:15:
In file included from <module-includes>:191:
/Users/buildslave/jenkins/workspace/lldb-cmake/llvm-project/llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h:149:3: error: missing '#include "llvm/Analysis/OptimizationRemarkEmitter.h"'; 'OptimizationRemarkEmitter' must be declared before it is used
  OptimizationRemarkEmitter *ORE = nullptr;
  ^
/Users/buildslave/jenkins/workspace/lldb-cmake/llvm-project/llvm/include/llvm/Analysis/OptimizationRemarkEmitter.h:33:7: note: declaration here is not visible
class OptimizationRemarkEmitter {
      ^
/Users/buildslave/jenkins/workspace/lldb-cmake/llvm-project/llvm/lib/Transforms/CFGuard/CFGuard.cpp:15:10: fatal error: could not build module 'LLVM_Transforms'
```

3 years ago[lldb] Improve error message for modules with dots or dashes
Jonas Devlieghere [Wed, 17 Feb 2021 17:30:07 +0000 (09:30 -0800)]
[lldb] Improve error message for modules with dots or dashes

LLDB does not like to import Python files with dashes or dots in their
name. While the former are technically allowed, it is discouraged. Dots
are allowed for subpackages but not in module names. This patch improves
the user experience by printing a useful error.

Before this patch:

  error: module importing failed: SyntaxError('invalid syntax',
  ('<string>', 1, 11, 'import foo-bar\n'))

After this patch:

  error: module importing failed: Python discourages dashes in module
  names: foo-bar

rdar://74263511

[1] https://www.python.org/dev/peps/pep-0008/#package-and-module-names

Differential revision: https://reviews.llvm.org/D96833

3 years ago[libcxx] Implement is_absolute properly for windows
Martin Storsjö [Sun, 1 Nov 2020 21:39:03 +0000 (23:39 +0200)]
[libcxx] Implement is_absolute properly for windows

Differential Revision: https://reviews.llvm.org/D91177

3 years ago[Pipeliner] Fixed optimization remarks and debug dumps Initiation
Marianne Mailhot-Sarrasin [Wed, 17 Feb 2021 17:14:03 +0000 (12:14 -0500)]
[Pipeliner] Fixed optimization remarks and debug dumps Initiation
Interval value

The II value was incremented before exiting the loop, and therefor when
used in the optimization remarks and debug dumps it did not reflect the
initiation interval actually used in Schedule.

Differential Revision: https://reviews.llvm.org/D95692

3 years ago[SROA] Propagate correct TBAA/TBAA Struct offsets
William S. Moses [Mon, 1 Feb 2021 23:16:17 +0000 (18:16 -0500)]
[SROA] Propagate correct TBAA/TBAA Struct offsets

SROA does not correctly account for offsets in TBAA/TBAA struct metadata.
This patch creates functionality for generating new MD with the corresponding
offset and updates SROA to use this functionality.

Differential Revision: https://reviews.llvm.org/D95826

3 years ago[NPM][LTO] Update buildLTODefaultPipeline to be more in-line with the old pass manager
David Green [Wed, 17 Feb 2021 16:56:28 +0000 (16:56 +0000)]
[NPM][LTO] Update buildLTODefaultPipeline to be more in-line with the old pass manager

The NPM LTO pipeline has a lot of fixme's and missing passes, causing a
lot of regressions after the switch in c70737b. Notably unrolling and
vectorization were both disabled, but many other passes are missing
compared to the old pass manager. This attempt to enable the most
obvious missing passes like the unroller, vectorization and other loop
passes, fixing the existing FIXME comments.

Differential Revision: https://reviews.llvm.org/D96780

3 years ago[NFC] Refactor LoopInterchange into a loop-nest pass
Ta-Wei Tu [Wed, 17 Feb 2021 16:55:03 +0000 (00:55 +0800)]
[NFC] Refactor LoopInterchange into a loop-nest pass

This is the preliminary patch of converting `LoopInterchange` pass to a loop-nest pass and has no intended functional change.
Changes that are not loop-nest related are split to D96650.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D96644

3 years agofix comment typo to cycle bots
Nico Weber [Wed, 17 Feb 2021 16:52:24 +0000 (11:52 -0500)]
fix comment typo to cycle bots

3 years ago[LSR] Add a flag that overrides the target's preferred addressing mode
Sjoerd Meijer [Wed, 17 Feb 2021 15:32:04 +0000 (15:32 +0000)]
[LSR] Add a flag that overrides the target's preferred addressing mode

This adds a new flag -lsr-preferred-addressing-mode to override the target's
preferred addressing mode. It replaces flag -lsr-backedge-indexing, which is
equivalent to preindexed addressing that is one of the options that
-lsr-preferred-addressing-mode accepts.

Differential Revision: https://reviews.llvm.org/D96855

3 years agofix comment typo to cycle bots
Nico Weber [Wed, 17 Feb 2021 16:49:23 +0000 (11:49 -0500)]
fix comment typo to cycle bots

3 years ago[libc++] Allow retries in a few more flaky tests
Louis Dionne [Wed, 17 Feb 2021 16:19:37 +0000 (11:19 -0500)]
[libc++] Allow retries in a few more flaky tests

3 years ago[InstCombine] fold fcmp-of-copysign idiom
Sanjay Patel [Wed, 17 Feb 2021 15:16:12 +0000 (10:16 -0500)]
[InstCombine] fold fcmp-of-copysign idiom

As discussed in:
https://llvm.org/PR49179
...this pattern shows up in library code.
There are several potential generalizations as noted,
but we need to be careful that we get FP special-values
right, and it's not clear how much variation we should
expect to see from this exact idiom.

3 years ago[InstCombine] add tests for fcmp-of-copysign; NFC
Sanjay Patel [Wed, 17 Feb 2021 14:20:04 +0000 (09:20 -0500)]
[InstCombine] add tests for fcmp-of-copysign; NFC

https://llvm.org/PR49179

3 years agobuild: Add LLVM_WINSYSROOT to make setting /winsysroot easy on Win
Nico Weber [Wed, 17 Feb 2021 15:03:02 +0000 (10:03 -0500)]
build: Add LLVM_WINSYSROOT to make setting /winsysroot easy on Win

Also add a script for sysroot management. For now, it can only create
fake sysroots that just symlink to local folders. This is useful for
testing.

Differential Revision: https://reviews.llvm.org/D96868

3 years ago[mlir][StandardToSPIRV] Add support for lowering trunci to SPIR-V to i1 types.
Hanhan Wang [Wed, 17 Feb 2021 14:55:10 +0000 (06:55 -0800)]
[mlir][StandardToSPIRV] Add support for lowering trunci to SPIR-V to i1 types.

Add a pattern to converting some value to a boolean. spirv.S/UConvert does not
work on i1 types. Thus, the pattern is lowered to cmpi + select.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D96851

3 years ago[lldb][NFC] Delete deleted const char* overloads of SetValueFromString
Raphael Isemann [Wed, 17 Feb 2021 15:11:33 +0000 (16:11 +0100)]
[lldb][NFC] Delete deleted const char* overloads of SetValueFromString

This came up during the review of D96817 because those deleted overloads force
the caller to explicitly create a StringRef when passing a string literal.

It seems they were added as some kind of help while migrating the code base to
StringRef in D24847, but I don't think they have any use these days and make
these functions awkward to use.

This patch just removes all the deleted overloads.

Reviewed By: tatyana-krasnukha

Differential Revision: https://reviews.llvm.org/D96861

3 years ago[Fuzzer][Test] Use %python substitution for trace-malloc-unbalanced.test
Jonny Farley [Tue, 16 Feb 2021 16:34:35 +0000 (16:34 +0000)]
[Fuzzer][Test] Use %python substitution for trace-malloc-unbalanced.test

This test was found to fail for some of our downstream builds, on
computers where python was not on the default $PATH. Therefore
add a %python substitution to use sys.executable, based on similar
solutions for python calls in tests elsewhere in LLVM.

Differential Revision: https://reviews.llvm.org/D96799

3 years ago[PowerPC][AIX] Enable Shrinkwrapping on 32 and 64 bit AIX.
Sidharth Baveja [Wed, 17 Feb 2021 14:54:57 +0000 (14:54 +0000)]
[PowerPC][AIX] Enable Shrinkwrapping on 32 and 64 bit AIX.

Summary:
Currently Shrinkwrap is not enabled on AIX.
This patch enables shrink wrap on 32 and 64 bit AIX, and 64 bit ELF.

Reviewed By: sfertile, nemanjai

Differential Revision: https://reviews.llvm.org/D95094

3 years ago[clangd] IndexedFiles should include Fils from RefSlab and RelationSlab.
Haojian Wu [Wed, 17 Feb 2021 14:40:12 +0000 (15:40 +0100)]
[clangd] IndexedFiles should include Fils from RefSlab and RelationSlab.

This looks like an oversight.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D96845

3 years ago[clangd] Pass file when possible to resolve URI.
Haojian Wu [Wed, 17 Feb 2021 07:39:52 +0000 (08:39 +0100)]
[clangd] Pass file when possible to resolve URI.

Some URI scheme needs the hint path to do a correct resolution, we pass
one of the open files as hint path.

This is not perfect, and it might not work for opening files across
project, but it would fix a bug with our internal scheme.

in the long run, removing URIs from all the index internals is a more proper fix.

Differential Revision: https://reviews.llvm.org/D96844

3 years ago[PowerPC] Handle FP physical register in inline asm constraint.
Sean Fertile [Wed, 17 Feb 2021 14:22:43 +0000 (09:22 -0500)]
[PowerPC] Handle FP physical register in inline asm constraint.

Do not defer to the base class when the register constraint is a
physical fpr. The base class will select SPILLTOVSRRC as the register
class and register allocation will fail on subtargets without VSX
registers.

Differential Revision: https://reviews.llvm.org/D91629

3 years ago[ARM] Add MVE abs costs
David Green [Wed, 17 Feb 2021 14:21:09 +0000 (14:21 +0000)]
[ARM] Add MVE abs costs

Similar to min/max, this increases the accuracy of abs intrinsics costs
under MVE.

3 years ago[OpenCL] Support enum and typedef args in TableGen BIFs
Sven van Haastregt [Wed, 17 Feb 2021 14:17:43 +0000 (14:17 +0000)]
[OpenCL] Support enum and typedef args in TableGen BIFs

Add enum and typedef argument support to `-fdeclare-opencl-builtins`,
which was the last major missing feature.

Adding the remaining missing builtins is left as future work.

Differential Revision: https://reviews.llvm.org/D96051

3 years ago[AMDGPU] Add implicit vcc_lo on S_CBRANCH_VCCNZ in wave32
Piotr Sobczak [Wed, 17 Feb 2021 09:56:29 +0000 (10:56 +0100)]
[AMDGPU] Add implicit vcc_lo on S_CBRANCH_VCCNZ in wave32

* Update skip-if-dead.ll with tests for wave32.
* Fix the crash in verifier in one newly enabled test by adding
  missing fixImplicitOperands in branch insertion code.

```
*** Bad machine code: Using an undefined physical register ***
- function:    test_kill_divergent_loop
- basic block: %bb.2 bb (0xad96308)
- instruction: S_CBRANCH_VCCNZ %bb.1, implicit $vcc_lo
- operand 1:   implicit $vcc_lo
LLVM ERROR: Found 1 machine code errors.
```

* Simplify "cbranch_kill" to not use interp instructions.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D96793

3 years agoUse LoopRotate PrepareForLTO stage in NPM
Sanne Wouda [Mon, 8 Feb 2021 16:13:28 +0000 (16:13 +0000)]
Use LoopRotate PrepareForLTO stage in NPM

The PrepareForLTO stage of LoopRotate tries to avoid unrolling loops
with calls that might be inlined later.  See D94232 where this was
introduced.

We didn't catch all occurances of the LoopRotatePass in the New Pass
Manager, so the original regression in astar returned with the pass
manager switch.

3 years ago[mlir][spirv] Add spv.GLSL.FrexpStruct
Weiwei Li [Wed, 17 Feb 2021 14:00:28 +0000 (09:00 -0500)]
[mlir][spirv] Add spv.GLSL.FrexpStruct

co-authored-by: Alan Liu <alanliu.yf@gmail.com>

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D96527

3 years ago[ARM] MVE abs intrinsic costs. NFC
David Green [Wed, 17 Feb 2021 13:54:17 +0000 (13:54 +0000)]
[ARM] MVE abs intrinsic costs. NFC

3 years ago[libcxx] Implement parsing of root_name for paths on windows
Martin Storsjö [Tue, 3 Nov 2020 21:52:32 +0000 (23:52 +0200)]
[libcxx] Implement parsing of root_name for paths on windows

Differential Revision: https://reviews.llvm.org/D91176

3 years ago[clang][cli] Documentation of CompilerInvocation parsing/generation
Jan Svoboda [Mon, 1 Feb 2021 11:33:23 +0000 (12:33 +0100)]
[clang][cli] Documentation of CompilerInvocation parsing/generation

This patch documents command line parsing in `-cc1`, `CompilerInvocation` and the marshalling infrastructure for command line options.

Reviewed By: Bigcheese

Differential Revision: https://reviews.llvm.org/D95790

3 years ago[NFC] Use the same type for bit fields in MCSchedClassDesc
Andrew Savonichev [Wed, 3 Feb 2021 15:07:18 +0000 (18:07 +0300)]
[NFC] Use the same type for bit fields in MCSchedClassDesc

Otherwise they are not allocated as a single bit field and take 4
bytes instead of 2.

Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D95954

3 years ago[RISCV] Simplify BP initialisation
luxufan [Wed, 17 Feb 2021 12:15:21 +0000 (20:15 +0800)]
[RISCV] Simplify BP initialisation

We can re-use copyPhysReg rather than writing a specialised copy.

Differential Revision: https://reviews.llvm.org/D95227

3 years ago[DAG] Pull out getTruncatedUSUBSAT helper from foldSubToUSubSat. NFCI.
Simon Pilgrim [Wed, 17 Feb 2021 12:17:08 +0000 (12:17 +0000)]
[DAG] Pull out getTruncatedUSUBSAT helper from foldSubToUSubSat. NFCI.

This will simplify an incoming generic implementation of D25987.

I'll rebase D96703 shortly to support this.

3 years ago[DAG] Fold shuffle(bop(shuffle(x,y),shuffle(z,w)),bop(shuffle(a,b),shuffle(c,d))...
Simon Pilgrim [Wed, 17 Feb 2021 11:41:41 +0000 (11:41 +0000)]
[DAG] Fold shuffle(bop(shuffle(x,y),shuffle(z,w)),bop(shuffle(a,b),shuffle(c,d))) (REAPPLIED)

Fold shuffle(bop(shuffle(x,y),shuffle(z,w)),bop(shuffle(a,b),shuffle(c,d))) -> bop(shuffle(x,y),shuffle(z,w)),bop(shuffle(a,b),shuffle(c,d))

Attempt to fold from a shuffle of a pair of binops to a binop of shuffles, as long as one/both of the binop sources are also shuffles that can be merged with the outer shuffle. This should guarantee that we remove one binop without introducing any additional shuffles.

Technically there's potential for a merged shuffle's lowering to be poorer than the original shuffle, but it could also be better, and I'm not seeing any regressions as long as we keep the 'don't merge splats' rule already present in MergeInnerShuffle.

This expands and generalizes an existing X86 combine and attempts to merge either of each binop's sources (with an on-the-fly commutation of the shuffle mask) - we couldn't do that in the x86 version as it had to stay in a form that DAGCombine's MergeInnerShuffle would still recognise.

Fixes issue raised by @saugustine in rG5aa8f4c0843a where we were failing to replace null shuffle operands from MergeInnerShuffle to UNDEFs.

Differential Revision: https://reviews.llvm.org/D96345

3 years ago[AMDGPU] Rename simplifyI24 to simplifyMul24
Jay Foad [Wed, 17 Feb 2021 09:44:05 +0000 (09:44 +0000)]
[AMDGPU] Rename simplifyI24 to simplifyMul24

Also simplify one of its call sites. NFC.

3 years ago[lit] Add "early_tests" config option
David Zarzycki [Tue, 16 Feb 2021 17:00:00 +0000 (12:00 -0500)]
[lit] Add "early_tests" config option

With enough cores, the slowest tests can significantly change the total testing time if they happen to run late. With this change, a test suite can improve performance (for high-end systems) by listing just a few of the slowest tests up front.

Reviewed By: jdenny, jhenderson

Differential Revision: https://reviews.llvm.org/D96594

3 years ago[AMDGPU] Fix a miscompile with S_ADD/S_SUB
Piotr Sobczak [Wed, 10 Feb 2021 16:21:15 +0000 (17:21 +0100)]
[AMDGPU] Fix a miscompile with S_ADD/S_SUB

The helper function isBoolSGPR is too aggressive when determining
when a v_cndmask can be skipped on a boolean value because the
function does not check the operands of and/or/xor.

This can be problematic for the Add/Sub combines that can leave
bits set even for inactive lanes leading to wrong results.

Fix this by inspecting the operands of and/or/xor recursively.

Differential Revision: https://reviews.llvm.org/D86878

3 years ago[RISCV] Add support for fixed vector vselect
Fraser Cormack [Mon, 15 Feb 2021 16:38:25 +0000 (16:38 +0000)]
[RISCV] Add support for fixed vector vselect

This patch adds support for fixed-length vector vselect. It does so by
lowering them to a custom unmasked VSELECT_VL node with a vector length
operand.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D96768

3 years ago[X86][SSE] Add testcase for bug reported in D96345
Simon Pilgrim [Wed, 17 Feb 2021 10:56:46 +0000 (10:56 +0000)]
[X86][SSE] Add testcase for bug reported in D96345

Failure to handle binop(shuffle(x,undef),shuffle(a,b))

3 years ago[mlir][Shape] Generalize cstr_broadcastable folding for n-ary broadcasts
Benjamin Kramer [Tue, 16 Feb 2021 18:08:34 +0000 (19:08 +0100)]
[mlir][Shape] Generalize cstr_broadcastable folding for n-ary broadcasts

This is still fairly tricky code, but I tried to untangle it a bit.

Differential Revision: https://reviews.llvm.org/D96800

3 years agoAdd lit config for dir with standalone tests
Thomas Preud'homme [Fri, 15 Jan 2021 12:47:32 +0000 (12:47 +0000)]
Add lit config for dir with standalone tests

Some test systems do not use lit for test discovery but only for its
substitution and test selection because they use another way of managing
test collections, e.g. CTest. This forces those tests to be invoked with
lit --no-indirectly-run-check. When a mix of lit version is in use, it
requires to detect the availability of that option.

This commit provides a new config option standalone_tests to signal a
directory made of tests meant to run as standalone. When this option is
set, lit skips test discovery and the indirectly run check. It also adds
the missing documentation for --no-indirectly-run-check.

Reviewed By: jdenny

Differential Revision: https://reviews.llvm.org/D94766

3 years ago[sanitizers] Define SANITIZER_INTERCEPTOR_HOOKS on FreeBSD
Alex Richardson [Wed, 17 Feb 2021 10:36:41 +0000 (10:36 +0000)]
[sanitizers] Define SANITIZER_INTERCEPTOR_HOOKS on FreeBSD

This fixes the weak_hooks.cpp test on FreeBSD. Since this feature appears
to be supported on almost all platforms, it might also make sense to turn
it into an opt-out list instead of being opt-in.

Reviewed By: krytarowski

Differential Revision: https://reviews.llvm.org/D96255

3 years ago[clang-tidy] Simplify const params check
Stephen Kelly [Tue, 29 Dec 2020 13:44:05 +0000 (13:44 +0000)]
[clang-tidy] Simplify const params check

Differential Revision: https://reviews.llvm.org/D96141

3 years ago[clang-tidy] Simplify inefficient algorithm check
Stephen Kelly [Sun, 3 Jan 2021 17:05:17 +0000 (17:05 +0000)]
[clang-tidy] Simplify inefficient algorithm check

The normalization of matchers means that this now works in all language
modes.

Differential Revision: https://reviews.llvm.org/D96140

3 years ago[clang-tidy] Simplify delete null ptr check
Stephen Kelly [Tue, 29 Dec 2020 13:44:18 +0000 (13:44 +0000)]
[clang-tidy] Simplify delete null ptr check

Because it no longer relies on finding implicit casts, this check now
works on templates which are not instantiated in the translation unit.

Differential Revision: https://reviews.llvm.org/D96138

3 years agoFollow up of rGdea4a63e6359, which committed a slightly different version than
Sjoerd Meijer [Wed, 17 Feb 2021 10:00:05 +0000 (10:00 +0000)]
Follow up of rGdea4a63e6359, which committed a slightly different version than
intended.

3 years ago[Driver] Support -gdwarf64 for assembly files
Igor Kudrin [Fri, 12 Feb 2021 13:41:39 +0000 (20:41 +0700)]
[Driver] Support -gdwarf64 for assembly files

The option was added in D90507 for C/C++ source files. This patch adds
support for assembly files.

Differential Revision: https://reviews.llvm.org/D96783

3 years ago[DebugInfo] Keep the DWARF64 flag in the module metadata
Igor Kudrin [Fri, 12 Feb 2021 07:28:22 +0000 (14:28 +0700)]
[DebugInfo] Keep the DWARF64 flag in the module metadata

This allows the option to affect the LTO output. Module::Max helps to
generate debug info for all modules in the same format.

Differential Revision: https://reviews.llvm.org/D96597

3 years ago[clangd] Bind outgoing calls through LSPBinder too. NFC
Sam McCall [Mon, 15 Feb 2021 09:41:38 +0000 (10:41 +0100)]
[clangd] Bind outgoing calls through LSPBinder too. NFC

The redundancy around work-done-progress is annoying but ok for now.

There's a weirdness with context lifetimes around outgoing method calls, which
I've preserved to keep this NFC. We should probably fix it though.

Differential Revision: https://reviews.llvm.org/D96717