Jason Ekstrand [Thu, 29 Jun 2017 17:33:29 +0000 (10:33 -0700)]
nir/spirv: Use the correct stride for non-32-bit vectors
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Thu, 29 Jun 2017 17:33:28 +0000 (10:33 -0700)]
nir/spirv: Wrap access chains in a new vtn_pointer data structure
The vtn_pointer structure provides a bit better abstraction than passing
access chains around directly. For one thing, if the pointer just
points to a variable, we don't need the access chain at all. Also,
pointers know what their dereferenced type is so we can avoid passing
the type in a bunch of places. Finally, pointers can, in theory, be
extended to the case where you don't actually know what variable is
being referenced.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Thu, 29 Jun 2017 17:33:27 +0000 (10:33 -0700)]
nir/spirv: Rename some things from access_chain to pointer
We're about to add a vtn_pointer data structure and this will prevent
some rename churn in the next commit.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Thu, 29 Jun 2017 17:33:26 +0000 (10:33 -0700)]
nir/spirv: Split up Uniform and UniformConstant storage classes
We were originally handling them together because I was rather unclear
on the distinction. However, keeping them combined keeps the confusion.
Split them up so that it's more clear from the code how we expect the
two storage classes to be used.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Thu, 29 Jun 2017 17:33:25 +0000 (10:33 -0700)]
nir/spirv: Add a storage_class_to_mode helper
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Thu, 29 Jun 2017 17:33:24 +0000 (10:33 -0700)]
nir/spirv: Use the type from the deref for atomics
Previously, we were using the type of the variable which is incorrect.
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Thu, 29 Jun 2017 17:33:23 +0000 (10:33 -0700)]
nir/spirv: Move a "}"
It's closing a "{" at the begining of a switch case.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Jason Ekstrand [Sat, 24 Jun 2017 22:14:50 +0000 (15:14 -0700)]
i965: Move surface resolves back to draw/dispatch time
This is effectively a revert of
388f02729bbf88ba104f4f8ee1fdf005a240969c
though much code has been added since. Kristian initially moved it to
try and avoid locking problems with meta-based resolves. Now that meta
is gone from the resolve path (for good this time, we hope), we can move
it back. The problem with having it in intel_update_state was that the
UpdateState hook gets called by core mesa directly and all sorts of
things will cause a UpdateState to get called which may trigger resolves
at inopportune times. In particular, it gets called by _mesa_Clear and,
if we have a HiZ buffer in the INVALID_AUX state, causes a HiZ resolve
right before the clear which is pointless. By moving it back to
try_draw_prims time, we know it will only get called right before a draw
which is where we want it.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Vinson Lee [Thu, 29 Jun 2017 06:13:26 +0000 (23:13 -0700)]
mesa: Avoid set comprehension.
Fix build error on CentOS 6.9 with Python 2.6.
GEN main/format_fallback.c
File "./main/format_fallback.py", line 42
names = {fmt.name for fmt in formats}
^
SyntaxError: invalid syntax
Fixes:
a1983223d883 ("mesa: Add _mesa_format_fallback_rgbx_to_rgba() [v2]")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Bas Nieuwenhuizen [Mon, 3 Jul 2017 22:49:55 +0000 (00:49 +0200)]
ac/nir: Move VS position exports before param exports.
According to Nicolai the SX can already start work when all
the position exports are done, so do those first.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 25 Jun 2017 23:27:02 +0000 (01:27 +0200)]
radv: Always set depthbuffer using image format instead of iview format.
We have some cases where changing between depth and stencil only aspect
was causing hangs.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Wed, 28 Jun 2017 22:38:29 +0000 (00:38 +0200)]
radv: Disable depth & stencil tests when the depthbuffer doesn't support it.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Tomasz Figa [Wed, 5 Jul 2017 14:56:51 +0000 (23:56 +0900)]
egl: android: Fix potential use of unitialized variable
If dri2_setup_extensions() fails, the "err" variable would not be assigned
causing the error path to access an unitialized variable. Fix it by
assigning an error message.
Fixes:
2c341f2bda4 ("egl: refactor dri2_create_screen() into three separate functions")
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tomasz Figa [Wed, 5 Jul 2017 14:54:18 +0000 (23:54 +0900)]
intel: common: Fix link failure with standalone Android build
Some reshuffle in the Makefiles under src/intel resulted in Android
libraries being no longer linked with code using
src/intel/common/gen_debug.h that contains references to functions
exported by those libraries (namely ALOGW macro, which is currently
resolved into a call to __android_log_print() from cutils).
Fix the build by taking into account ANDROID_CFLAGS and ANDROID_LIBS for
affected module on Android NDK builds.
Fixes:
d5b355ce5fd ("i965: Move intel_debug.h to intel/common/gen_debug.h")
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Mauro Rossi [Sat, 1 Jul 2017 15:52:49 +0000 (17:52 +0200)]
Android: generate symlinks for all enabled gallium drivers
Current post install command relies on GALLIUM_TARGET_DRIVERS variable,
however variable needs to be initialized in src/gallium/Android.mk
in order that all enabled gallium drivers symlinks are correctly generated.
At the moment due to sorting of INC_DIRS and variable set with svga (vmwgfx)
only vmwgfx_dri.so and virtio_gpu_dri.so symlinks are generated.
Fixes:
a3d98ca62f ("Android: use symlinks for driver loading")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tomeu Vizoso [Tue, 4 Jul 2017 11:28:39 +0000 (13:28 +0200)]
android: build imx-drm winsys
Add Android.mk for winsys/imx/drm.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Rob Herring [Tue, 4 Jul 2017 11:28:38 +0000 (13:28 +0200)]
android: add etnaviv driver build support
Add etnaviv to Android makefiles.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Nicolai Hähnle [Sun, 25 Jun 2017 16:13:39 +0000 (18:13 +0200)]
st/glsl_to_nir: fix edgeflag passthrough
We have to mark the additional shader input as used, otherwise it will
be eliminated, and we have to setup its index correctly.
This is a bit of a hack, but so is everything surrounding edgeflag
passthrough.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 17 May 2017 16:09:14 +0000 (18:09 +0200)]
st/mesa: use pipe_shader_type_from_mesa
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Thu, 8 Jun 2017 17:36:59 +0000 (19:36 +0200)]
tgsi_from_mesa: add tgsi_get_gl_frag_result_semantic
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 17 May 2017 16:09:03 +0000 (18:09 +0200)]
tgsi_from_mesa: add pipe_shader_type_from_mesa
So... the pipe_ prefix doesn't really fit into a TGSI header; on the
other hand, the return type has the pipe_ prefix.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 17 May 2017 15:44:34 +0000 (17:44 +0200)]
tgsi,st/mesa: move varying slot to semantic mapping into a helper for VS
We will use this helper in radeonsi's NIR path.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 9 Jun 2017 13:12:23 +0000 (15:12 +0200)]
ddebug: handle some cases of non-TGSI shaders
NIR shaders are not captured properly in pipelined mode currently. This
would require shader cloning, which requires linking all the Gallium
drivers against NIR. We can always do that later.
v2: avoid immediate crashes in pipelined mode
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Nicolai Hähnle [Fri, 9 Jun 2017 15:59:45 +0000 (17:59 +0200)]
glsl_to_nir: zero-initialize var->data.descriptor_set
This is convenient for backends that support both Vulkan and OpenGL while
lowering samplers to derefs with nir_lower_samplers_as_deref.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Sat, 24 Jun 2017 11:34:27 +0000 (13:34 +0200)]
glsl: add glsl_base_type_is_integer
We will use this from radeonsi/nir, which we want to keep as pure C code.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Sat, 20 May 2017 15:19:06 +0000 (17:19 +0200)]
nir: add NIR_PRINT environment variable
Reviewed-by: Rob Clark <robdclark@gmail.com>
Nicolai Hähnle [Sat, 24 Jun 2017 08:26:29 +0000 (10:26 +0200)]
glsl/blob: add valgrind checks that written data is defined
Undefined data will eventually trigger a valgrind error while computing
its CRC32 while writing it into the disk cache, but at that point, it is
basically impossible to track down where the undefined data came from.
With this change, finding the origin of undefined data becomes easy.
v2: remove duplicate VALGRIND_CFLAGS (Emil)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Nicolai Hähnle [Sat, 24 Jun 2017 08:27:18 +0000 (10:27 +0200)]
glsl: explicitly zero out padding to gl_shader_variable bitfield
Otherwise, the padding bits remain undefined, which leads to valgrind
errors when storing the gl_shader_variable in the disk cache.
v2: use rzalloc instead of an explicit padding member variable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Fri, 23 Jun 2017 18:20:31 +0000 (20:20 +0200)]
glsl: simplify add_uniform_to_shader::visit_field
Each field gets a distinct name, so we should never hit the case where
the name already exists in the parameter list.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Thu, 22 Jun 2017 10:12:44 +0000 (12:12 +0200)]
glsl: look for multiple variables simultaneously with find_assignment_visitor
Save some passes over the IR.
v2: redesign to make the users of find_assignments more readable
v3:
- fix missing !
- add some comments and make the num_found check more explicit (Timothy)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v1)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Tue, 4 Jul 2017 23:14:03 +0000 (01:14 +0200)]
gallium/radeon: fix VDPAU breakage, need VRAM with WC
Ilia Mirkin [Tue, 4 Jul 2017 22:07:08 +0000 (18:07 -0400)]
a5xx: enable polygon offset clamps
This is already set and emitted by the code.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
Ilia Mirkin [Tue, 4 Jul 2017 21:58:41 +0000 (17:58 -0400)]
a5xx: implement logicop support
The former 0x60 hardcoded in is equivalent to ROP_COPY with the shift.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
Ilia Mirkin [Tue, 4 Jul 2017 21:43:15 +0000 (17:43 -0400)]
a5xx: enable polygon mode selection
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
Ilia Mirkin [Tue, 4 Jul 2017 20:06:28 +0000 (16:06 -0400)]
a5xx: disable ARB_depth_clamp for now
We need to figure out how to implement it properly. Right now it doesn't
work at all.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
Ilia Mirkin [Tue, 4 Jul 2017 20:02:55 +0000 (16:02 -0400)]
a5xx: fix clip_halfz support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
Ilia Mirkin [Tue, 4 Jul 2017 15:48:25 +0000 (11:48 -0400)]
a5xx: improve 3d texture sampling
At least the first level works now. Eventually the later levels stop
working, there appears to be some alignment issue. But this improves the
situation immensely.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
Ilia Mirkin [Tue, 4 Jul 2017 13:38:23 +0000 (09:38 -0400)]
a5xx: remove one of the MIPFILTER_LINEAR bits
It doesn't appear to do what we want. Removing this bit makes
lodclamp-between as well as a number of dEQP tests pass, with no visible
ill effect.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
Ilia Mirkin [Tue, 4 Jul 2017 04:25:26 +0000 (00:25 -0400)]
a5xx: enable formats newly added to the headers
This enables S3TC, BPTC, ETC2, and ASTC texture decoding. Additionally
this enables RGB32 texture buffer objects, as well as 11_11_10_FLOAT and
10_10_10_2 vertex formats (and related extensions).
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
Ilia Mirkin [Tue, 4 Jul 2017 04:24:34 +0000 (00:24 -0400)]
a5xx: include color swap when decoding vertices
This fixes support for BGRA vertex formats
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
Ilia Mirkin [Tue, 4 Jul 2017 04:24:05 +0000 (00:24 -0400)]
a5xx: update headers
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
Marek Olšák [Tue, 4 Jul 2017 20:40:09 +0000 (22:40 +0200)]
gallium/radeon: attempt to fix a compiler failure in radeon_winsys.h
trivial.
Marek Olšák [Tue, 27 Jun 2017 19:54:20 +0000 (21:54 +0200)]
winsys/amdgpu: use 128KB BOs for suballocations of up to 64KB BOs
This decreases the number of BOs, but might also increase memory usage.
It's better for small textures.
The gameplay is on the far right:
https://people.freedesktop.org/~mareko/suballoc.svg
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Jun 2017 18:32:37 +0000 (20:32 +0200)]
gallium/radeon: allow suballocating textures
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Jun 2017 18:12:25 +0000 (20:12 +0200)]
gallium/radeon: generalize the function for in-place texture reallocation
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Jun 2017 18:27:29 +0000 (20:27 +0200)]
gallium/radeon: add radeon_winsys::buffer_is_suballocated
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 29 Jun 2017 16:49:48 +0000 (18:49 +0200)]
gallium/radeon: clean up pb_cache bucket/usage determination
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 29 Jun 2017 16:33:05 +0000 (18:33 +0200)]
gallium/radeon: enable suballocations for VRAM with no CPU access
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 29 Jun 2017 16:01:16 +0000 (18:01 +0200)]
gallium/radeon: clean up (domain, flags) <-> (slab heap) translations
This is cleaner, and we are down to 4 slabs.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 29 Jun 2017 15:09:04 +0000 (17:09 +0200)]
gallium/radeon: remove RADEON_FLAG_CPU_ACCESS
https://lists.freedesktop.org/archives/amd-gfx/2017-June/010591.html
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Jun 2017 17:32:48 +0000 (19:32 +0200)]
gallium/radeon: disallow exports of sparse and suballocated BOs
I think it's unsafe, because the slabs can reuse exported storage.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Jun 2017 17:40:09 +0000 (19:40 +0200)]
gallium/radeon: clean up r600_texture_get_handle
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Jun 2017 17:37:43 +0000 (19:37 +0200)]
gallium/radeon: rename RADEON_FLAG_HANDLE -> RADEON_FLAG_NO_SUBALLOC
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Jun 2017 17:24:20 +0000 (19:24 +0200)]
gallium/radeon: fix a possible crash for buffer exports
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 27 Jun 2017 17:21:29 +0000 (19:21 +0200)]
gallium/radeon: ignore PIPE_BIND_SHARED for buffers
BO exports can't be predicted this way.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 29 Jun 2017 17:20:06 +0000 (19:20 +0200)]
radeonsi: add a HUD query for getting an average GFX BO list size
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Philipp Zabel [Fri, 30 Jun 2017 08:39:53 +0000 (10:39 +0200)]
st/mesa: release EGLImage on EGLImageTarget* error
The smapi->get_egl_image() call in st_egl_image_get_surface() stores a
reference to the EGLImage's texture in stimg.texture. That reference is
released via pipe_resource_reference(&stimg.texture, NULL) before stimg
goes out of scope at the end of the function, but not in the error path
if !is_format_supported().
Fixes:
83e9de25f325 ("st/mesa: EGLImageTarget* error handling")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Juan A. Suarez Romero [Mon, 3 Jul 2017 11:04:30 +0000 (11:04 +0000)]
vc4: automake: include vc4_cl_dump.h in
Ensure vc4_cl_dump.h and $(BROADCOM_FILES) are distributed in the
dist-file.
This fixes `make distcheck`
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Marek Olšák [Sat, 1 Jul 2017 14:05:48 +0000 (16:05 +0200)]
st/mesa: fix tessellation shaders with no support for shareable shaders
Broken by:
b43c887a9bf1e3fb99b0dc22bfea5db81375a06e
Reported by Gert Wollny.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Dave Airlie [Wed, 15 Feb 2017 04:58:48 +0000 (04:58 +0000)]
radv: enable Int64 capability (v2)
I'm not 100% sure this is all wired up but it looks like it is.
v2: actually enable extension.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Sat, 1 Jul 2017 02:10:43 +0000 (19:10 -0700)]
ac/nir: fix 64-bit shifts
NIR always makes the shift amount 32 bits, but LLVM asserts if the two
sources aren't the same type. Zero-extend the shift amount to make LLVM
happy.
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Wed, 7 Jun 2017 21:16:31 +0000 (14:16 -0700)]
ac/nir: implement 64-bit packing and unpacking
We implement the split opcodes, and tell NIR to lower the original ones.
The lowering to LLVM is a little more complicated, but NIR can optimize
the split ones a little better, and some NIR lowering passes that we
might want to use (particularly for doubles) emit the split ones.
This should fix pack/unpackDouble2x32, which seems like a bug since when
we enabled the Float64 capability. It will also fix pack/unpackInt2x32
when we enable the Int64 capability.
Fixes:
798ae37c ("radv: Enable Float64 support.")
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Connor Abbott [Wed, 7 Jun 2017 21:12:05 +0000 (14:12 -0700)]
spirv: fix OpBitcast when the src and dst bitsize are different (v3)
Before, we were just implementing it with a move, which is incorrect
when the source and destination have different bitsizes. To implement
it properly, we need to use the 64-bit pack/unpack opcodes. Since
glslang uses OpBitcast to implement packInt2x32 and unpackInt2x32, this
should fix them on anv (and radv once we enable the int64 capability).
v2: make supporting non-32/64 bit easier (Jason)
v3: add another assert (Jason)
Fixes:
b3135c3c ("anv: Advertise shaderInt64 on Broadwell and above")
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Brian Paul [Fri, 30 Jun 2017 21:11:01 +0000 (14:11 -0700)]
svga: don't call svga_texture_device_format_has_alpha() for PIPE_BUFFER
svga_texture_device_format_has_alpha() is only intended to work for
texture resources, not buffer resources. This fixes a failed assertion
in the svga_texture() cast function when running texture buffer tests.
Also, add an assertion in svga_texture_device_format_has_alpha() to
catch the issue sooner.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 30 Jun 2017 21:08:49 +0000 (14:08 -0700)]
svga: fix texture buffer object regression
With change
8aba778fa2cd98a0b5a7429d3c5057778a0c808c we stopped binding
sampler objects for texture buffers. That broke our texture sample /
sampler view setup code.
Now, we loop over the max(num samplers, num sampler views) and handle
the sampler and view information separately. For texture buffers,
the sampler will be NULL but the sampler view non-null.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 30 Jun 2017 21:07:08 +0000 (14:07 -0700)]
svga: move assertion in draw_vgpu10()
The buffer binding flags aren't ensured until after the
svga_buffer_handle() call, so move the assertion after it.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 30 Jun 2017 21:02:20 +0000 (14:02 -0700)]
svga: fix buffer binding flags initialization
If a buffer is created/initialized with glNamedBufferData we will
have no target (GL_ARRAY_BUFFER, GL_UNIFORM_BUFFER, etc) so the
svga_buffer::bind_flags will be zero until we try to get the buffer
handle.
This patch initializes the svga_buffer::bind_flags field when it's
zero.
This fixes the Piglit arb_uniform_buffer_object-rendering-dsa test.
Note that there's still issues in this area that'll have to be
addressed in the future. For example, creating a buffer object
as GL_UNIFORM_BUFFER and later using it as a vertex buffer will
fail.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Sun, 2 Jul 2017 14:48:26 +0000 (08:48 -0600)]
docs: update bug reporting guidelines
Suggest attaching output of glxinfo/wglinfo. Suggest providing
an apitrace.
Nicolai Hähnle [Sun, 25 Jun 2017 16:10:32 +0000 (18:10 +0200)]
st/mesa: remove an obsolete comment
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Sat, 24 Jun 2017 10:26:46 +0000 (12:26 +0200)]
mesa: remove unused parameter/member of add_uniform_to_shader
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Nicolai Hähnle [Sun, 14 May 2017 22:47:36 +0000 (00:47 +0200)]
util/disk_cache: fix a comment
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Sun, 11 Jun 2017 10:48:52 +0000 (12:48 +0200)]
glsl: simplify disable_varying_optimizations_for_sso
We always have stage == first and stage == last when first == last, so
drop the special case. Also rephrase the comment to make the logic
clearer.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Nicolai Hähnle [Wed, 14 Jun 2017 10:42:28 +0000 (12:42 +0200)]
glsl: always print non-zero var->data.location_frac
This is helpful in debugging varying assignments.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Nicolai Hähnle [Tue, 27 Jun 2017 07:50:32 +0000 (09:50 +0200)]
winsys/radeon: only call pb_slabs_reclaim when slabs are actually used
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100242
Fixes:
fb827c055cb1 ("winsys/radeon: enable buffer allocation from slabs")
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Iglesias Gonsálvez [Wed, 28 Jun 2017 13:52:34 +0000 (15:52 +0200)]
anv: check support for enabled features in vkCreateDevice()
From Vulkan spec, 4.2.1. "Device Creation":
"vkCreateDevice verifies that extensions and features requested in
the ppEnabledExtensionNames and pEnabledFeatures members of
pCreateInfo, respectively, are supported by the implementation."
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@gmail.com>
Samuel Iglesias Gonsálvez [Wed, 28 Jun 2017 07:39:55 +0000 (09:39 +0200)]
anv: merge tessellation's primitive mode in merge_tess_info()
SPIR-V tessellation shaders that were created from HLSL will have
the primitive generation domain set in tessellation control shader
(hull shader in HLSL) instead of the tessellation evaluation shader.
v2:
- Add assert (Kenneth)
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bruce Cherniak [Sat, 1 Jul 2017 03:24:46 +0000 (22:24 -0500)]
swr: Limit memory held by defer deleted resources.
This patch limits the number of items on the fence work queue (the
deferred deletion list) by submitting a sync fence when the queue size
exceeds a threshold. This initiates deferred deletion of all resources
on the list and decreases the total amount of memory held waiting for
"deferred deletion".
This resolves bug 101467 filed against swr for the piglit
streaming-texture-leak test. For those running on smaller memory
(16GB?) systems, this will prevent oom-killer.
Thus far, we have not seen any real world applications that exhibit
behavior like the streaming-texture-leak test; as any form of pipeline
flush will trigger the defer queue and properly free any retained
allocations. But, this addresses those as well.
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Lionel Landwerlin [Sat, 1 Jul 2017 23:23:29 +0000 (00:23 +0100)]
anv: fix reported timestampPeriod value
We lost some precision on a previous change due to switching to
integers. Since we report a float in timestampPeriod, we want the
division to happen in floats.
CID: 1413021
Fixes:
c77d98ef32 ("intel: common: express timestamps units in frequency")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Lionel Landwerlin [Fri, 30 Jun 2017 16:25:43 +0000 (17:25 +0100)]
intel: genxml: make a couple of enums show up in aubinator
In particular Shader Channel Select & Texture Address Control Mode.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Kenneth Graunke [Sat, 1 Jul 2017 04:16:00 +0000 (21:16 -0700)]
i965: Print access flags in INTEL_DEBUG=buf output.
Being able to see the access mode of various mappings is incredibly
useful for debugging. With this patch, INTEL_DEBUG=buf now shows
data such as:
bo_create: buf 7 (bufferobj) 640b
bo_map_gtt: 7 (bufferobj) -> 0x7fca1fae5000, WRITE ASYNC
brw_bo_map_cpu: 7 (bufferobj) -> 0x7fca1fae4000, READ
bo_map_gtt: 5 (bufferobj) -> 0x7fca1fad4000, WRITE ASYNC
brw_bo_map_cpu: 7 (bufferobj) -> 0x7fca1fae4000, READ
which makes it easy to see that there are async GTT writes with
intervening CPU reads.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Chris Wilson [Sat, 1 Jul 2017 10:14:00 +0000 (11:14 +0100)]
i965: Remove clearing of bo->map_gtt after failure
With the conversion to storing the result of drm_mmap to a local and not
directly to bo->map_gtt itself, we no longer should clear bo->map_gtt.
In the best the operation is redundant as we know bo->map_gtt to already
be NULL, but in the worst case we overwrite a concurrent thread that
successfully mmaped the GTT.
Fixes:
314647c4c206 ("i965: Drop global bufmgr lock from brw_bo_map_* functions.")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 1 Jul 2017 03:33:57 +0000 (20:33 -0700)]
i965: Add inline to brw_bo_unmap
I meant to do this in "i965: Make brw_bo_unmap a static inline."
but botched the commit fixup.
Chris Wilson [Fri, 30 Jun 2017 21:21:54 +0000 (14:21 -0700)]
i965: Drop global bufmgr lock from brw_bo_map_* functions.
After removing the unusuable debugging code in the previous commit, we
can also entirely remove the global mutex around mapping the buffer for
the first time and replace it with a single atomic operation to update
the cache once we retrieve the mmap.
v2 (Ken): Split out from Chris's original commit.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Fri, 30 Jun 2017 21:05:21 +0000 (14:05 -0700)]
i965: Make brw_bo_unmap a static inline.
With the broken debugging code gone, it doesn't do anything anymore.
We could technically eliminate it, but I'd like to keep it around in
case we want to add something there again someday. Otherwise we'd
have to go all over the codebase adding unmap calls back again.
Based on a patch by Chris Wilson.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Chris Wilson [Tue, 20 Jun 2017 10:57:34 +0000 (11:57 +0100)]
i965: Discard bo->map_count
Supposedly we were keeping a reference count for the number of users of
a mapping so that we could use valgrind to detect access to the map
outside of the valid section. However, we were incrementing the counter
only when first creating the cached mapping but decrementing on every
unmap. The bo->map_count tracking was wrong and so the debugging code
was completely useless.
v2 (Ken): Separate out atomic compare and swap optimization.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Fri, 30 Jun 2017 21:00:01 +0000 (14:00 -0700)]
i965: Add a comment about not needing VALGRIND_MALLOCLIKE_BLOCK.
At first glance this seems missing, since we handle it manually for CPU
and WC maps. Although a bit inconsistent, it's actually not necessary.
Thanks to Chris Wilson for explaining this to me.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Bas Nieuwenhuizen [Fri, 30 Jun 2017 19:03:40 +0000 (21:03 +0200)]
radv: Use v4i32 variant of llvm.SI.load.const.
We apparently still used v16i8 ....
As radeonsi doesn't use it with LLVM version checks I don't think
we need them either.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Brian Paul [Tue, 27 Jun 2017 15:51:25 +0000 (09:51 -0600)]
svga: add texture size/levels sanity check code in svga_texture_create()
The state tracker should never ask us to create a texture with invalid
dimensions / mipmap levels. Do some assertions to check that.
No Piglit regressions.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Tue, 27 Jun 2017 15:36:19 +0000 (09:36 -0600)]
st/mesa: fix texture image resource selection in st_render_texture()
If we're rendering to an incomplete/inconsistent (cube) texture, the
different faces/levels of the texture may be stored in different
resources. Before, we always used the texture object resource. Now,
we use the texture image resource. In normal circumstances, that's
the same resource. But in some cases, such as the Piglit
fbo-incomplete-texture-03 test, the cube faces are in different
resources and we need to render to the texture image resource.
Fixes fbo-incomplete-texture-03 with VMware driver.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Tue, 27 Jun 2017 15:29:18 +0000 (09:29 -0600)]
st/mesa: check for incomplete texture in st_finalize_texture()
Return early from st_finalize_texture() if we have an incomplete
texture. This avoids trying to create a texture resource with invalid
parameters (too many mipmap levels given the base dimension).
Specifically, the Piglit fbo-incomplete-texture-03 test winds up
calling pipe_screen::resource_create() with width0=32, height0=32 and
last_level=6 because the first five cube faces are 32x32 but the sixth
face is 64x64. Some drivers handle this, but others (like VMware svga)
do not (generates device errors).
Note that this code is on the path that's usually not taken (we normally
build consistent textures).
No Piglit regressions.
v2: only need to check for base-level completeness since that's what has to
be consistent in order to specify the dimensions for a new gallium texture.
Per Roland.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Fri, 30 Jun 2017 15:23:43 +0000 (09:23 -0600)]
gallium/docs: document that TXF is used with PIPE_BUFFER resources
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Fri, 30 Jun 2017 15:23:17 +0000 (09:23 -0600)]
gallium/docs: clarify that samplers are not used with PIPE_BUFFER resources
Commit
8aba778fa2cd98a0b5a7429d3c5057778a0c808c "st/mesa: don't set
sampler states for TBOs" changed how texture buffer objects are handled.
Document the new convention.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Eric Anholt [Fri, 16 Dec 2016 19:00:46 +0000 (11:00 -0800)]
vc4: Start using XML unpack functions in CL dump.
For now this is a no-op on the output, but it makes it clear that we've
had weird things going on with things like
V3D21_CLIPPER_Z_SCALE_AND_OFFSET.
Eric Anholt [Mon, 6 Feb 2017 22:29:30 +0000 (14:29 -0800)]
vc4: Replace a couple of magic numbers with #define usage.
Eric Anholt [Mon, 6 Feb 2017 22:06:12 +0000 (14:06 -0800)]
vc4: Move rasterizer state packing to CSO creation time.
This gets our vc4_emit.c size back down a bit:
before:
1020 0 0 1020 3fc src/gallium/drivers/vc4/.libs/vc4_emit.o
after:
968 0 0 968 3c8 src/gallium/drivers/vc4/.libs/vc4_emit.o
Eric Anholt [Sat, 10 Dec 2016 23:47:26 +0000 (15:47 -0800)]
vc4: Convert the driver to emitting the shader record using pack macros.
Eric Anholt [Sun, 11 Dec 2016 22:59:17 +0000 (14:59 -0800)]
vc4: Simplify pack header usage
Take the CL pointer in, which will be useful for enabling relocs.
However, our code expands a bit more:
before:
4449 0 0 4449 1161 src/gallium/drivers/vc4/.libs/vc4_draw.o
988 0 0 988 3dc src/gallium/drivers/vc4/.libs/vc4_emit.o
after:
4481 0 0 4481 1181 src/gallium/drivers/vc4/.libs/vc4_draw.o
1020 0 0 1020 3fc src/gallium/drivers/vc4/.libs/vc4_emit.o
Eric Anholt [Wed, 26 Oct 2016 19:46:58 +0000 (12:46 -0700)]
vc4: Start using the pack header.
This slightly inflates the size of the generated code, in exchange for
getting us some convenient tools.
before:
4389 0 0 4389 1125 src/gallium/drivers/vc4/.libs/vc4_draw.o
808 0 0 808 328 src/gallium/drivers/vc4/.libs/vc4_emit.o
after:
4449 0 0 4449 1161 src/gallium/drivers/vc4/.libs/vc4_draw.o
988 0 0 988 3dc src/gallium/drivers/vc4/.libs/vc4_emit.o
Eric Anholt [Wed, 26 Oct 2016 17:14:37 +0000 (10:14 -0700)]
vc4: Introduce XML-based packet header generation like Intel's.
I really liked this idea, as it should help with management of packet
parsing tools like the CL dump. The python script is forked off of theirs
because our packets are byte-based instead of dwords, and the changes to
do so while avoiding performance regressions due to unaligned accesses
were quite invasive.
v2: Fix Android.mk paths, drop shebang for python script, fix overlap
detection.
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Rob Herring <robh@kernel.org>
Bruce Cherniak [Thu, 29 Jun 2017 19:41:31 +0000 (14:41 -0500)]
swr: Minor cleanup of variable usage, no functional change.
In swr_update_derived, for consistency, index buffer validation should
be using the p_draw_info copy "info" rather than referencing
p_draw_info.
No functional change.
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>