anv/utrace: trace CPU on timestamp buffer readiness

Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>

intel/ds: track number of tracepoint timestamp copies

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>

util/u_trace: count number of tracepoints

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>

intel/ds: lock submissions to u_trace_context

This allows for submissions to be outside the global anv_device mutex.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>

intel: don't assume Linux minor dev node

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>

anv: enable utrace timestamp buffer copies on compute engine

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>

anv: move utrace flush out of backends

The next patch is going to introduce some locking that needs to happen
before the submission to the backend.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>

anv: move simple shaders code to its own object

We would like to call those function from anv_utrace.c

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>

anv: add simple shader support without a command buffer

Limited to compute for now. Annoyingly Gfx9 requires a binding table
block.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>

anv: add a memcpy compute internal kernel

We'll use this memcpy utrace timestamp data.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>

anv: fix utrace timestamp buffer copies

Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24744>

frontends/va: Set default rate control values once when creating encoder

Move setting the default values from getEncParamPresetH264/5 as this
function is called on each frame which would result in overwriting
values set by application.

This fixes setting HRD parameters and max_qp/min_qp when
PIPE_VIDEO_CAP_ENC_QUALITY_LEVEL is not supported.

Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25355>

frontends/va: Process VAEncSequenceParameterBufferType first in vaRenderPicture

The encoder is created in handleVAEncSequenceParameterBufferType and it
also sets some default parameters, so we need to make sure to handle
this buffer first because application may have already set those
parameters from earlier buffers.

This fixes setting HRD parameters with gstreamer vah264enc/vah265enc
when PIPE_VIDEO_CAP_ENC_QUALITY_LEVEL is supported.

Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25355>

docs: add calendar for 23.3

Normally the branchpoint would have been on Oct 11, but this is the week
before XDC and everyone will be busy so let's try not to add the
branchpoint pressure on top. Let's instead branch off on the week
_after_ XDC, on Oct 25.

Besides, 23.2 has been delayed by multiple factors, so it wouldn't make
sense to rush 23.3.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25122>

radv/ci: add more tests to the navi21 vkcts flake list

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25325>

radv/ci: increase the parallelism of the vkcts-navi21 job

The vkcts-navi21 job currently take ~13 minutes each, but we are about
to start running the VK_EXT_shader_object tests which should
significantly increase our runtime and thus would exceed the 15 minutes.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25325>

v3d/shim: include new ioctl parameters

Some new parameters added recently were missed in the DRM shim.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9880
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25370>

radv: enable cache counters for RGP on GFX11

This was the last missing RGP feature on GFX11 compared to older chips.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25271>

radv: add SPM support for GFX11

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25271>

ac/spm: add support for GFX11

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25271>

ac/spm: add new segment types for GFX11

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25271>

ac/gpu_info: define AMD_MAX_WGP

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25271>

llvmpipe/linear: move to nir inputs

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24436>

llvmpipe/linear: convert to using nir for output.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24436>

llvmpipe/fs: start converting dervied state to nir based.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24436>

llvmpipe/fs: start converting interp/input paths to nir.

This input_usage_mask is going to take a bit more thinking

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24436>

llvmpipe/nir: call gather info to update inputs read properly

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24436>

gallivm: drop tgsi aos paths.

These were only used by the linear code, and that doesn't use
tgsi anymore

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24436>

llvmpipe/linear: drop tgsi path.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24436>

ci/freedreno: disable broke cheza (Adreno 630) runners

Revert ASAP as `google-freedreno-cheza` gets running again.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25365>

r600/sfn: Fix use of scheduled_shader vs shader

Thanks to Vitaliy Kuzmin for pointing this out.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25364>

r600/sfn: sort the uniforms of the right shader

Thanks to Vitaly Kuzmin for pointing this out.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25364>

r600: Use nir_builder helpers for load/store_shared_r600

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24762>

r600: Use more auto-generated nir_builder helpers

Use nir_umad24 instead of rolling our own.  Also, all system values
already have NIR builder helpers and we don't need to be manually
building intrinsics or rolling our own helpers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24762>

pvr: Fix dynamic desc offset storage

The index at which the dynamic descriptor offsets were being
stored was incorrect, leading to some offsets not being stored and
thus `0` being applied as the offset to the descriptors instead.

dEQP test fixed:
  dEQP-VK.binding_model.shader_access.{primary,secondary}_cmd_buf
    .uniform_buffer_dynamic
    .{vertex,fragment,compute,vertex_fragment}
    .multiple_discontiguous_descriptor_sets
    .*_descriptor.offset_view_{,non}zero_dynamic_nonzero

Fixes: aa791961a82e ("pvr: Add support for dynamic buffers descriptors")
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25320>

pvr: Fix `for` loop itarator usage

The `i` iteration variable was being used instead of `k` when
appending new mappings, and getting the current source rect.

dEQP test fixed:
  dEQP-VK.pipeline.monolithic.image.suballocation.sampling_type
    .combined.view_type.3d.format.*.count_1.
    .{3x3x3,5x5x5,...(odd dimensions)}

Fixes: 060c3db4efd6 ("pvr: Complete pvr_generate_custom_mapping()")

Reported-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25321>

nvk: Set GUARDBAND_Z_SCALE_1 when Z-clipping

This fixes most of the remaining dEQP-VK.*.inverted_depth_range.* tests.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25359>

nvk: Enable dynamic clip/clamp enable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25356>

nvk: Fix depth clipping parameters

This is a pretty complete overhaul which I think may actually be correct
and there are now comments explaining why various parameters were
chosen.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25356>

nvk: Clean up viewport math

This should make everything a bit easier to read

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25356>

iris: do not mention specifically clover for OpenCL support

It's confusing, when rusticl is used.

Acked-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25287>

ci/venus: add fragment.32B_in_memory_with_vec4_s32 flake

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25349>

anv: fix frame count reporting in INTEL_MEASURE

Report frame count at CB submit time, instead of CB build time.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25235>

nvk: Disable statistics around meta ops

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25353>

nvk: Lower interp_at_sample to interp_at_offset

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25353>

pvr: remove pvr_pbe_get_src_pos()

This should have been removed as part of f59c6eef168 ("pvr: Move PBE START_POS
into csb enum helpers header").

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25328>

pvr: treat VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT as not supported

The required compiler support is missing for mutable format support, so return a
not supported error from vkGetPhysicalDeviceImageFormatProperties2() when the
VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT flag is set in the image format info
structure.

This results in the dEQP-VK.image.mutable.* conformance tests being treated as
Not Supported.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25241>

lavapipe: set default min sample shading to 1

this should only affect shobj handling and even then probably no effect

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25354>

lavapipe: set default viewport and scissor count for cmdbufs

this otherwise breaks shobj tests

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25354>

lavapipe: more vertex stride fixups

for handling cases where bind2 and dynamic vi are used interchangeably

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25354>

lavapipe: always set independent blend

no functional changes, but this is just how vulkan works

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25354>

lavapipe: fix variable descriptor count support handling

if no variable counts are present this must be zero, otherwise yolo

fixes:
dEQP-VK.api.maintenance3_check.support_count_combined_image_sampler_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_combined_image_sampler_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_inline_uniform_block_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_inline_uniform_block_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_input_attachment_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_input_attachment_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_sampled_image_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_sampled_image_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_sampler_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_sampler_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_storage_buffer_dynamic_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_storage_buffer_dynamic_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_storage_buffer_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_storage_buffer_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_storage_image_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_storage_image_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_storage_texel_buffer_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_storage_texel_buffer_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_uniform_buffer_dynamic_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_uniform_buffer_dynamic_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_uniform_buffer_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_uniform_buffer_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_uniform_texel_buffer_extra_bindings_no_variable_size
dEQP-VK.api.maintenance3_check.support_count_uniform_texel_buffer_no_variable_size

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25354>

zink: always trace_screen_unwrap in acquire

it's possible for acquire to be called from the frontend, in which
case the screen will still be trace-wrapped

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25288>

zink: avoid UAF on wayland async present with to-be-retired swapchain

wayland surfaces are likely to become unlinked in WSI implementations upon
retiring a swapchain, requiring the pending present to complete
in order to avoid invalid access

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25288>

zink: move swapchain fence to swapchain object

this is more accurate in terms of usage/ownership and avoids potential
illegal fence usage in the scenario where multiple async presents are
in flight

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25288>

freedreno/decode: Remove gpu_id

Now unused.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25333>

freedreno/decode: Use info->chip to decode

Use the chip generation in cases where decoding is generation specific,
rather than range testing gpu_id.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9310
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25333>

freedreno/decode: Lookup device info

First step for migration to chip_id.  With newer devices we won't be
able to decode the chip_id in any meaningful way, ie. it is just a
number.  But we can use the device table to figure out things like
generation which are needed to properly decode cmdstream, etc.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25333>

util: Add more PRINTFLIKE and MALLOCLIKE annotations

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25230>

microsoft/compiler: Fix printf formatting string issues

Found when adding PRINTFLIKE macro to util functions.

Suggested-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25230>

intel/compiler: Don't allocate memory for SIMD select error handling

The position in the error array already indicate the SIMD in question,
so take off all the formatted printing from the errors -- which in some
cases were just not needed.  We lose a little bit of extra context but
it is all easily derivable from the message and the SIMD.

This also will remove the overhead when SIMD selection is being used to
just to find the selected dispatch width -- at a point where the shaders
were already compiled -- and the errors are not used at all.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9849
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25336>

compiler: Only enable mesaclc helper if we have OpenCL SPIR-V support

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25341>

clover: Only compile/depend libclspirv and libclnir when using SPIR-V support

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25341>

clover: Hide SPIR-V related code behind HAVE_CLOVER_SPIRV

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25341>

rusticl: Ensure NIR generated headers will be available

Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25314>

meson: Remove unnecessary inc_compiler mentions

The inc_compiler should come as part of idep_compiler, idep_nir or
idep_nir_headers dependency.

Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> (v3dv)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25314>

compiler: Use a meson dependency for libcompiler

That will make sure the include directories are passed on and also
make sure the generated headers are properly built before whoever code
depends on it. NIR dependency propagates that dependency too.

Since the right include directory is always propagated, we can remove
the extra "compiler/" prefix from the `#include`s in glsl_types.h.

Note: NIR has a special "header only" dependency, so include the
generated headers for compiler there too.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9843
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25314>

ci: separate hiden jobs to -inc.yml files

make it easier to re-use the hidden jobs by other project (e.g. linux)
without enabling the executable jobs.

Signed-off-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25238>

zink: fix semaphore signal ordering

the timeline semaphore must always be on the last submit in order to
mimic fence behavior

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25334>

zink: add a ZINK_DEBUG=validation alias

typing validation all the time makes my hands hurt

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25290>

zink: set workgroup_memory_explicit_layout for shader validation

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25290>

lavapipe: set separate_shaders for shader objects

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25292>

zink: delete a non-maintenance5 workaround for shobj use

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25289>

zink: require maintenance5 for shobj

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25289>

zink: delete injected pointsize during shader creation

maintenance5 is best maintenance.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25289>

lavapipe/ci: Fix asan expectations

Those failures were fixed in b2f6de8f0d86b8143084212f970af072780fc201.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25309>

nir/deref: Layer rematerialization helpers

nir_rematerialize_derefs_in_use_blocks_impl can be implemented on top of
nir_rematerialize_deref_in_use_blocks.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23712>

nir/lcssa: Fix rematerializing derefs

This would pull derefs out of loops by emitting the pattern
`deref(phi(deref))` which is not allowed by nir_validate.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23712>

nir: Add nir_rematerialize_deref_in_use_blocks

nir_rematerialize_deref_in_use_blocks can be used in passes that don't
run on the whole function.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23712>

nir/deref: remove rematerialize_deref_in_block cache

Nothing was ever inserted into this.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23712>

nir: Add nir_foreach_block_in_cf_node_reverse

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23712>

nir: Add nir_cf_node_cf_tree_prev

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23712>

ci/zink+radv: bump the timeout of zink-radv-navi10-valve by 10 minutes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25342>

ci/zink+radv: specify that zink-radv-navi10-valve should run in the mupuf farm

Fixes: 8c98ee6f3addb1d1b41d ("radv/ci: move vkcts-navi10 testing to KWS")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25342>

virgl: Cover all the formats defined in the virgl definition

Add all the formats currently defined in u_formats.h

Also make sure that no format on virgl protocol has the same number as another one.
Make so that the virgl_formats_conv_table is following the same order as virgl_formats

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25295>

aco/spill: Make sure that offset stays in bounds

If a shader spills a lot, the offset can be above the HW limit.

cc: mesa-stable

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24652>

freedreno/fence: Hold a strong ref to batch

We don't want a unflushed fence to outlive it's batch, otherwise we run
into trouble when it comes time to wait on the fence.  For ex:

1. Create a fence before framebuffer state is set, with the
   PIPE_FLUSH_DEFERRED flags.  This creates a new batch, to which the
   ctx holds the only reference (unless the fence also holds a ref)
2. set_framebuffer_state() creates a new batch and drops the ctx->batch
   reference.
3. Later something tries to wait on the fence

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8621
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25337>

freedreno: Add reformatting commits to .git-blame-ignore-revs

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25337>

glsl: remove unused validate_first_and_last_interface_explicit_locations()

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25318>

glsl: switch to nir validate_first_and_last_interface_explicit_locations()

Use the new nir version. The glsl ir version will be removed in the
following patch.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25318>

glsl: add nir version of validate_first_and_last_interface_explicit_locations()

The glsl ir version will be removed in a following commit.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25318>

glsl: move get_varying_type() declaration earlier

Required for the following patch to keep this file somewhat organised.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25318>

intel/isl: Build for Xe2

This is only *build* support in isl for Xe2. Before adding LNL PCI
IDs, subsequent patches will fill in ISL updates for Xe2.

Rework:
 * Rohan: Update isl_genX_declare_get_func

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25253>

intel/genxml: Build with gen20.xml

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25253>

radv/ci: add more tests to the navi10 vkcts flake list

Since I had to aggregate the results of a lot of run, this commit also
ends up ordering some of the flakes to fit the alphabetical order.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25324>

radv/ci: move vkcts-navi10 testing to KWS

We now have 2 more navi10 DUTs at KWS, so let's use them to speed
up vkcts testing!

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25324>

nir/rematerialize: Rematerialize ALUs used only by compares with zero

This was 4th on the list of things to try in 3ee2e84c608 ("nir:
Rematerialize compare instructions"). This is implemented as a separate
subpass that tries to find ALU instructions (with restrictions) that are
only used by comparisons with zero that are in turn only used as
conditions for bcsel or if-statements.

There are two restrictions implemented. One of the sources must be a
constant. This is done in an attempt to prevent increasing register
pressure. Additionally, the opcode of the instruction must be one that
has a high probablility of getting a conditional modifier on Intel
GPUs. Not all instructions can have a conditional modifiers (e.g., min
and max), so I don't think there is any benefit to moving these
instructions.

v2: Rebase on many, many recent NIR infrastructure changes.

v3: Make data in commit message more clear. Suggested by Matt. Rebase on
b5d6b7c402a ("nir: Drop most uses if nir_instr_rewrite_src()").

All of the affected shaders on ILK and G45 are in CS:GO. There is some
brief analysis of the changes in the MR.

Reviewed-by: Matt Tuner <mattst88@gmail.com>
Shader-db results:

DG2
total instructions in shared programs: 22824637 -> 22824258 (<.01%)
instructions in affected programs: 365742 -> 365363 (-0.10%)
helped: 190 / HURT: 97

total cycles in shared programs: 832186193 -> 832157290 (<.01%)
cycles in affected programs: 41245259 -> 41216356 (-0.07%)
helped: 208 / HURT: 117

total spills in shared programs: 4072 -> 4060 (-0.29%)
spills in affected programs: 366 -> 354 (-3.28%)
helped: 4 / HURT: 2

total fills in shared programs: 3601 -> 3607 (0.17%)
fills in affected programs: 708 -> 714 (0.85%)
helped: 4 / HURT: 2

LOST:   0
GAINED: 1

Tiger Lake and Ice Lake had similar results. (Ice Lake shown)
total instructions in shared programs: 20320934 -> 20320689 (<.01%)
instructions in affected programs: 236592 -> 236347 (-0.10%)
helped: 176 / HURT: 29

total cycles in shared programs: 849846341 -> 849843856 (<.01%)
cycles in affected programs: 41277336 -> 41274851 (<.01%)
helped: 195 / HURT: 110

LOST:   0
GAINED: 1

Skylake
total instructions in shared programs: 18550811 -> 18550470 (<.01%)
instructions in affected programs: 233908 -> 233567 (-0.15%)
helped: 182 / HURT: 25

total cycles in shared programs: 835910983 -> 835889167 (<.01%)
cycles in affected programs: 38764359 -> 38742543 (-0.06%)
helped: 207/ HURT: 94

total spills in shared programs: 4522 -> 4506 (-0.35%)
spills in affected programs: 324 -> 308 (-4.94%)
helped: 4 / HURT: 0

total fills in shared programs: 5296 -> 5280 (-0.30%)
fills in affected programs: 324 -> 308 (-4.94%)
helped: 4 / HURT: 0

LOST:   0
GAINED: 1

Broadwell
total instructions in shared programs: 18199130 -> 18197920 (<.01%)
instructions in affected programs: 214664 -> 213454 (-0.56%)
helped: 191 / HURT: 0

total cycles in shared programs: 935131908 -> 934870248 (-0.03%)
cycles in affected programs: 75770568 -> 75508908 (-0.35%)
helped: 203 / HURT: 84

total spills in shared programs: 13896 -> 13734 (-1.17%)
spills in affected programs: 162 -> 0
helped: 3 / HURT: 0

total fills in shared programs: 16989 -> 16761 (-1.34%)
fills in affected programs: 228 -> 0
helped: 3 / HURT: 0

Haswell
total instructions in shared programs: 16969502 -> 16969085 (<.01%)
instructions in affected programs: 185498 -> 185081 (-0.22%)
helped: 121 / HURT: 1

total cycles in shared programs: 925290863 -> 924806827 (-0.05%)
cycles in affected programs: 30200863 -> 29716827 (-1.60%)
helped: 100 / HURT: 85

total spills in shared programs: 13565 -> 13533 (-0.24%)
spills in affected programs: 736 -> 704 (-4.35%)
helped: 8 / HURT: 0

total fills in shared programs: 15468 -> 15436 (-0.21%)
fills in affected programs: 740 -> 708 (-4.32%)
helped: 8 / HURT: 0

LOST:   0
GAINED: 1

Ivy Bridge
total instructions in shared programs: 15839127 -> 15838947 (<.01%)
instructions in affected programs: 77776 -> 77596 (-0.23%)
helped: 58 / HURT: 0

total cycles in shared programs: 459852774 -> 459739770 (-0.02%)
cycles in affected programs: 11970210 -> 11857206 (-0.94%)
helped: 79 / HURT: 53

Sandy Bridge
total instructions in shared programs: 14106847 -> 14106831 (<.01%)
instructions in affected programs: 1611 -> 1595 (-0.99%)
helped: 10 / HURT: 0

total cycles in shared programs: 775004024 -> 775007516 (<.01%)
cycles in affected programs: 2530686 -> 2534178 (0.14%)
helped: 55 / HURT: 48

Iron Lake
total cycles in shared programs: 257753356 -> 257754900 (<.01%)
cycles in affected programs: 2977374 -> 2978918 (0.05%)
helped: 12 / HURT: 106

GM45
total cycles in shared programs: 169711382 -> 169712816 (<.01%)
cycles in affected programs: 2402070 -> 2403504 (0.06%)
helped: 12 / HURT: 57

Fossil-db results:

All Intel platforms had similar results. (DG2 shown)
Totals:
Instrs: 193884596 -> 193465896 (-0.22%); split: -0.25%, +0.03%
Cycles: 14050193354 -> 14048194826 (-0.01%); split: -0.34%, +0.33%
Spill count: 114944 -> 100449 (-12.61%); split: -13.59%, +0.98%
Fill count: 201525 -> 179534 (-10.91%); split: -11.22%, +0.31%
Scratch Memory Size: 10028032 -> 8468480 (-15.55%)

Totals from 16912 (2.59% of 653124) affected shaders:
Instrs: 34173709 -> 33755009 (-1.23%); split: -1.41%, +0.19%
Cycles: 2945969110 -> 2943970582 (-0.07%); split: -1.62%, +1.55%
Spill count: 97753 -> 83258 (-14.83%); split: -15.98%, +1.15%
Fill count: 176355 -> 154364 (-12.47%); split: -12.82%, +0.35%
Scratch Memory Size: 8619008 -> 7059456 (-18.09%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20176>

radeonsi: emit framebuffer state after allocating cmask

tex->cmask_base_address_reg and tex->cb_color_info are used in
si_emit_framebuffer_state so we have to re-emit the state when
they're modified.

It's not done in si_alloc_separate_cmask because it cannot
update framebuffer.dirty_cbufs.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9830
Cc: mesa-stable
Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25317>

ci/fastboot: Use a case insensitive match for a fastboot line.

Newer boards like the RB5 have a capital F, so this will make the script
more reusable for drm ci.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25311>

radeonsi/vcn: Implement destroy_fence vfunc

Now that fences are correctly cleaned up in frontend, we can store
the fence reference in picture->fence again.

The encoder also needs to implement this vfunc because if a surface
from decoder is used directly as encode input it's now up to encoder
to destroy the fence.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9834

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25296>