Tom Rini [Thu, 25 Oct 2012 08:53:14 +0000 (08:53 +0000)]
MAKEALL: Add -s to '${MAKE} tidy' section
When BUILD_NBUILDS is > 1 we run the tidy command. With the addition of
DocBook this now includes a -C doc/DocBook and a 'entering/leaving' pair
of messages happen. Since we don't want to see what's being cleaned
here, we can just invoke make -s like we do when building.
Signed-off-by: Tom Rini <trini@ti.com>
Simon Glass [Tue, 23 Oct 2012 13:49:25 +0000 (13:49 +0000)]
ext4: Fix printf() format string error
Fix the following error in the ext4 command:
cmd_ext4.c:110:3: error: format '%lu' expects argument of type
'long unsigned int', but argument 4 has type 'int' [-Werror=format]
Signed-off-by: Simon Glass <sjg@chromium.org>
Stephan Gatzka [Mon, 22 Oct 2012 23:11:41 +0000 (23:11 +0000)]
FPGA: Cyclon II: Correctly reset the FPGA before configuration
Deassert the CONFIG pin before asserting it again. This assures that the
FPGA will be resetted and therefore configuration will be correctly
enabled.
This is also already done on other FPGA's, e.g. Stratix.
Signed-off-by: Stephan Gatzka <stephan.gatzka@hbm.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stephen Warren [Mon, 22 Oct 2012 06:43:51 +0000 (06:43 +0000)]
fs: add filesystem switch libary, implement ls and fsload commands
Implement "ls" and "fsload" commands that act like {fat,ext2}{ls,load},
and transparently handle either file-system. This scheme could easily be
extended to other filesystem types; I only didn't do it for zfs because
I don't have any filesystems of that type to test with.
Replace the implementation of {fat,ext[24]}{ls,load} with this new code
too.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 22 Oct 2012 06:43:50 +0000 (06:43 +0000)]
fs: separate CONFIG_FS_{FAT, EXT4} from CONFIG_CMD_{FAT, EXT*}
This makes the FAT and ext4 filesystem implementations build if
CONFIG_FS_{FAT,EXT4} are defined, rather than basing the build on
whether CONFIG_CMD_{FAT,EXT*} are defined. This will allow the
filesystems to be built separately from the filesystem-specific commands
that use them. This paves the way for the creation of filesystem-generic
commands that used the filesystems, without requiring the filesystem-
specific commands.
Minor documentation changes are made for this change.
The new config options are automatically selected by the old config
options to retain backwards-compatibility.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Stephen Warren [Mon, 22 Oct 2012 06:43:49 +0000 (06:43 +0000)]
fs: delete unused Makefile
fs/Makefile is unused. The top-level Makefile sets LIBS-y += fs/xxx and
hence causes make to directly descend two directory levels into each
individual filesystem, and it never descends into fs/ itself.
So, delete this useless file.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Simon Glass <sjg@chromium.org>
Allen Martin [Mon, 29 Oct 2012 10:47:43 +0000 (10:47 +0000)]
arm720t: add back common.h include
Add back common.h header that was removed in previous patch so that
CONFIG_TEGRA can be evaluated correctly.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Allen Martin [Thu, 25 Oct 2012 13:30:14 +0000 (13:30 +0000)]
serial: remove calls to serial_assign()
Remove calls to serial_assign() that are failing now that it returns a
proper error code. This calls were not actually doing anything
because they passed the name of a stdio_dev when a serial_device name
is exptectd.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 16 Oct 2012 11:50:07 +0000 (11:50 +0000)]
ARM: tegra: combine duplicate Makefile rules
The rules to generate u-boot-{no,}dtb-tegra.bin were almost identical.
Combine them into a single paremeterized rule. This will allow the next
patch to edit a single rule, rather than being cut/paste twice.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Allen Martin [Fri, 19 Oct 2012 21:18:03 +0000 (21:18 +0000)]
tegra20: initialize variable to avoid compiler warning
Initialize this variable to avoid a compiler warning about possible
use of uninitialized variable with gcc 4.4.6.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Allen Martin [Fri, 19 Oct 2012 21:08:23 +0000 (21:08 +0000)]
tegra: move to common SPL framework
Change tegra SPL to use common SPL framework. Any tegra specific
initialization is now done in spl_board_init() instead of
board_init_f()/board_init_r(). Only one SPL boot target is supported
on tegra, which is boot to RAM image. jump_to_image_no_args() must be
overridden on tegra so the host CPU can be initialized.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Allen Martin [Fri, 19 Oct 2012 21:08:22 +0000 (21:08 +0000)]
SPL: make jump_to_image_no_args a weak symbol
Change jump_to_image_no_args() to a weak symbol to allow override by
SoC specific code. This is required by tegra because the SPL runs on
a different CPU from the image it is loading, so tegra specific
initialization is required to start the host CPU. Pass in spl_image
as a parameter for the same reason.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 22 Oct 2012 06:19:36 +0000 (06:19 +0000)]
ARM: tegra: don't request GPIO from Seaboard's SPL
Seaboard has a GPIO that switches an external mux between Tegra's debug
UART and SPI flash. This is initialized from the SPL so that SPL debug
output can be seen. Simplify the code that does this, and don't actually
request the GPIO in the SPL; just program it. This saves ~4.5K from the
size of the SPL, mostly BSS due to the large gpio_names[] table that is
no longer required. This makes Seaboard's SPL fit within the current max
size.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 22 Oct 2012 06:19:35 +0000 (06:19 +0000)]
ARM: tegra: select between Seaboard/Ventana at compile time
Seaboard and Ventana are very similar boards, and so share the seaboard.c
board file. The one difference needed so far is detected at run-time by
calling machine_is_ventana(). This bloats the Ventana build with code
that is never used. Switch to detecting Ventana at compile time to remove
bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit
within the max size.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 22 Oct 2012 06:19:34 +0000 (06:19 +0000)]
ARM: tegra: derive CONFIG_SPL_MAX_SIZE instead of hard-coding it
For Tegra, the SPL and main U-Boot are concatenated together to form a
single memory image. Hence, the maximum SPL size is the different in
TEXT_BASE for SPL and main U-Boot. Instead of manually calculating
SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if
one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform
the calculation automatically.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Mon, 22 Oct 2012 06:19:33 +0000 (06:19 +0000)]
ARM: enhance u-boot.lds to detect over-sized SPL
Add an ASSERT() to u-boot.lds to detect an SPL that doesn't fit within
SPL_TEXT_BASE..SPL_MAX_SIZE.
Different .lds files implement this check in two possible ways:
1) An ASSERT() like this
2) Defining a MEMORY region of size SPL_MAX_SIZE, and re-directing all
linker output into that region. Since u-boot.lds is used for both
SPL and main U-Boot, this would entail only sometimes defining a
MEMORY region, and only sometimes performing that redirection, and
hence option (1) was deemed much simpler, and hence implemented.
Note that this causes build failures at least for NVIDIA Tegra Seaboard
and Ventana. However, these are legitimate; the SPL doesn't fit within
the required space, and this does cause runtime issues.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Lucas Stach [Sun, 7 Oct 2012 11:29:38 +0000 (11:29 +0000)]
tegra: nand: make ONFI detection work
Add the missing bits to the Tegra NAND driver to make ONFI detection work
properly.
Also add it to the Tegra default config, as it seems to be a reasonable thing
to have it available on all boards that use any kind of NAND.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 12 Oct 2012 09:45:50 +0000 (09:45 +0000)]
ARM: tegra: Whistler: remove unused USB alias
Port USB1 on Whistler is intended as a device port for USB recovery.
Whistler's DT currently contains an alias for this USB port, even though
Whistler's config doesn't enable multiple USB controllers, so the alias
is unused. Remove the unused alias for consistency for now. Similar,
explicitly disable the port in the device tree too.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 12 Oct 2012 09:45:49 +0000 (09:45 +0000)]
ARM: tegra: Seaboard: enable multiple USB ports
The device tree already contains the required configuration for both the
USB1 and USB3 ports. Enable the required configuration options to enable
both these ports, which in turn allows the USB1 port to be used.
Note that on a true Seaboard, this port is typically used as a device
port hosting Tegra's USB recovery protocol. However, on the Springbank
derivative, this port is the only external USB port, so we enable it as
a host port so that USB peripherals may be used. Enabling this port in
U-Boot as a host port doesn't prevent the port from reverting to a
device port when the CPU is reset into recovery mode.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 12 Oct 2012 09:45:48 +0000 (09:45 +0000)]
ARM: tegra: Harmony: enable ULPI USB port
The ULPI port is routed onto pins on the mini PCI Express connector. A
standard breakout board may be used to access the port.
* Add required DT entries to configure the ULPI port.
* Setup up the ULPI pinmux in the board code.
* Enable multiple USB controller and ULPI support in the board config.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 2 Oct 2012 09:26:51 +0000 (09:26 +0000)]
ARM: tegra: use standard variables to define load addresses
Currently, Tegra's default environment uses non-standard variables to define
where boot scripts should load the kernel, FDT, and initrd. This change both
changes the variable names to match those described in U-Boot's README, and
shuffles their values around a little so that the values make a little more
sense; see comments in the patch for rationale behind the values chosen.
Note that this patch does remove the old non-standard variable "fdt_load" from
the default environment, so this patch requires people to change their boot
scripts.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Thu, 20 Sep 2012 09:29:03 +0000 (09:29 +0000)]
ARM: tegra: define CONFIG_SYS_BOOTMAPSZ
This define indicates the size of the memory region where it is safe
to place data passed to the Linux kernel (ATAGs, DTB, initrd). The
value needs to be:
a) Less than or equal to RAM size.
b) Small enough that the area is not within the kernel's highmem region,
since the kernel cannot access ATAGs/DTB/initrd from highmem.
c) Large enough to hold the kernel+DTB+initrd.
256M seems large enough for (c) in most circumstances, and small enough
to satisfy (a) and (b) across any possible Tegra board. Note that the
user can override this value via environment variable "bootm_mapsize"
if needed.
The advantage of defining BOOTMAPSZ is that we no longer need to define
variable fdt_high in the default environment. Previously, we defined
this to prevent the DTB from being relocated to the very end of RAM,
which on most Tegra systems is within highmem, and hence which would
cause boot failures. A user can still define this variable themselves
if they want the FDT to be either left in-place wherever loaded, or
copied to some other specific location. Similarly, there should no
longer be a strict requirement for the user to define initrd_high if
using an initrd.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Lucas Stach [Sun, 7 Oct 2012 11:36:06 +0000 (11:36 +0000)]
tegra: add Colibri T20 board support
This adds board support for the Toradex Colibri T20 module.
Working functions:
- SD card boot
- USB boot
- Network
- NAND environment
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marc Dietrich [Wed, 3 Oct 2012 04:26:28 +0000 (04:26 +0000)]
tegra: move common features to a common makefile
For Non-Nvidia boards to include newly added features (like emc clock
scaling) it would be necessary to add each feature to their own board
Makefile. This is because currently the top Makefile automaticly includes
these features only for Nvidia boards.
This patch adds a simple Makefile include so all new features become
available for non-Nvidia board vendors.
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Rini [Mon, 29 Oct 2012 15:02:11 +0000 (08:02 -0700)]
Merge branch 'master' of git://git.denx.de/u-boot-coldfire
Jason Jin [Thu, 25 Oct 2012 07:27:37 +0000 (15:27 +0800)]
ColdFire: Remove save env in NAND support for M54418TWR board.
This patch remove the env saving in NAND as so far the
NAND driver is not ported to the M54418TWR platform.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Jason Jin [Thu, 25 Oct 2012 06:51:42 +0000 (14:51 +0800)]
ColdFire: Update the lds file for M54418TWR board.
The M54418TWR lds file need to update since commit:
8b493a52367623f36e628e4ab2cf8ee082b655e0
common: Discard the __u_boot_cmd section
The command declaration now uses the new LG-array method to generate
list of commands. Thus the __u_boot_cmd section is now superseded and
redundant and therefore can be removed. Also, remove externed symbols
associated with this section from include/command.h .
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Wolfgang Denk [Wed, 24 Oct 2012 02:36:17 +0000 (02:36 +0000)]
ESTEEM192E: adjust linker script to grown code size
Once more, some of the previous changes caused the code to grow, which
causes errors like
u-boot.lds:74 cannot move location counter backwards (from
40008384 to
40008000)
when building with some older tool chains (like ELDK 4.2).
Adjust the linker script to make fit again.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Conn Clark <clark@esteem.com>
Wolfgang Denk [Wed, 24 Oct 2012 02:36:16 +0000 (02:36 +0000)]
TQM8xx: adjust linker script to grown code size
Once more, some of the previous changes caused the code to grow, which
causes errors like
u-boot.lds:80 cannot move location counter backwards (from
400082a4 to
40008000)
when building with some older tool chains (like ELDK 4.2).
Adjust the linker script to make fit again.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Wed, 24 Oct 2012 02:36:15 +0000 (02:36 +0000)]
PPC: remove dead boards (AMX860, c2mon, ETX094, IAD210, LANTEC, SCM)
These boards have long reached EOL, and there has been no indication
of any active users of such hardware for years. Get rid of the dead
weight.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Grandegger <wg@denx.de>
Albert ARIBAUD [Sat, 27 Oct 2012 09:43:17 +0000 (11:43 +0200)]
Merge remote-tracking branch 'u-boot-imx/master'
Tom Rini [Fri, 26 Oct 2012 22:44:31 +0000 (15:44 -0700)]
Merge branch 'master' of git://git.denx.de/u-boot-arm
Stephen Warren [Mon, 22 Oct 2012 06:19:32 +0000 (06:19 +0000)]
ARM: fix u-boot.lds for -ffunction-sections/-fdata-sections
When -ffunction-sections or -fdata-section are used, symbols are placed
into sections such as .data.eserial1_device and .bss.serial_current.
Update the linker script to explicitly include these. Without this
change (at least with my gcc-4.5.3 built using crosstool-ng), I see that
the sections do end up being included, but __bss_end__ gets set to the
same value as __bss_start.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Yann Vernier [Fri, 5 Oct 2012 02:09:48 +0000 (02:09 +0000)]
arm: ks8695: use defined constants for UART
CONFIG_BAUDRATE and KS8695_UART_LINEC_WLEN8 used for UART registers
Annamalai Lakshmanan [Thu, 30 Aug 2012 20:33:58 +0000 (20:33 +0000)]
Origen: Add default clock settings for multimedia IPs
Added clock settings for MFC, FIMC, FB and G3D. They are clocked to
maximum respective frequencies as per datasheet.
Signed-off-by: Annamalai Lakshmanan <annamalai.lakshmanan@linaro.org>
Signed-off-by: Giridhar Maruthy <giridhar.maruthy@linaro.org>
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Albert ARIBAUD [Thu, 18 Oct 2012 10:15:45 +0000 (10:15 +0000)]
arm: arm925t: remove SX1 board
SX1 does not build properly by itself, is not built
as part of MAKEALL arm or MAKEALL -a arm, and is only
present in Makefile, not boards.cfg. As it also has no
entry in MAINTAINERS, it is orphan and non-functional.
Remove it.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Marek Vasut [Wed, 3 Oct 2012 08:54:13 +0000 (08:54 +0000)]
arm720: Remove CONFIG_ARM7_REVD
This is a dead code, remove it.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Wed, 3 Oct 2012 08:54:12 +0000 (08:54 +0000)]
arm720: Further clean up the arm720t directory
Clean up away old macros and such, so the file doesn't start piling
up cruft.
Signed-off-by: Marek Vasut <marex@denx.de>
clean
Marek Vasut [Wed, 3 Oct 2012 08:54:11 +0000 (08:54 +0000)]
stdio: Remove the CLPS7111 serial driver
This driver is no longer used, remove it.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Wed, 3 Oct 2012 08:54:10 +0000 (08:54 +0000)]
arm: Remove support for NETARM
This stuff has been rotting in the tree for a while now. Remove it.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Wed, 3 Oct 2012 08:54:09 +0000 (08:54 +0000)]
arm: Remove support for s3c4510
This stuff has been rotting in the tree for a year now. Remove it.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Wed, 3 Oct 2012 08:54:08 +0000 (08:54 +0000)]
arm: Remove support for lpc2292
This stuff has been rotting in the tree for a year now. Remove it.
Signed-off-by: Marek Vasut <marex@denx.de>
Allen Martin [Thu, 25 Oct 2012 13:30:14 +0000 (13:30 +0000)]
serial: remove calls to serial_assign()
Remove calls to serial_assign() that are failing now that it returns a
proper error code. This calls were not actually doing anything
because they passed the name of a stdio_dev when a serial_device name
is exptectd.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Stefano Babic [Wed, 24 Oct 2012 08:06:28 +0000 (10:06 +0200)]
MX5: fix warning in clock.c
Patch fix warnings compiling with ELDK-4.2:
clock.c: In function 'get_standard_pll_sel_clk':
clock.c:341: warning: 'freq' may be used uninitialized in this function
Reported-by : Marek Vasut <marex@denx.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Albert ARIBAUD [Fri, 26 Oct 2012 05:54:25 +0000 (07:54 +0200)]
Merge remote-tracking branch 'u-boot-atmel/master'
Albert ARIBAUD [Fri, 26 Oct 2012 05:00:28 +0000 (07:00 +0200)]
Merge remote-tracking branch 'u-boot-ti/master'
Andrew Bradford [Thu, 25 Oct 2012 12:21:32 +0000 (08:21 -0400)]
am335x_evm: Enable use of UART{1,2,3,4,5}
Add targets of am335x_evm_uart{1,2,3,4,5} to have serial input/output on
UART{1,2,3,4,5} for use with the Beaglebone RS232 cape, am335x_evm
daughterboard, and other custom configurations.
Modify target for am335x_evm to include SERIAL1 and CONS_INDEX=1
options in order to clarify UART selection requirements.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
Andrew Bradford [Thu, 25 Oct 2012 12:21:31 +0000 (08:21 -0400)]
serial: ns16550: Enable COM5 and COM6
Increase the possible number of ns16550 serial devices from 4 to 6.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
Andrew Bradford [Thu, 25 Oct 2012 12:21:30 +0000 (08:21 -0400)]
am33xx: Enable UART{1,2,3,4,5} pin-mux
If configured to use UART{1,2,3,4,5} such as on the Beaglebone RS232
cape or on the am335x_evm daughterboard, enable the proper pin-muxing.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
Andrew Bradford [Thu, 25 Oct 2012 12:21:29 +0000 (08:21 -0400)]
am33xx: Enable UART{1,2,3,4,5} clocks
If configured to use UART{1,2,3,4,5} such as on the Beaglebone RS232
cape or the am335x_evm daughterboard, enable the required clocks for
the UART in use.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
Stephen Warren [Wed, 17 Oct 2012 06:44:59 +0000 (06:44 +0000)]
FAT: implement fat_set_blk_dev(), convert cmd_fat.c
This makes the FAT filesystem API more consistent with other block-based
filesystems. If in the future standard multi-filesystem commands such as
"ls" or "load" are implemented, having FAT work the same way as other
filesystems will be necessary.
Convert cmd_fat.c to the new API, so the code looks more like other files
implementing the same commands for other filesystems.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Stephen Warren [Wed, 17 Oct 2012 06:44:58 +0000 (06:44 +0000)]
FAT: initialize all fields in cur_part_info, simplify init
cur_part_info.{name,type} are strings. So, we don't need to memset()
the entire thing, just put the NULL-termination in the first byte.
Add missing initialization of the bootable and uuid fields.
None of these fields are actually used by fat.c. However, since it
stores the entire disk_partition_t, we should make sure that all fields
are valid.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Stephen Warren [Wed, 17 Oct 2012 06:44:57 +0000 (06:44 +0000)]
FAT: remove cur_part_nr
A future patch will implement the more standard filesystem API
fat_set_blk_dev(). This API has no way to know which partition number
the partition represents. Equally, future DM rework will make the
concept of partition number harder to pass around.
So, simply remove cur_part_nr from fat.c; its only use is in a
diagnostic printf, and the context where it's printed should make it
obvious which partition is referred to anyway (since the partition ID
would come from the user command-line that caused it).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Kim Phillips [Tue, 16 Oct 2012 14:28:48 +0000 (14:28 +0000)]
drivers/serial/serial_ns16550.c: sparse fixes
serial_ns16550.c:222:1: warning: symbol 'eserial1_init' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_setbrg' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_getc' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_tstc' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_putc' was not declared. Should it be static?
serial_ns16550.c:222:1: warning: symbol 'eserial1_puts' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_init' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_setbrg' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_getc' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_tstc' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_putc' was not declared. Should it be static?
serial_ns16550.c:225:1: warning: symbol 'eserial2_puts' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_init' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_setbrg' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_getc' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_tstc' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_putc' was not declared. Should it be static?
serial_ns16550.c:228:1: warning: symbol 'eserial3_puts' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_init' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_setbrg' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_getc' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_tstc' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_putc' was not declared. Should it be static?
serial_ns16550.c:231:1: warning: symbol 'eserial4_puts' was not declared. Should it be static?
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Kim Phillips [Tue, 16 Oct 2012 14:28:43 +0000 (14:28 +0000)]
drivers/i2c/fsl_i2c.c: sparse fix
fsl_i2c.c:217:14: warning: symbol 'get_i2c_clock' was not declared. Should it be static?
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
Peter Korsgaard [Thu, 18 Oct 2012 01:21:13 +0000 (01:21 +0000)]
am33xx/ddr_defs.h: rename DDR2/DDR3 defines to their actual part numbers
So other parts can be added.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
Peter Korsgaard [Thu, 18 Oct 2012 01:21:12 +0000 (01:21 +0000)]
am33xx: support board specific ddr settings
Move the hardcoded ddr2/ddr3 settings for the ti boards to board code,
so other boards can use different types/timings.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Make apply with rtc32k_enable() in the file]
Signed-off-by: Tom Rini <trini@ti.com>
Peter Korsgaard [Thu, 18 Oct 2012 01:21:11 +0000 (01:21 +0000)]
am33xx: move generic parts of pinmux handling out from board/ti/am335x
So they are available for other boards.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
Peter Korsgaard [Thu, 18 Oct 2012 01:21:10 +0000 (01:21 +0000)]
am33xx/board: use cpu_mmc_init() for default mmc initialization
So platforms can override it with board_mmc_init() if needed.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
Peter Korsgaard [Thu, 18 Oct 2012 01:21:09 +0000 (01:21 +0000)]
am33xx: move ti i2c baseboard header handling to board/ti/am335x/
The i2c header is specific to ti(-derived) boards, and not generic for all
am335x boards.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Make re-apply with rtc32k_enable() applied]
Signed-off-by: Tom Rini <trini@ti.com>
Peter Korsgaard [Thu, 18 Oct 2012 01:21:08 +0000 (01:21 +0000)]
am33xx/board.c: make wdtimer/uart_base static
Only used here (and uart_base only for SPL).
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
Tom Rini [Tue, 16 Oct 2012 13:06:07 +0000 (13:06 +0000)]
am33xx: Add SPI SPL as an option
Add the required config.mk logic for this SoC as well as the BOOT_DEVICE
define. Finally, enable the options on the am335x_evm.
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Tue, 16 Oct 2012 13:06:06 +0000 (13:06 +0000)]
omapimage: Add support for byteswapped SPI images
Add MLO.byteswap as a target to spl/Makefile and un-guard the first MLO
rule so we don't have to duplicate it.
Signed-off-by: Tom Rini <trini@ti.com>
Peter Korsgaard [Wed, 17 Oct 2012 09:20:46 +0000 (09:20 +0000)]
omap3_spi: introduce CONFIG_OMAP3_SPI_D0_D1_SWAPPED
D0/D1 Swapped or not is a board property, not anything specific to
the am33xx SoC, so add a custom define for it.
At the same time correct the bit handling for the swapped mode
(DPE0 should be cleared and SI/DPE1 set).
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
Stefano Babic [Sat, 20 Oct 2012 23:56:07 +0000 (23:56 +0000)]
OMAP3: add video support to the mcx board
Add video support to the board with the display
focaltech etm070003dh6.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stefano Babic [Tue, 16 Oct 2012 04:07:05 +0000 (04:07 +0000)]
VIDEO: add macro to set LCD size for DSS driver
Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
Stefano Babic [Tue, 16 Oct 2012 04:07:04 +0000 (04:07 +0000)]
OMAP3: mcx: updated to new hardware revision
Some GPIOs differ in the new revision board.
Previous revision are considered obsolete and
they will not anymore supported.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stefano Babic [Tue, 16 Oct 2012 04:07:03 +0000 (04:07 +0000)]
OMAP3: updated pinmux and environment for new revision of mcx board
The mcx board was slightly modified and the pinmux must be updated.
There is no need to support the old board, that becomes obsolete.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stefano Babic [Tue, 16 Oct 2012 04:02:20 +0000 (04:02 +0000)]
OMAP3: mt_ventoux: power on USB at startup
Updated revision of the board uses GPIOs to activate
the USB ports.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Vaibhav Hiremath [Thu, 8 Mar 2012 11:45:47 +0000 (17:15 +0530)]
am335x: Enable RTC 32K OSC clock
In order to support low power state, you must source kernel system
timers to persistent clock, available across suspend/resume. In case of
AM335x device, the only source we have is, RTC32K, available in
wakeup/always-on domain. Having said that, during validation it has
been observed that, RTC clock need couple of seconds delay to stabilize
the RTC OSC clock; and such a huge delay is not acceptable in kernel
especially during early init and also it will impact quick/fast boot
use-cases.
So, RTC32k OSC enable dependency has been shifted to
SPL/first-bootloader.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Alison Wang [Thu, 18 Oct 2012 19:25:52 +0000 (19:25 +0000)]
ColdFire: Add Freescale MCF54418TWR ColdFire development board support
Add Freescale MCF54418TWR ColdFire development board support.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
Alison Wang [Thu, 18 Oct 2012 19:25:51 +0000 (19:25 +0000)]
ColdFire: Add MCF5441x CPU support
Add MCF5441x CPU support.
The MCF5441x devices are a family of highly-integrated 32-bit
microprocessors based on the Version 4m ColdFire microarchitecture,
comprising of the V4 integer core, memory management unit(MMU) and
enchanced multiply-accumulate unit(EMAC).
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
Alison Wang [Sun, 21 Oct 2012 21:27:48 +0000 (21:27 +0000)]
ColdFire: Fix unused variable in cpu_init.c
Fix the following build warnings in cpu_init.c:
cpu_init.c: In function 'cpu_init_f':
cpu_init.c:47:9: warning: unused variable 'pll'
cpu_init.c:46:10: warning: unused variable 'fbcs'
cpu_init.c:44:10: warning: unused variable 'scm1'
Signed-off-by: Alison Wang <b18965@freescale.com>
Gerlando Falauto [Wed, 10 Oct 2012 22:13:10 +0000 (22:13 +0000)]
km83xx: add kmvect1 board
Add support for the new kmvect1 board powered by the mpc8309 processor.
As this board is very similar to the existing suvd3, instead of adding a
new config header file, just add a new config option to suvd3.h
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Gerlando Falauto [Wed, 10 Oct 2012 22:13:09 +0000 (22:13 +0000)]
km83xx: add common support for km8309 boards
Add support for Keymile boards based on mpc8309
(it would be only kmvect1 for now)
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
[#elseif -> #if to allow kmcoge5ne and kmeter1 to build successfully]
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Gerlando Falauto [Wed, 10 Oct 2012 22:13:08 +0000 (22:13 +0000)]
mpc83xx: add support for mpc8309
This processor, though very similar to other members of the
PowerQUICC II Pro family (namely 8308, 8360 and 832x), provides
yet another feature set than any supported sibling.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Gerlando Falauto [Wed, 10 Oct 2012 22:13:07 +0000 (22:13 +0000)]
cleanup: introduce CONFIG_MPC830x
Introduce a new configuration token CONFIG_MPC830x to be shared among
mpc8308 and mpc8309. Define it for existing 8308 boards, and refactor
existing common code so to make future introduction of 8309 simpler.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Gerlando Falauto [Wed, 10 Oct 2012 22:13:06 +0000 (22:13 +0000)]
cleanup: use CONFIG_QE instead of CONFIG_MPC8360 || CONFIG_MPC832x
simplify #if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x)
for qe variables
with #if defined(CONFIG_QE)
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Gerlando Falauto [Wed, 10 Oct 2012 22:13:05 +0000 (22:13 +0000)]
cosmetic: suvd3: align #defines
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Igor Grinberg [Sun, 7 Oct 2012 01:17:34 +0000 (01:17 +0000)]
cm-t35: clean unused defines from config
Neither cm-t35, nor cm-t3730 is using OneNAND or flash.
Remove the related defines from config file.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Andrew Bradford [Mon, 1 Oct 2012 05:06:52 +0000 (05:06 +0000)]
configs: Fix usage of mmc rescan
Fix usage of 'mmc rescan' by many configs. Proper use is
'mmc dev ${mmcdev}; mmc rescan' to set the mmc device and then rescan
the device. 'mmc rescan' itself does not take any arguments.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
Joel A Fernandes [Tue, 25 Sep 2012 06:49:47 +0000 (06:49 +0000)]
am33xx: Enable DDR3 for DDR3 version of beaglebone
DDR3 support is tested and working with beaglebone hardware. Include a check
for this board type and configure DDR3. The timings and other configuration
match EVM SK.
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Jason Kridner <jdk@ti.com>
Pankaj Bharadiya [Thu, 13 Sep 2012 09:38:16 +0000 (09:38 +0000)]
USB: musb_udc: Make musb_peri_rx_ep check for MUSB_RXCSR_RXPKTRDY
The endpoint rx count register value will be zero if it is read before
receive packet ready bit (PERI_RXCSR:RXPKTRDY) is set.
Check for the receive packet ready bit (PERI_RXCSR:RXPKTRDY) before
reading endpoint rx count register. Proceed with rx count read and
FIFO read only if RXPKTRDY bit is set.
Signed-off-by: Pankaj Bharadiya <pankaj.bharadiya@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Tue, 23 Oct 2012 02:54:48 +0000 (19:54 -0700)]
Merge branch 'master' of git://git.denx.de/u-boot-fdt
Gerald Van Baren [Tue, 23 Oct 2012 00:42:09 +0000 (20:42 -0400)]
Merge branch 'next'
Tom Rini [Mon, 22 Oct 2012 23:54:38 +0000 (16:54 -0700)]
Merge branch 'master' of git://denx.de/git/u-boot-mpc85xx
Tom Rini [Mon, 22 Oct 2012 23:53:19 +0000 (16:53 -0700)]
Merge branch 'master' of git://denx.de/git/u-boot-mmc
Andy Fleming [Mon, 22 Oct 2012 22:28:18 +0000 (17:28 -0500)]
85xx: Protect timeout_save variable with ifdefs
The timeout_save variable was only used by the DDR111_134
erratum code. It was being set, but never used. Newer compilers
will actually complain about this.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Liu Gang [Sun, 14 Oct 2012 20:55:17 +0000 (20:55 +0000)]
powerpc/boot: Change the compile macro for SRIO & PCIE boot master module
Currently, the SRIO and PCIE boot master module will be compiled into the
u-boot image if the macro "CONFIG_FSL_CORENET" has been defined. And this
macro has been included by all the corenet architecture platform boards.
But in fact, it's uncertain whether all corenet platform boards support
this feature.
So it may be better to get rid of the macro "CONFIG_FSL_CORENET", and add
a special macro for every board which can support the feature. This
special macro will be defined in the header file
"arch/powerpc/include/asm/config_mpc85xx.h". It will decide if the SRIO
and PCIE boot master module should be compiled into the board u-boot image.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Mingkai Hu [Fri, 12 Oct 2012 02:34:15 +0000 (02:34 +0000)]
phylib: Enable SMSC LAN87xx PHY support
LAN8720 PHY is used on Freescale C2X0QDS board.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Shaohui Xie [Thu, 11 Oct 2012 20:31:46 +0000 (20:31 +0000)]
powerpc/espi: remove write command length check
Current espi controller driver assumes the command length of write command is
not equal to '1', it was made based on SPANSION SPI flash, but some SPI flash
driver such as SST does use write command length as '1', so write command on
SST SPI flash will not work. And the length check for write command is not
necessary for SPANSION, though it's harmless for SPANSION, it will stop write
operation on flashes like SST, so we remove the check.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
shaohui xie [Thu, 11 Oct 2012 20:25:36 +0000 (20:25 +0000)]
powerpc/fm: fix TBI PHY address settings
TBI PHY address (TBIPA) register is set in general frame manager
phy init funciton dtsec_init_phy() in drivers/net/fm/eth.c, and
it is supposed to set TBIPA on FM1@DTSEC1 in case of FM1@DTSEC1
isn't used directly, which provides MDIO for other ports. So
following code is wrong in case of FM2, which has a different
mac base.
struct dtsec *regs = (struct dtsec *)fm_eth->mac->base;
/* Assign a Physical address to the TBI */
out_be32(®s->tbipa, CONFIG_SYS_TBIPA_VALUE);
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Haiying Wang [Thu, 11 Oct 2012 07:13:39 +0000 (07:13 +0000)]
poweprc/85xx: add QMan frequency info and fdt fixup.
Starting from QMan3.0, the QMan clock cycle needs be exposed so that the kernel
driver can use it to calculate the shaper prescaler and rate.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Haiying Wang [Thu, 11 Oct 2012 07:13:38 +0000 (07:13 +0000)]
mpc85xx/portals: Add qman and bman ip_cfg field into portal info
Because QMan3.0 and BMan2.1 used ip_cfg in ip_rev_2 register to differ the
total portal number, buffer pool number etc, we can use this info to limit
those resources in kernel driver.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Thu, 11 Oct 2012 07:13:37 +0000 (07:13 +0000)]
powerpc/t4qds: Add T4QDS board
The T4240QDS is a high-performance computing evaluation, development and
test platform supporting the T4240 QorIQ Power Architecture™ processor.
SERDES Connections
32 lanes grouped into four 8-lane banks
Two “front side” banks dedicated to Ethernet
Two “back side” banks dedicated to other protocols
DDR Controllers
Three independant 64-bit DDR3 controllers
Supports rates up to 2133 MHz data-rate
Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller
QIXIS System Logic FPGA
Each DDR controller has two DIMM slots. The first slot of each controller
has up to 4 chip selects to support single-, dual- and quad-rank DIMMs.
The second slot has only 2 chip selects to support single- and dual-rank
DIMMs. At any given time, up to total 4 chip selects can be used.
Detail information can be found in doc/README.t4qds
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Mon, 8 Oct 2012 07:44:31 +0000 (07:44 +0000)]
powerpc/mpc85xx: Add CONFIG_DDR_CLK_FREQ for corenet platform
New corenet platforms with chassis2 have separated DDR clock inputs. Use
CONFIG_DDR_CLK_FREQ for DDR clock. This patch also cleans up the logic of
detecting and displaying synchronous vs asynchronous mode.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Mon, 8 Oct 2012 07:44:30 +0000 (07:44 +0000)]
powerpc/mpc85xx: Rewrite spin table to comply with ePAPR v1.1
Move spin table to cached memory to comply with ePAPR v1.1.
Load R3 with 64-bit value if CONFIG_SYS_PPC64 is defined.
'M' bit is set for DDR TLB to maintain cache coherence.
See details in doc/README.mpc85xx-spin-table.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Mon, 8 Oct 2012 07:44:29 +0000 (07:44 +0000)]
powerpc/mpc85xx: Remove R6 from spin table
R6 was in ePAPR draft version but was dropped in official spec.
Removing it to comply.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Mon, 8 Oct 2012 07:44:28 +0000 (07:44 +0000)]
powerpc/mpc8xxx: Fix DDR SPD failed message
Since empty DIMM slot is allowed on other than the first slot, remove the
error message if SPD is not found in this case.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Mon, 8 Oct 2012 07:44:27 +0000 (07:44 +0000)]
powerpc/mpc8xxx: Add auto select bank interleaving mode
Based on populated DIMMs, automatically select from cs0_cs1_cs2_cs3 or
cs0_cs1 interleaving, or non-interleaving if not available.
Fix the message of interleaving disabled if controller interleaving
is enabled but DIMMs don't support it.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>