ChangeLog:
[platform/upstream/binutils.git] / sim / bfin /
2012-01-04 Joel BrobeckerCopyright year update in most files of the GDB Project.
2011-12-03 Mike Frysingersim: bfin: lookup target strings when tracing system...
2011-12-03 Mike Frysingersim: generate build dependencies on the fly
2011-10-19 Mike Frysingersim: dv-cfi: check for log2 support in libm when enabled
2011-10-18 Mike Frysingersim: rename common/aclocal.m4 to common/acinclude.m4
2011-10-18 Mike Frysingersim: move from common.m4 to SIM_AC_COMMON
2011-09-29 Mike Frysingersim: bfin: use store buffer for VIT_MAX insns
2011-07-05 Mike Frysingersim: start a unified sim_do_command
2011-07-01 Mike Frysingersim: bfin: implement stat_map for virtual environments...
2011-06-22 Mike Frysingersim: bfin: pass up result2/errcode with libgloss syscalls
2011-06-18 Mike Frysingersim: bfin: set ASTAT AV/AVS when shifting accumulators...
2011-06-18 Mike Frysingersim: bfin: do not touch ASTAT[V] when shifting accumulators
2011-06-18 Mike Frysingersim: bfin: do not extend accumulator in LSHIFT insns
2011-06-18 Mike Frysingersim: bfin: tweak saturation handling with TFU/FU modes...
2011-06-18 Mike Frysingersim: bfin: handle large shift values with accumulator...
2011-06-18 Mike Frysingersim: bfin: handle odd shift values with shift insns
2011-06-18 Mike Frysingersim: bfin: fix M_IH saturation size
2011-06-18 Mike Frysingersim: bfin: handle V/VS saturation in dsp mac insns
2011-06-18 Mike Frysingersim: bfin: handle the MM flag in M_IU/M_TFU modes with...
2011-06-18 Mike Frysingersim: bfin: fix sign extension in dsp insns with MM...
2011-06-18 Mike Frysingersim: bfin: fix dsp insns IH saturation/rounding behavior
2011-06-18 Mike Frysingersim: bfin: fix inverted changelog entry
2011-06-18 Mike Frysingersim: bfin: fix accumulator edge case saturation
2011-06-18 Mike Frysingersim: bfin: use freeargv for freeing argvs
2011-06-04 Mike Frysingersim: bfin: add support for glued SIC interrupt lines
2011-06-04 Mike Frysingersim: bfin: push SIC mappings to device tree
2011-06-03 Mike Frysingersim: bfin: dma: fix indentation
2011-05-26 Mike Frysingersim: bfin: switch to new syscall trace level
2011-05-25 Mike Frysingersim: bfin: move model data into machs.h
2011-05-25 Mike Frysingersim: bfin: add a performance monitor stub
2011-05-25 Mike Frysingersim: bfin: add bf526-0.2/bf54x-0.4 rom regions
2011-05-14 Mike Frysingersim: bfin: allow pushing of SP
2011-05-14 Mike Frysingersim: bfin: implement loop back support in the UARTs
2011-05-09 Mike Frysingersim: bfin: fix UART LSR read-only bit saturation
2011-04-27 Mike Frysingersim: bfin: constify dmac pmap arrays
2011-04-26 Mike Frysingersim: gpio: add output support
2011-04-26 Mike Frysingersim: gpio: update mask a/b signals better
2011-04-16 Mike Frysingersim: bfin: use store buffer with more 32bit insns
2011-04-15 Mike Frysingersim: bfin: handle implicit DISALGNEXCPT with video...
2011-04-11 Mike Frysingersim: bfin: respect the port level on signals to the SIC
2011-04-11 Mike Frysingersim: bfin: add missing GPIO pin 15
2011-04-01 Mike Frysingersim: bfin: add OTP output port
2011-03-29 Mike Frysingersim: bfin: regen configure to include new cfi device
2011-03-29 Mike Frysingersim: bfin: fix sign extension with 16bit acc add insns
2011-03-27 Mike Frysingersim: bfin: handle saturation with RND12 sub insns
2011-03-26 Mike Frysingersim: bfin: add missing VS set with add/sub insns
2011-03-25 Mike Frysingersim: bfin: add hw tracing to gpio/sic port events
2011-03-25 Mike Frysingersim: bfin: fix GPIO logic bugs when processing events
2011-03-25 Mike Frysingersim: bfin: fix clear/set/toggle GPIO handling
2011-03-24 Mike Frysingersim: bfin: document SIC limitation
2011-03-24 Mike Frysingersim: bfin: fix inverted W1C logic
2011-03-24 Mike Frysingersim: bfin: define more UART LSR bits
2011-03-24 Mike Frysingersim: bfin: fix typo in TWI stat reg
2011-03-24 Mike Frysingersim: bfin: update VIT_MAX behavior to match hardware...
2011-03-24 Mike Frysingersim: bfin: always do 16bit sign extension with the...
2011-03-24 Mike Frysingersim: bfin: update AV and AC ASTAT bits with acc negation
2011-03-24 Mike Frysingersim: bfin: fix thinko in SIC pin encoding
2011-03-24 Mike Frysingersim: bfin: allow byteop[123]p src regs to be the same
2011-03-24 Mike Frysingersim: bfin: fix thinko in bfin_gpio bus addresses
2011-03-17 Mike Frysingersim: bfin: check for kill/pread
2011-03-15 Mike Frysingersim: bfin: add GPIO device simulation
2011-03-15 Mike Frysingersim: bfin: fix brace style
2011-03-15 Mike Frysingersim: bfin: fix brace style
2011-03-15 Mike Frysingersim: bfin: handle AZ updates with 16bit adds/subs
2011-03-15 Mike Frysingersim: bfin: skip acc/ASTAT updates for moves
2011-03-15 Mike Frysingersim: bfin: handle AN (negative overflows) in dsp mult...
2011-03-15 Mike Frysingersim: bfin: handle V overflows in dsp mult insns
2011-03-15 Mike Frysingersim: bfin: decode ASTAT on failure
2011-03-15 Mike Frysingersim: bfin: handle saturation with fract multiplications
2011-03-14 Mike Frysingersim: bfin: forgot to cvs add the changelog
2011-03-06 Mike Frysingersim: bfin: new port