projects
/
external
/
binutils.git
/ history
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
first ⋅ prev ⋅ next
sim: tests: support .S/.c files
[external/binutils.git]
/
sim
/
bfin
/
2011-05-14
Mike Frysinger
sim: bfin: allow pushing of SP
tree
|
commitdiff
2011-05-14
Mike Frysinger
sim: bfin: implement loop back support in the UARTs
tree
|
commitdiff
2011-05-09
Mike Frysinger
sim: bfin: fix UART LSR read-only bit saturation
tree
|
commitdiff
2011-04-27
Mike Frysinger
sim: bfin: constify dmac pmap arrays
tree
|
commitdiff
2011-04-26
Mike Frysinger
sim: gpio: add output support
tree
|
commitdiff
2011-04-26
Mike Frysinger
sim: gpio: update mask a/b signals better
tree
|
commitdiff
2011-04-16
Mike Frysinger
sim: bfin: use store buffer with more 32bit insns
tree
|
commitdiff
2011-04-15
Mike Frysinger
sim: bfin: handle implicit DISALGNEXCPT with video...
tree
|
commitdiff
2011-04-11
Mike Frysinger
sim: bfin: respect the port level on signals to the SIC
tree
|
commitdiff
2011-04-11
Mike Frysinger
sim: bfin: add missing GPIO pin 15
tree
|
commitdiff
2011-04-01
Mike Frysinger
sim: bfin: add OTP output port
tree
|
commitdiff
2011-03-29
Mike Frysinger
sim: bfin: regen configure to include new cfi device
tree
|
commitdiff
2011-03-29
Mike Frysinger
sim: bfin: fix sign extension with 16bit acc add insns
tree
|
commitdiff
2011-03-27
Mike Frysinger
sim: bfin: handle saturation with RND12 sub insns
tree
|
commitdiff
2011-03-26
Mike Frysinger
sim: bfin: add missing VS set with add/sub insns
tree
|
commitdiff
2011-03-25
Mike Frysinger
sim: bfin: add hw tracing to gpio/sic port events
tree
|
commitdiff
2011-03-25
Mike Frysinger
sim: bfin: fix GPIO logic bugs when processing events
tree
|
commitdiff
2011-03-25
Mike Frysinger
sim: bfin: fix clear/set/toggle GPIO handling
tree
|
commitdiff
2011-03-24
Mike Frysinger
sim: bfin: document SIC limitation
tree
|
commitdiff
2011-03-24
Mike Frysinger
sim: bfin: fix inverted W1C logic
tree
|
commitdiff
2011-03-24
Mike Frysinger
sim: bfin: define more UART LSR bits
tree
|
commitdiff
2011-03-24
Mike Frysinger
sim: bfin: fix typo in TWI stat reg
tree
|
commitdiff
2011-03-24
Mike Frysinger
sim: bfin: update VIT_MAX behavior to match hardware...
tree
|
commitdiff
2011-03-24
Mike Frysinger
sim: bfin: always do 16bit sign extension with the...
tree
|
commitdiff
2011-03-24
Mike Frysinger
sim: bfin: update AV and AC ASTAT bits with acc negation
tree
|
commitdiff
2011-03-24
Mike Frysinger
sim: bfin: fix thinko in SIC pin encoding
tree
|
commitdiff
2011-03-24
Mike Frysinger
sim: bfin: allow byteop[123]p src regs to be the same
tree
|
commitdiff
2011-03-24
Mike Frysinger
sim: bfin: fix thinko in bfin_gpio bus addresses
tree
|
commitdiff
2011-03-17
Mike Frysinger
sim: bfin: check for kill/pread
tree
|
commitdiff
2011-03-15
Mike Frysinger
sim: bfin: add GPIO device simulation
tree
|
commitdiff
2011-03-15
Mike Frysinger
sim: bfin: fix brace style
tree
|
commitdiff
2011-03-15
Mike Frysinger
sim: bfin: fix brace style
tree
|
commitdiff
2011-03-15
Mike Frysinger
sim: bfin: handle AZ updates with 16bit adds/subs
tree
|
commitdiff
2011-03-15
Mike Frysinger
sim: bfin: skip acc/ASTAT updates for moves
tree
|
commitdiff
2011-03-15
Mike Frysinger
sim: bfin: handle AN (negative overflows) in dsp mult...
tree
|
commitdiff
2011-03-15
Mike Frysinger
sim: bfin: handle V overflows in dsp mult insns
tree
|
commitdiff
2011-03-15
Mike Frysinger
sim: bfin: decode ASTAT on failure
tree
|
commitdiff
2011-03-15
Mike Frysinger
sim: bfin: handle saturation with fract multiplications
tree
|
commitdiff
2011-03-14
Mike Frysinger
sim: bfin: forgot to cvs add the changelog
tree
|
commitdiff
2011-03-06
Mike Frysinger
sim: bfin: new port
tree
|
commitdiff