sim: bfin: add missing VS set with add/sub insns
[external/binutils.git] / sim / bfin / bfin-sim.c
2011-03-26 Mike Frysingersim: bfin: add missing VS set with add/sub insns
2011-03-24 Mike Frysingersim: bfin: update VIT_MAX behavior to match hardware...
2011-03-24 Mike Frysingersim: bfin: always do 16bit sign extension with the...
2011-03-24 Mike Frysingersim: bfin: update AV and AC ASTAT bits with acc negation
2011-03-24 Mike Frysingersim: bfin: allow byteop[123]p src regs to be the same
2011-03-15 Mike Frysingersim: bfin: handle AZ updates with 16bit adds/subs
2011-03-15 Mike Frysingersim: bfin: skip acc/ASTAT updates for moves
2011-03-15 Mike Frysingersim: bfin: handle AN (negative overflows) in dsp mult...
2011-03-15 Mike Frysingersim: bfin: handle V overflows in dsp mult insns
2011-03-15 Mike Frysingersim: bfin: decode ASTAT on failure
2011-03-15 Mike Frysingersim: bfin: handle saturation with fract multiplications
2011-03-06 Mike Frysingersim: bfin: new port