Updated French translation for the ld subdirectory.
[external/binutils.git] / opcodes /
2018-11-06 Sudakshina Das[BINUTILS, ARM] Add Armv8.5-A to select_arm_features...
2018-11-06 Alan ModraPowerPC instruction mask checks
2018-11-06 Jan Beulichx86: correctly handle VPBROADCASTD with EVEX.W set...
2018-11-06 Jan Beulichx86: correctly handle VMOVD with EVEX.W set outside...
2018-11-06 Jan Beulichx86: correctly handle KMOVD with VEX.W set outside...
2018-11-06 Jan Beulichx86: adjust {,E}VEX.W handling for PEXTR* / PINSR*
2018-11-06 Jan Beulichx86: adjust {,E}VEX.W handling outside of 64-bit mode
2018-11-06 Jan Beulichx86: fix various non-LIG templates
2018-11-06 Jan Beulichx86: allow {store} to select alternative {,}PEXTRW...
2018-11-06 Jan Beulichx86: add more VexWIG
2018-11-06 Jan Beulichx86: XOP VPHADD* / VPHSUB* are VEX.W0
2018-10-23 Andreas KrebbelS/390: Support vector alignment hints
2018-10-22 John DarringtonS12Z: Disassembly: Fallback to show the address if...
2018-10-19 Tamar ChristinaArm: Fix disassembler crashing on -b binary when thumb...
2018-10-16 Matthew MalcomsonAArch64: Fix error checking for SIMD udot (by element)
2018-10-10 Jan Beulichx86: fold Size{16,32,64} template attributes
2018-10-09 Sudakshina Das[PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instr...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5...
2018-10-08 Tamar ChristinaAArch64: Replace C initializers with memset
2018-10-05 H.J. Lux86: Add Intel ENCLV to assembler and disassembler
2018-10-05 Sudakshina Das[Arm, 2/3] Add instruction SB for AArch32
2018-10-05 Richard Hendersonor1k: Add the l.muld, l.muldu, l.macu, l.msbu insns
2018-10-05 Stafford Horneor1k: Add the l.adrp insn and supporting relocations
2018-10-05 Richard Hendersonor1k: Add relocations for high-signed and low-stores
2018-10-03 Tamar ChristinaAArch64: Constraint disassembler and assembler changes.
2018-10-03 Tamar ChristinaAArch64: Add SVE constraints verifier.
2018-10-03 Tamar ChristinaAArch64: Refactor verifiers to make more general.
2018-10-03 Tamar ChristinaAArch64: Refactor err_type.
2018-10-03 Tamar ChristinaAArch64: Wire through instr_sequence
2018-10-03 Tamar ChristinaAArch64: Mark sve instructions that require MOVPRFX...
2018-10-02 Palmer DabbeltRISC-V: Add fence.tso instruction
2018-09-23 Sandra LoosemoreFix incorrect extraction of signed constants in nios2...
2018-09-21 Simon Marchicsky-opc.h: Initialize fields of last array elements
2018-09-20 Maciej W. RozyckiARC: Fix build errors with large constants and C89
2018-09-20 Nick CliftonAndes Technology has good news for you, we plan to...
2018-09-17 Jim WilsonRISC-V: bge[u] should get higher priority than ble[u].
2018-09-17 H.J. Lux86: Set EVex=2 on EVEX.128 only vmovd and vmovq
2018-09-17 H.J. Lux86: Set Vex=1 on VEX.128 only vmovd and vmovq
2018-09-17 H.J. Lux86: Update disassembler for VexWIG
2018-09-17 H.J. Lux86: Replace VexW=3 with VexWIG
2018-09-16 H.J. Lux86: Set VexW=3 on AVX vrsqrtss
2018-09-15 H.J. Lux86: Set Vex=1 on VEX.128 only vmovq
2018-09-14 H.J. Lux86: Support VEX/EVEX WIG encoding
2018-09-14 H.J. Lux86: Handle unsupported static rounding in vcvt[u]si2sd...
2018-09-14 H.J. Lux86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32...
2018-09-14 H.J. Lui386: Reformat OP_E_memory
2018-09-14 Jan Beulichx86: fold CRC32 templates
2018-09-13 H.J. Lux86: Remove VexW=1 from WIG VEX movq and vmovq
2018-09-13 H.J. Lui386: Update VexW field for VEX instructions
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from a few further insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512_4* insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512DQ insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512BW insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512VL insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512ER insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512F insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SHA insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from XOP and SSE4a insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX2 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from GNFI insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from PCLMUL/VPCLMUL insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AES/VAES insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE4.2 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE4.1 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSSE3 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE3 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE2 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE insns
2018-09-13 Jan Beulichx86: drop unnecessary {,No}Rex64
2018-09-13 Jan Beulichx86: also allow D on 3-operand insns
2018-09-13 Jan Beulichx86: use D attribute also for SIMD templates
2018-09-13 Jan Beulichx86-64: bndmk, bndldx, and bndstx don't allow RIP-relat...
2018-09-08 John DarringtonS12Z: Make disassebler work for --enable-targets=all...
2018-08-31 Jim WilsonRISC-V: Correct the requirement of compressed floating...
2018-08-30 Jim WilsonRISC-V: Allow instruction require more than one extension
2018-08-29 Martin Abergsparc/leon: add support for partial write psr instruction
2018-08-29 Chenghua Xu[MIPS] Add Loongson 2K1000 proccessor support.
2018-08-29 Chenghua Xu[MIPS] Add Loongson 3A2000/3A3000 proccessor support.
2018-08-29 Chenghua Xu[MIPS] Add Loongson 3A1000 proccessor support.
2018-08-29 Chenghua Xu[MIPS/GAS] Add Loongson EXT2 Instructions support.
2018-08-29 Chenghua Xu[MIPS/GAS] Split Loongson EXT Instructions from loongson3a.
2018-08-29 Chenghua Xu[MIPS/GAS] Split Loongson CAM Instructions from loongson3a
2018-08-21 Alan ModraUse operand->extract to provide defaults for optional...
2018-08-21 Alan ModraFix s12z test regexps
2018-08-20 Alan ModraTidy bit twiddling
2018-08-18 John DarringtonOpcodes: (BRCLR / BRSET) Disassemble reserved codes...
2018-08-18 John DarringtonS12Z: Move opcode header to public include directory.
2018-08-14 H.J. Lux86-64: Display eiz for address with the addr32 prefix
2018-08-11 H.J. Lux86: Add CpuCMOV and CpuFXSR
2018-08-06 claziss[ARC] Update handling AUX-registers.
2018-08-06 Jan Beulichx86: fold RegEip/RegRip and RegEiz/RegRiz
2018-08-03 Jan Beulichx86: drop NoRex64 from {,v}pmov{s,z}x*
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