2018-11-06 |
Jan Beulich | x86: correctly handle VMOVD with EVEX.W set outside... |
tree | commitdiff |
2018-11-06 |
Jan Beulich | x86: correctly handle KMOVD with VEX.W set outside... |
tree | commitdiff |
2018-11-06 |
Jan Beulich | x86: adjust {,E}VEX.W handling for PEXTR* / PINSR* |
tree | commitdiff |
2018-11-06 |
Jan Beulich | x86: adjust {,E}VEX.W handling outside of 64-bit mode |
tree | commitdiff |
2018-11-06 |
Jan Beulich | x86: fix various non-LIG templates |
tree | commitdiff |
2018-11-06 |
Jan Beulich | x86: allow {store} to select alternative {,}PEXTRW... |
tree | commitdiff |
2018-11-06 |
Jan Beulich | x86: add more VexWIG |
tree | commitdiff |
2018-11-06 |
Jan Beulich | x86: XOP VPHADD* / VPHSUB* are VEX.W0 |
tree | commitdiff |
2018-10-23 |
Andreas Krebbel | S/390: Support vector alignment hints |
tree | commitdiff |
2018-10-22 |
John Darrington | S12Z: Disassembly: Fallback to show the address if... |
tree | commitdiff |
2018-10-19 |
Tamar Christina | Arm: Fix disassembler crashing on -b binary when thumb... |
tree | commitdiff |
2018-10-16 |
Matthew Malcomson | AArch64: Fix error checking for SIMD udot (by element) |
tree | commitdiff |
2018-10-10 |
Jan Beulich | x86: fold Size{16,32,64} template attributes |
tree | commitdiff |
2018-10-09 |
Sudakshina Das | [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS |
tree | commitdiff |
2018-10-09 |
Sudakshina Das | [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and... |
tree | commitdiff |
2018-10-09 |
Sudakshina Das | [PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction |
tree | commitdiff |
2018-10-09 |
Sudakshina Das | [PATCH, BINUTILS, AARCH64, 6/9] Add Random number instr... |
tree | commitdiff |
2018-10-09 |
Sudakshina Das | [PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction |
tree | commitdiff |
2018-10-09 |
Sudakshina Das | [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data... |
tree | commitdiff |
2018-10-09 |
Sudakshina Das | [PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB... |
tree | commitdiff |
2018-10-09 |
Sudakshina Das | [PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing... |
tree | commitdiff |
2018-10-09 |
Sudakshina Das | [PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5... |
tree | commitdiff |
2018-10-08 |
Tamar Christina | AArch64: Replace C initializers with memset |
tree | commitdiff |
2018-10-05 |
H.J. Lu | x86: Add Intel ENCLV to assembler and disassembler |
tree | commitdiff |
2018-10-05 |
Sudakshina Das | [Arm, 2/3] Add instruction SB for AArch32 |
tree | commitdiff |
2018-10-05 |
Richard Henderson | or1k: Add the l.muld, l.muldu, l.macu, l.msbu insns |
tree | commitdiff |
2018-10-05 |
Stafford Horne | or1k: Add the l.adrp insn and supporting relocations |
tree | commitdiff |
2018-10-05 |
Richard Henderson | or1k: Add relocations for high-signed and low-stores |
tree | commitdiff |
2018-10-03 |
Tamar Christina | AArch64: Constraint disassembler and assembler changes. |
tree | commitdiff |
2018-10-03 |
Tamar Christina | AArch64: Add SVE constraints verifier. |
tree | commitdiff |
2018-10-03 |
Tamar Christina | AArch64: Refactor verifiers to make more general. |
tree | commitdiff |
2018-10-03 |
Tamar Christina | AArch64: Refactor err_type. |
tree | commitdiff |
2018-10-03 |
Tamar Christina | AArch64: Wire through instr_sequence |
tree | commitdiff |
2018-10-03 |
Tamar Christina | AArch64: Mark sve instructions that require MOVPRFX... |
tree | commitdiff |
2018-10-02 |
Palmer Dabbelt | RISC-V: Add fence.tso instruction |
tree | commitdiff |
2018-09-23 |
Sandra Loosemore | Fix incorrect extraction of signed constants in nios2... |
tree | commitdiff |
2018-09-21 |
Simon Marchi | csky-opc.h: Initialize fields of last array elements |
tree | commitdiff |
2018-09-20 |
Maciej W. Rozycki | ARC: Fix build errors with large constants and C89 |
tree | commitdiff |
2018-09-20 |
Nick Clifton | Andes Technology has good news for you, we plan to... |
tree | commitdiff |
2018-09-17 |
Jim Wilson | RISC-V: bge[u] should get higher priority than ble[u]. |
tree | commitdiff |
2018-09-17 |
H.J. Lu | x86: Set EVex=2 on EVEX.128 only vmovd and vmovq |
tree | commitdiff |
2018-09-17 |
H.J. Lu | x86: Set Vex=1 on VEX.128 only vmovd and vmovq |
tree | commitdiff |
2018-09-17 |
H.J. Lu | x86: Update disassembler for VexWIG |
tree | commitdiff |
2018-09-17 |
H.J. Lu | x86: Replace VexW=3 with VexWIG |
tree | commitdiff |
2018-09-16 |
H.J. Lu | x86: Set VexW=3 on AVX vrsqrtss |
tree | commitdiff |
2018-09-15 |
H.J. Lu | x86: Set Vex=1 on VEX.128 only vmovq |
tree | commitdiff |
2018-09-14 |
H.J. Lu | x86: Support VEX/EVEX WIG encoding |
tree | commitdiff |
2018-09-14 |
H.J. Lu | x86: Handle unsupported static rounding in vcvt[u]si2sd... |
tree | commitdiff |
2018-09-14 |
H.J. Lu | x86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32... |
tree | commitdiff |
2018-09-14 |
H.J. Lu | i386: Reformat OP_E_memory |
tree | commitdiff |
2018-09-14 |
Jan Beulich | x86: fold CRC32 templates |
tree | commitdiff |
2018-09-13 |
H.J. Lu | x86: Remove VexW=1 from WIG VEX movq and vmovq |
tree | commitdiff |
2018-09-13 |
H.J. Lu | i386: Update VexW field for VEX instructions |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from a few further insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512_4* insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512DQ insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512BW insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512VL insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512ER insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512F insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SHA insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from XOP and SSE4a insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX2 insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from GNFI insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from PCLMUL/VPCLMUL insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AES/VAES insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSE4.2 insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSE4.1 insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSSE3 insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSE3 insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSE2 insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSE insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: drop unnecessary {,No}Rex64 |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: also allow D on 3-operand insns |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86: use D attribute also for SIMD templates |
tree | commitdiff |
2018-09-13 |
Jan Beulich | x86-64: bndmk, bndldx, and bndstx don't allow RIP-relat... |
tree | commitdiff |
2018-09-08 |
John Darrington | S12Z: Make disassebler work for --enable-targets=all... |
tree | commitdiff |
2018-08-31 |
Jim Wilson | RISC-V: Correct the requirement of compressed floating... |
tree | commitdiff |
2018-08-30 |
Jim Wilson | RISC-V: Allow instruction require more than one extension |
tree | commitdiff |
2018-08-29 |
Martin Aberg | sparc/leon: add support for partial write psr instruction |
tree | commitdiff |
2018-08-29 |
Chenghua Xu | [MIPS] Add Loongson 2K1000 proccessor support. |
tree | commitdiff |
2018-08-29 |
Chenghua Xu | [MIPS] Add Loongson 3A2000/3A3000 proccessor support. |
tree | commitdiff |
2018-08-29 |
Chenghua Xu | [MIPS] Add Loongson 3A1000 proccessor support. |
tree | commitdiff |
2018-08-29 |
Chenghua Xu | [MIPS/GAS] Add Loongson EXT2 Instructions support. |
tree | commitdiff |
2018-08-29 |
Chenghua Xu | [MIPS/GAS] Split Loongson EXT Instructions from loongson3a. |
tree | commitdiff |
2018-08-29 |
Chenghua Xu | [MIPS/GAS] Split Loongson CAM Instructions from loongson3a |
tree | commitdiff |
2018-08-21 |
Alan Modra | Use operand->extract to provide defaults for optional... |
tree | commitdiff |
2018-08-21 |
Alan Modra | Fix s12z test regexps |
tree | commitdiff |
2018-08-20 |
Alan Modra | Tidy bit twiddling |
tree | commitdiff |
2018-08-18 |
John Darrington | Opcodes: (BRCLR / BRSET) Disassemble reserved codes... |
tree | commitdiff |
2018-08-18 |
John Darrington | S12Z: Move opcode header to public include directory. |
tree | commitdiff |
2018-08-14 |
H.J. Lu | x86-64: Display eiz for address with the addr32 prefix |
tree | commitdiff |
2018-08-11 |
H.J. Lu | x86: Add CpuCMOV and CpuFXSR |
tree | commitdiff |
2018-08-06 |
claziss | [ARC] Update handling AUX-registers. |
tree | commitdiff |
2018-08-06 |
Jan Beulich | x86: fold RegEip/RegRip and RegEiz/RegRiz |
tree | commitdiff |
2018-08-03 |
Jan Beulich | x86: drop NoRex64 from {,v}pmov{s,z}x* |
tree | commitdiff |
2018-08-03 |
Jan Beulich | x86: drop "mem" operand type attribute |
tree | commitdiff |
2018-08-01 |
Alan Modra | csky regen |
tree | commitdiff |
2018-07-31 |
Nick Clifton | Correct previous update - new translation for the opcod... |
tree | commitdiff |
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