Restore ability to build zlib in a srcdir == builddir configuration.
[external/binutils.git] / opcodes /
2017-01-20 Nick CliftonUpdated Irish translation for the opcodes library.
2017-01-18 Szabolcs Nagy[ARM] Fix the decoding of indexed element VCMLA instruction
2017-01-13 Yao QiReturn -1 on memory error in print_insn_m68k
2017-01-13 Yao QiRemove magic numbers in m68k-dis.c:print_insn_arg
2017-01-12 Igor TsimbalistEnable Intel AVX512_VPOPCNTDQ instructions
2017-01-12 Yao QiReturn -1 on memory error in print_insn_msp430
2017-01-05 Nick CliftonPrevent an abort in the FRV disassembler if the target...
2017-01-04 Szabolcs Nagy[AArch64] Add separate feature flag for weaker release...
2017-01-03 Kito ChengAdd support for the Q extension to the RISCV ISA.
2017-01-03 Dilyan PalauzovAdd fall through comment.
2017-01-03 Nick CliftonAdd new Serbian translation for the opcodes library.
2017-01-02 Alan ModraRegen opcodes cgen files
2017-01-02 Alan ModraUpdate year range in copyright notice of all files.
2017-01-02 Alan ModraChangeLog rotation
2016-12-31 Alan ModraFix riscv breakage
2016-12-31 Dimitar DimitrovPRU Opcode Port
2016-12-29 Yao QiReturn 'int' rather than 'unsigned short' in avrdis_opcode
2016-12-28 Alan ModraCheck bfd support for bfd_mips_elf_get_abiflags in...
2016-12-23 Maciej W. RozyckiMIPS16: Add ASMACRO instruction support
2016-12-23 Maciej W. RozyckiMIPS16: Simplify extended operand handling
2016-12-23 Maciej W. RozyckiMIPS16: Reassign `0' and `4' operand codes
2016-12-23 Maciej W. RozyckiMIPS16: Handle non-extensible instructions correctly
2016-12-23 Maciej W. RozyckiMIPS16: Remove "extended" BREAK/SDBBP handling
2016-12-23 Maciej W. RozyckiMIPS16/GAS: Disallow EXTEND delay-slot scheduling
2016-12-23 Maciej W. Rozyckiopcodes: Use autoconf to check for `bfd_mips_elf_get_ab...
2016-12-23 Tristan GingoldBump version to 2.28.51
2016-12-23 Tristan GingoldRegenerate pot files.
2016-12-21 Alan ModraChangeLog formatting fixes
2016-12-21 Andrew WatermanAvoid creating symbol table entries for registers
2016-12-20 Maciej W. RozyckiMIPS16/opcodes: Respect ISA and ASE in disassembly
2016-12-20 Maciej W. RozyckiMIPS16: Switch to 32-bit opcode table interpretation
2016-12-20 Maciej W. RozyckiMIPS16/opcodes: Correct 64-bit macros' ISA membership
2016-12-20 Maciej W. RozyckiMIPS16/opcodes: Correct I64/SDRASP opcode's ISA membership
2016-12-20 Andrew WatermanCorrect assembler mnemonic for RISC-V aqrl AMOs
2016-12-20 Andrew WatermanFix disassembly of RISC-V CSR instructions under -Mno...
2016-12-20 Andrew WatermanAdd canonical JALR for RISC-V
2016-12-20 Andrew WatermanRe-work RISC-V gas flags: now we just support -mabi...
2016-12-20 Andrew WatermanFormatting changes for RISC-V
2016-12-20 Alan ModraAdd opcodes RISC-V dependencies
2016-12-19 Maciej W. RozyckiMIPS/opcodes: Only examine ELF file structures if SYMTA...
2016-12-19 Maciej W. RozyckiMIPS/opcodes: Only call `bfd_mips_elf_get_abiflags...
2016-12-16 Nick CliftonFix compile time warning building arm-dis.c
2016-12-14 Maciej W. RozyckiMIPS/opcodes: Also set disassembler's ASE flags from...
2016-12-14 Maciej W. RozyckiMIPS/opcodes: Reorder ELF file header flag handling...
2016-12-14 Maciej W. RozyckiMIPS16: Fix SP-relative SD instruction annotation
2016-12-14 Maciej W. RozyckiMIPS16/opcodes: Fix and clarify MIPS16e commentary
2016-12-13 Renlin Li[Binutils][AARCH64]Remove Cn register for coprocessor...
2016-12-12 Yao QiHandle memory error in print_insn_rx
2016-12-12 Yao QiHandle memory error in print_insn_rl78_common
2016-12-09 Maciej W. RozyckiMIPS16: Remove unused `>' operand code
2016-12-09 Maciej W. RozyckiMIPS16/opcodes: Use hexadecimal interpretation for...
2016-12-09 Maciej W. RozyckiMIPS16/opcodes: Reformat raw EXTEND and undecoded output
2016-12-08 Maciej W. RozyckiMIPS16/opcodes: Fix off-by-one indentation in `print_mi...
2016-12-08 Maciej W. RozyckiMIPS16/opcodes: Fix PC-relative operation delay-slot...
2016-12-08 Maciej W. RozyckiAArch64/opcodes: Correct another `index' global shadowi...
2016-12-08 Luis MachadoFix crash when disassembling invalid range on powerpc vle
2016-12-07 Maciej W. RozyckiMIPS/opcodes: Correct an `interaction' comment typo
2016-12-07 Maciej W. RozyckiMIPS16/opcodes: Update opcode table comment
2016-12-07 Maciej W. RozyckiMIPS/opcodes: Reformat `-M' disassembler option's help...
2016-12-05 Szabolcs Nagy[ARM] Add ARMv8.3 VCMLA and VCADD instructions
2016-12-05 Szabolcs Nagy[ARM] Add ARMv8.3 VJCVT instruction
2016-12-01 Nick CliftonFix abort in x86 disassembler.
2016-11-29 Claudiu Zissulescu[ARC] Add checking for LP_COUNT reg usage, improve...
2016-11-29 Claudiu Zissulescu[ARC] Fix disassembler option.
2016-11-28 Amit PawarX86: Ignore REX_B bit for 32-bit XOP instructions
2016-11-22 Ambrogino ModiglianiFix spelling mistakes in comments in configure scripts
2016-11-22 Jose E. Marchesigas,opcodes: fix hardware capabilities bumping in the...
2016-11-22 Claudiu Zissulescu[ARC] Fix printing 'b' mnemonics.
2016-11-18 Szabolcs Nagy[AArch64] Add ARMv8.3 FCMLA and FCADD instructions
2016-11-18 Szabolcs Nagy[AArch64] Add ARMv8.3 weaker release consistency load...
2016-11-18 Szabolcs Nagy[AArch64] Add ARMv8.3 javascript floating-point convers...
2016-11-18 Szabolcs Nagy[AArch64] Add ARMv8.3 combined pointer authentication...
2016-11-11 Szabolcs Nagy[AArch64] Add ARMv8.3 combined pointer authentication...
2016-11-11 Szabolcs Nagy[AArch64] Add ARMv8.3 PACGA instruction
2016-11-11 Szabolcs Nagy[AArch64] Add ARMv8.3 single source PAC instructions
2016-11-11 Szabolcs Nagy[AArch64] Add ARMv8.3 pointer authentication key registers
2016-11-11 Szabolcs Nagy[AArch64] Add ARMv8.3 instructions which are in the...
2016-11-11 Szabolcs Nagy[AArch64] Increase max_num_aliases in aarch64-gen
2016-11-09 H.J. LuX86: Remove the .s suffix from EVEX vpextrw
2016-11-09 H.J. LuUpdate opcodes/ChangeLog
2016-11-09 H.J. LuX86: Merge AVX512F vmovq
2016-11-08 H.J. LuX86: Remove the THREE_BYTE_0F7A entry
2016-11-07 H.J. LuX86: Properly handle bad FPU opcode
2016-11-04 Andrew Burgessarc/nps400: Validate address type operands correctly
2016-11-03 Graham Markallarc: Implement NPS-400 dcmac instruction
2016-11-03 Andrew Burgessarc: Change max instruction length to 64-bits
2016-11-03 Graham Markallarc: Swap highbyte and lowbyte in print_insn_arc
2016-11-03 Graham Markallarc: Replace ARC_SHORT macro with arc_opcode_len function
2016-11-03 Andrew Burgessarc/opcodes/nps400: Fix some instruction masks
2016-11-03 H.J. LuX86: Reuse opcode 0x80 decoder for opcode 0x82
2016-11-03 H.J. LuX86: Decode opcode 0x82 as opcode 0x80 in 32-bit mode
2016-11-03 H.J. LuX86: Rename REG_82 to REG_83
2016-11-02 Igor TsimbalistEnable Intel AVX512_4VNNIW instructions
2016-11-02 Igor TsimbalistEnable Intel AVX512_4FMAPS instructions
2016-11-01 Nick CliftonAdd support for RISC-V architecture.
2016-10-21 H.J. LuX86: Remove pcommit instruction
2016-10-20 H.J. LuCheck invalid mask registers
2016-10-18 H.J. LuCheck addr32flag instead of sizeflag for rip/eip
2016-10-18 H.J. LuRemove the remaining SSE5 support
2016-10-18 Maciej W. RozyckiAArch64/opcodes: Correct an `index' global shadowing...
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