[Linux] Optimize PID -> struct lwp_info lookup
[external/binutils.git] / opcodes /
2016-05-23 Claudiu Zissulescu[ARC] Update instruction type and delay slot info.
2016-05-23 Claudiu Zissulescu[ARC] Add XY registers, update neg instruction.
2016-05-23 Claudiu Zissulescu[ARC] Rename "class" named attributes.
2016-05-23 Trevor Saunderstic54x: rename typedef of struct symbol_
2016-05-19 Alan ModraCorrect "Fix powerpc subis range"
2016-05-19 Alan ModraFix powerpc subis range
2016-05-18 Maciej W. RozyckiMIPS/opcodes: Correct mixed MIPS16 and microMIPS disass...
2016-05-13 Peter BergnerAccept valid one byte signed and unsigned values for...
2016-05-11 Matthew FortuneAdd MIPS32 DSPr3 support.
2016-05-10 Alexander FominEnable Intel RDPID instruction.
2016-05-10 Thomas Preud'hommeUse getters/setters to access ARM branch type
2016-05-10 Thomas Preud'hommeAdd support for ARMv8-M security extensions instructions
2016-05-09 Jose E. Marchesiopcodes,gas: sparc: fix mnemonic of faligndatai
2016-05-09 Alan ModraRegenerate configure
2016-05-04 Claudiu Zissulescu[ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instr...
2016-05-03 Szabolcs NagyFix generation of AArhc64 instruction table.
2016-04-28 Nick CliftonAdd support to AArch64 disassembler for verifying instr...
2016-04-23 H.J. LuSkip if size of bfd_vma is smaller than address size
2016-04-20 Trevor Saundersupdate many old style function definitions
2016-04-19 Andrew Burgessopcodes/arc: Add yet more nps instructions
2016-04-19 Andrew Burgessopcodes/arc: Add more nps instructions
2016-04-15 H.J. LuRegenerate Makefile.in/aclocal.m4 automake 1.11.6
2016-04-14 Andrew Burgessarc/nps400 : New cmem instructions and associated reloc...
2016-04-14 Andrew Burgessopcodes/arc: Move instruction length logic to new function
2016-04-13 Nick CliftonFix disassembly of the V850's LD.BU instruction.
2016-04-12 Claudiu ZissulescuAdd support for .extCondCode, .extCoreRegister and...
2016-04-12 Claudiu ZissulescuUpdate ARC instruction data-base.
2016-04-12 Claudiu ZissulescuAdd support for .extInstruction pseudo-op.
2016-04-11 Maciej W. RozyckiMIPS/opcodes: Fix undecoded MIPS16 extended instruction...
2016-04-07 Andrew Burgessarc/nps400: Add new instructions
2016-04-07 Andrew Burgessgas/arc: Handle multiple arc_opcode chains for same...
2016-04-05 Andrew Burgessarc/nps400: Add additional instructions
2016-04-05 Claudiu Zissulescu[ARC] Fix support for double assist instructions.
2016-04-05 Jiong Wang[ARM] Add ARMv8.2 FP16 vmul/vmla/vmls (by scalar)
2016-03-31 Andrew Burgessopcodes: Fix date in ChangeLog entry
2016-03-31 Andrew Burgessopcodes/arc/nps: Fix some operand flags
2016-03-31 Trevor Saundersenable -Wwrite-strings for gas
2016-03-30 Andrew Burgessopcodes/arc: Comment and whitespace fixes in opcode...
2016-03-30 Claudiu Zissulescu[ARC] Cleanup AUX register names.
2016-03-29 Claudiu Zissulescu[ARC] Fix typo in extension instruction name.
2016-03-29 Claudiu Zissulescu[ARC] Add support for Quarkse opcodes.
2016-03-24 Jan KratochvilMore -Wstack-usage warnings: opcodes/aarch64-*
2016-03-24 Jose E. Marchesisparc: reorder wr instructions in sparc_opcodes to...
2016-03-22 Nick CliftonAdd -Wstack-usage to the gcc warning flags list, but...
2016-03-21 Andrew Burgessarc/nps400: Add first nps400 instructions
2016-03-21 Andrew Burgessarc/opcodes: Use flag operand class to handle multiple...
2016-03-21 Andrew Burgessarc: Add nps400 machine type, and assembler flag.
2016-03-21 Andrew Burgessarc/gas: default mach is arc700, initialised in md_begin
2016-03-21 Nick CliftonRemove use of alloca.
2016-03-18 Nick CliftonFix the disassembly of the AArch64's OOR instruction...
2016-03-16 Jiong Wang[ARM] Support ARMv8.2 FP16 simd instructions
2016-03-07 Trevor SaundersAdd const qualifiers at various places.
2016-03-02 Alan ModraRegenerate or1k opcodes file
2016-03-02 Alan ModraRegenerate rl78 opcodes file
2016-03-02 Alan ModraFix shift left warning at source
2016-03-01 Nick CliftonFix typo in print_insn_rl78_common function.
2016-02-24 Renlin Li[OPCODES][ARM][1/3]Add armv8.2 fp16 instruction dissemb...
2016-02-24 Renlin Li[OPCODES][ARM]Fix mask for a few coprocessor opcodes.
2016-02-24 Renlin Li[OPCODE][ARM]Correct disassembler for cdp/cdp2, mcr...
2016-02-16 H.J. LuAdd parentheses to prevent truncated addresses
2016-02-10 Claudiu ZissulescuAdd support for ARC instruction relaxation in the assem...
2016-02-04 Nick CliftonFix the encoding of the MSP430's RRUX instruction.
2016-02-02 Andrew Burgessopcodes/cgen: Rework calculation of shift when insertin...
2016-02-02 Andrew Burgessepiphany/disassembler: Improve alignment of output.
2016-02-01 Michael McConvilleFix undefined compilation behaviour shifting a value...
2016-01-25 Renlin Li[PATCH[ARM]Check mapping symbol while backward searchin...
2016-01-20 Matthew Wahab[AArch64] Reject invalid immediate operands to MSR UAO
2016-01-18 Maciej W. RozyckiMIPS: Remove remnants of 48-bit microMIPS instruction...
2016-01-17 Alan ModraRegen configure
2016-01-14 Nick CliftonFix display of RL78 MOVW instructions that use the...
2016-01-14 Matthew Wahab[AArch64] Fix missing architecture checks for ARMv8...
2016-01-12 Matthew Wahab[ARM] Support ARMv8.2 RAS extension.
2016-01-11 Peter BergnerDelete opcodes that have been removed from ISA 3.0.
2016-01-08 Andreas Schwabm68k: fix constraints of move.[bw] for ISA_B/C
2016-01-01 Alan ModraCopyright update for binutils
2016-01-01 Alan ModraNew 2016 binutils ChangeLog files
2016-01-01 Alan Modrabinutils ChangeLog rotation
2015-12-31 Andrew Burgessopcodes/arc: Support dmb instruction with no operands
2015-12-30 Alan ModraFix assorted ChangeLog errors
2015-12-24 Thomas Preud'hommeAdd assembler support for ARMv8-M Baseline
2015-12-24 Thomas Preud'hommeAdd assembler support for ARMv8-M Mainline
2015-12-22 Yoshinori SatoRXv2 support update
2015-12-15 Yoshinori SatoAdd support for RX V2 Instruction Set
2015-12-14 Matthew Wahab[AArch64][PATCH 14/14] Support FP16 Adv.SIMD Scalar...
2015-12-14 Matthew Wahab[AArch64][PATCH 13/14] Support FP16 Adv.SIMD Shift...
2015-12-14 Matthew Wahab[AArch64][PATCH 12/14] Support FP16 Adv.SIMD Scalar...
2015-12-14 Matthew Wahab[AArch64][PATCH 11/14] Add support for the 2H vector...
2015-12-14 Matthew Wahab[AArch64][PATCH 9/14] Support FP16 Adv.SIMD Modified...
2015-12-14 Matthew Wahab[AArch64][PATCH 8/14] Support FP16 Adv.SIMD Across...
2015-12-14 Matthew Wahab[AArch64][PATCH 7/14] Support FP16 Scalar Indexed Eleme...
2015-12-14 Matthew Wahab[AArch64][PATCH 6/14] Support FP16 Vector Indexed Eleme...
2015-12-14 Matthew Wahab[AArch64][PATCH 5/14] Support FP16 Scalar Two Register...
2015-12-14 Matthew Wahab[AArch64][PATCH 4/14] Support FP16 Vector Two Register...
2015-12-14 Matthew Wahab[AArch64][PATCH 3/14] Support ARMv8.2 FP16 Scalar Three...
2015-12-14 Matthew Wahab[AArch64][PATCH 2/14] Support ARMv8.2 FP16 Vector Three...
2015-12-14 Matthew Wahab[AArch64][PATCH 1/14] Support ARMv8.2 FP16 Adv.SIMD...
2015-12-14 Matthew Wahab[AArch64] Fix errors rebasing the ARMv8.2 AT and system...
2015-12-12 Alan ModraEnable 2 operand form of powerpc mfcr with -many
2015-12-11 Matthew Wahab[AArch64][Patch 5/5] Add instruction PSB CSYNC
2015-12-11 Matthew Wahab[AArch64][Patch 4/5] Support HINT aliases taking operands.
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