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Fix spelling in comments in C source files (gold)
[external/binutils.git]
/
opcodes
/
2016-11-22
Ambrogino Modigliani
Fix spelling mistakes in comments in configure scripts
tree
|
commitdiff
2016-11-22
Jose E. Marchesi
gas,opcodes: fix hardware capabilities bumping in the...
tree
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commitdiff
2016-11-22
Claudiu Zissulescu
[ARC] Fix printing 'b' mnemonics.
tree
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commitdiff
2016-11-18
Szabolcs Nagy
[AArch64] Add ARMv8.3 FCMLA and FCADD instructions
tree
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commitdiff
2016-11-18
Szabolcs Nagy
[AArch64] Add ARMv8.3 weaker release consistency load...
tree
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commitdiff
2016-11-18
Szabolcs Nagy
[AArch64] Add ARMv8.3 javascript floating-point convers...
tree
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commitdiff
2016-11-18
Szabolcs Nagy
[AArch64] Add ARMv8.3 combined pointer authentication...
tree
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commitdiff
2016-11-11
Szabolcs Nagy
[AArch64] Add ARMv8.3 combined pointer authentication...
tree
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commitdiff
2016-11-11
Szabolcs Nagy
[AArch64] Add ARMv8.3 PACGA instruction
tree
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commitdiff
2016-11-11
Szabolcs Nagy
[AArch64] Add ARMv8.3 single source PAC instructions
tree
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commitdiff
2016-11-11
Szabolcs Nagy
[AArch64] Add ARMv8.3 pointer authentication key registers
tree
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commitdiff
2016-11-11
Szabolcs Nagy
[AArch64] Add ARMv8.3 instructions which are in the...
tree
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commitdiff
2016-11-11
Szabolcs Nagy
[AArch64] Increase max_num_aliases in aarch64-gen
tree
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commitdiff
2016-11-09
H.J. Lu
X86: Remove the .s suffix from EVEX vpextrw
tree
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commitdiff
2016-11-09
H.J. Lu
Update opcodes/ChangeLog
tree
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commitdiff
2016-11-09
H.J. Lu
X86: Merge AVX512F vmovq
tree
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commitdiff
2016-11-08
H.J. Lu
X86: Remove the THREE_BYTE_0F7A entry
tree
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commitdiff
2016-11-07
H.J. Lu
X86: Properly handle bad FPU opcode
tree
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commitdiff
2016-11-04
Andrew Burgess
arc/nps400: Validate address type operands correctly
tree
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commitdiff
2016-11-03
Graham Markall
arc: Implement NPS-400 dcmac instruction
tree
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commitdiff
2016-11-03
Andrew Burgess
arc: Change max instruction length to 64-bits
tree
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commitdiff
2016-11-03
Graham Markall
arc: Swap highbyte and lowbyte in print_insn_arc
tree
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commitdiff
2016-11-03
Graham Markall
arc: Replace ARC_SHORT macro with arc_opcode_len function
tree
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commitdiff
2016-11-03
Andrew Burgess
arc/opcodes/nps400: Fix some instruction masks
tree
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commitdiff
2016-11-03
H.J. Lu
X86: Reuse opcode 0x80 decoder for opcode 0x82
tree
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commitdiff
2016-11-03
H.J. Lu
X86: Decode opcode 0x82 as opcode 0x80 in 32-bit mode
tree
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commitdiff
2016-11-03
H.J. Lu
X86: Rename REG_82 to REG_83
tree
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commitdiff
2016-11-02
Igor Tsimbalist
Enable Intel AVX512_4VNNIW instructions
tree
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commitdiff
2016-11-02
Igor Tsimbalist
Enable Intel AVX512_4FMAPS instructions
tree
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commitdiff
2016-11-01
Nick Clifton
Add support for RISC-V architecture.
tree
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commitdiff
2016-10-21
H.J. Lu
X86: Remove pcommit instruction
tree
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commitdiff
2016-10-20
H.J. Lu
Check invalid mask registers
tree
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commitdiff
2016-10-18
H.J. Lu
Check addr32flag instead of sizeflag for rip/eip
tree
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commitdiff
2016-10-18
H.J. Lu
Remove the remaining SSE5 support
tree
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commitdiff
2016-10-18
Maciej W. Rozycki
AArch64/opcodes: Correct an `index' global shadowing...
tree
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commitdiff
2016-10-17
Cupertino Miranda
Removed pseudo invalid instructions opcodes.
tree
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commitdiff
2016-10-14
Claudiu Zissulescu
[ARC] Disassembler: fix LIMM detection for short instru...
tree
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commitdiff
2016-10-11
Jiong Wang
[AArch64] PR target/20666, fix wrong encoding of new...
tree
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commitdiff
2016-10-07
Jiong Wang
[AArch64] PR target/20667, fix disassembler for the...
tree
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commitdiff
2016-10-07
Alan Modra
bfd_merge_private_bfd_data tidy
tree
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commitdiff
2016-10-05
Alan Modra
-Wimplicit-fallthrough warning fixes
tree
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commitdiff
2016-10-05
Alan Modra
-Wimplicit-fallthrough error fixes
tree
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commitdiff
2016-10-05
Alan Modra
Don't use boolean OR in arithmetic expressions
tree
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commitdiff
2016-09-30
H.J. Lu
Don't assign alt twice
tree
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commitdiff
2016-09-30
Jiong Wang
[AArch64] PR target/20553, fix opcode mask for SIMD...
tree
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commitdiff
2016-09-29
Alan Modra
Disallow 3-operand cmp[l][i] for ppc64
tree
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commitdiff
2016-09-26
Vlad Zakharov
When building target binaries, ensure that the warning...
tree
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commitdiff
2016-09-26
Claudiu Zissulescu
[ARC] ISA alignment.
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64] Print spaces after commas in addresses
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64] Use "must" rather than "should" in error...
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64] Add SVE condition codes
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 31/32] Add SVE instructions
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 30/32] Add SVE instruction classes
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 29/32] Add new SVE core & FP register...
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 28/32] Add SVE FP immediate operands
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 27/32] Add SVE integer immediate operands
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 26/32] Add SVE MUL VL addressing modes
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 25/32] Add support for SVE addressing...
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALED
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 23/32] Add SVE pattern and prfop operands
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 22/32] Add qualifiers for merging and...
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 21/32] Add Zn and Pn registers
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 20/32] Add support for tied operands
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 19/32] Refactor address-printing code
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 18/32] Tidy definition of aarch64-opc...
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 17/32] Add a prefix parameter to print_re...
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 16/32] Use specific insert/extract method...
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 15/32] Add {insert,extract}_all_fields...
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 14/32] Make aarch64_logical_immediate_p...
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 13/32] Add an F_STRICT flag
tree
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commitdiff
2016-09-21
Richard Sandiford
[AArch64][SVE 02/32] Avoid hard-coded limit in indented...
tree
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commitdiff
2016-09-16
Claudiu Zissulescu
[ARC] Disassemble correctly extension instructions.
tree
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commitdiff
2016-09-15
Peter Bergner
Modify POWER9 support to match final ISA 3.0 documentation.
tree
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commitdiff
2016-09-14
Anton Kolesov
Stop the ARC disassembler from seg-faulting if initiali...
tree
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commitdiff
2016-09-12
Andreas Krebbel
S/390: Add alternate processor names.
tree
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commitdiff
2016-09-12
Patrick Steuer
S/390: Fix kmctr instruction type.
tree
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commitdiff
2016-09-07
H.J. Lu
X86: Allow additional ISAs for IAMCU in assembler
tree
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commitdiff
2016-08-30
Cupertino Miranda
Fixed issue with NULL pointer access on header var.
tree
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commitdiff
2016-08-26
Jose E. Marchesi
opcodes, gas: fix mnemonic of sparc camellia_fl
tree
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commitdiff
2016-08-26
Thomas Preud'homme
Add missing ARMv8-M special registers
tree
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commitdiff
2016-08-24
H.J. Lu
X86: Add ptwrite instruction
tree
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commitdiff
2016-08-24
Anton Kolesov
[ARC] C++ compatibility for arc-dis.h
tree
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commitdiff
2016-08-23
Richard Sandiford
[AArch64] Add V8_2_INSN macro
tree
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commitdiff
2016-08-23
Richard Sandiford
[AArch64] Make more use of CORE/FP/SIMD_INSN
tree
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commitdiff
2016-08-23
Richard Sandiford
[AArch64] Add OP parameter to aarch64-tbl.h macros
tree
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commitdiff
2016-08-01
Andrew Jenner
Fix some PowerPC VLE BFD issues and add some...
tree
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commitdiff
2016-07-27
Maciej W. Rozycki
MIPS/GAS: Implement microMIPS branch/jump compaction
tree
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commitdiff
2016-07-27
Graham Markall
Begin implementing ARC NPS-400 Accelerator instructions
tree
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commitdiff
2016-07-21
H.J. Lu
Set BFD_VERSION to 2.27.51
tree
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commitdiff
2016-07-20
Claudiu Zissulescu
Add support to the ARC disassembler for selecting instr...
tree
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commitdiff
2016-07-13
Maciej W. Rozycki
MIPS/opcodes: Address issues with NAL disassembly
tree
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commitdiff
2016-07-13
Jose E. Marchesi
opcodes,gas: support for the ldtxa SPARC instructions.
tree
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commitdiff
2016-07-08
jamesbowman
FT32: adjust disassembly opcode match fields
tree
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commitdiff
2016-07-01
Jan Beulich
x86: allow suffix-less movzw and 64-bit movzb
tree
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commitdiff
2016-07-01
Jan Beulich
x86: remove stray instruction attributes
tree
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commitdiff
2016-07-01
Jan Beulich
x86/Intel: fix operand checking for MOVSD
tree
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commitdiff
2016-06-30
Yao Qi
Fix typo in comment
tree
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commitdiff
2016-06-28
Richard Sandiford
[AArch64] Make register indices be full 64-bit values
tree
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commitdiff
2016-06-25
Trevor Saunders
remove a few sentinals
tree
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commitdiff
2016-06-23
Graham Markall
[ARC] Misc minor edits/fixes
tree
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commitdiff
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