Add blurb about linker changes for Cygwin and Mingw targets.
[external/binutils.git] / opcodes /
2018-04-04 Nick CliftonUpdate Spanish translations for ld/ opcodes/ and gold...
2018-03-28 Jan Beulichx86: drop VecESize
2018-03-28 Jan Beulichx86: convert broadcast insn attribute to boolean
2018-03-28 Jan Beulichx86: fold to-scalar-int conversion insns
2018-03-28 Jan Beulichx86: don't show suffixes for to-scalar-int conversion...
2018-03-28 Nick CliftonEnhance the AARCH64 assembler to support LDFF1xx instru...
2018-03-22 Jan Beulichx86: drop pointless VecESize
2018-03-22 Jan Beulichx86: drop remaining redundant DispN
2018-03-22 Jan Beulichx86: fix swapped operand handling for BNDMOV
2018-03-22 Jan Beulichx86/Intel: fix fallout from earlier template folding
2018-03-22 Jan Beulichx86: fold a few XOP templates
2018-03-14 Jim WilsonRISC-V: Add .insn support.
2018-03-13 Nick CliftonUpdated Russian and Brazilian Portuguese translations.
2018-03-08 H.J. Lux86-64: Also optimize "clr reg64"
2018-03-08 H.J. Lux86: Remove support for old (<= 2.8.1) versions of gcc
2018-03-08 Jan Beulichx86: fold several AVX512VL templates
2018-03-08 Jan Beulichx86: fold certain AVX512 rotate and shift templates
2018-03-08 Jan Beulichx86: fold VEX-encoded GFNI templates
2018-03-08 Jan Beulichx86: fold a few AVX512F templates
2018-03-08 Jan Beulichx86: fold LWP templates
2018-03-08 Jan Beulichx86: fold FMA and FMA4 templates
2018-03-08 Jan Beulichx86: drop {X,Y,Z}MMWORD_MNEM_SUFFIX
2018-03-08 Jan Beulichx86: drop bogus NoAVX
2018-03-08 Jan Beulichx86: avoid SSE check for LDMXCSR/STMXCSR
2018-03-08 Jan Beulichx86: drop FloatD
2018-03-08 Jan Beulichx86/Intel: correct disassembly of fsub*/fdiv*
2018-03-08 Jan Beulichx86: bogus VMOVD with 64-bit operands should only allow...
2018-03-08 Jan Beulichx86: fold AVX vcvtpd2ps memory forms
2018-03-07 Alan ModraXCOFF disassembler
2018-03-03 Alan Modraopcodes error messages
2018-03-01 H.J. Lux86: Encode AVX256/AVX512 vpsub[bwdq] with VEX128/EVEX128
2018-02-28 Alan ModraAdd missing translations to ALL_LINGUAS
2018-02-27 Thomas Preud'homme[ARM] Remove ARM_FEATURE_COPY macro
2018-02-27 H.J. Lux86: Add -O[2|s] assembler command-line options
2018-02-26 Alan Modracrx string overflow warning
2018-02-22 Jim WilsonRISC-V: Make disassebler work for --enable-targets...
2018-02-22 H.J. Lux86: Add {rex} pseudo prefix
2018-02-20 Maciej W. RozyckiMIPS16/opcodes: Free up `M' operand code
2018-02-19 Thomas Preud'homme[ARM] Fix bxns mask
2018-02-13 Nick CliftonFix compile time warning messages from gcc version...
2018-02-13 Maciej W. RozyckiWebAssembly: Correct an `index' global shadowing error...
2018-02-12 Henry WongMIPS: Fix encoding for MIPSr6 sigrie instruction.
2018-02-05 Nick CliftonUpdated Brazillian portuguese and Russian translation
2018-01-23 Igor TsimbalistEnable Intel PCONFIG instruction.
2018-01-23 Igor TsimbalistEnable Intel WBNOINVD instruction.
2018-01-17 Jim WilsonRISC-V: Fix bug in prior addi/c.nop patch.
2018-01-17 Igor TsimbalistReplace CET bit with IBT and SHSTK bits.
2018-01-16 Nick CliftonUpdate translations for various binutils components.
2018-01-15 Jim WilsonRISC-V: Add support for addi that compresses to c.nop.
2018-01-15 Nick CliftonUpdate Ukranian translations for bfd, binutils, gas...
2018-01-13 Nick CliftonUpdate pot files
2018-01-13 Nick CliftonBump version number to 2.30.51
2018-01-13 Nick CliftonAdd note about 2.30 branch creation to changelogs
2018-01-11 Igor TsimbalistRemove VL variants for 4FMAPS and 4VNNIW insns.
2018-01-10 Jan Beulichx86: fix Disp8 handling for scalar AVX512_4FMAPS insns
2018-01-10 Jan Beulichx86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
2018-01-10 Jim WilsonRISC-V: Disassemble x0 based addresses as 0.
2018-01-09 James Greenhalgh[Arm] Add CSDB instruction
2018-01-09 James GreenhalghAdd support for the AArch64's CSDB instruction.
2018-01-08 H.J. Lux86: Properly encode vmovd with 64-bit memeory
2018-01-06 Jim WilsonRISC-V: Print symbol address for jalr w/ zero offset.
2018-01-03 Alan ModraUpdate year range in copyright notice of binutils files
2018-01-03 Alan ModraChangeLog rotation
2018-01-02 Jan Beulichx86: partial revert of 10c17abdd0
2017-12-20 Jim WilsonRISC-V: Add compressed instruction hints, and a few...
2017-12-19 Tamar ChristinaCorrect disassembly of dot product instructions.
2017-12-19 Tamar ChristinaAdd support for V_4B so we can properly reject it.
2017-12-18 Jan Beulichx86: fold certain AVX and AVX2 templates
2017-12-18 Jan Beulichx86: fold RegXMM/RegYMM/RegZMM into RegSIMD
2017-12-18 Jan Beulichx86: drop FloatReg and FloatAcc
2017-12-18 Jan Beulichx86: replace Reg8, Reg16, Reg32, and Reg64
2017-12-15 Dimitar DimitrovFix disassembly for PowerPC
2017-12-15 Jan Beulichx86: drop stray CheckRegSize uses
2017-12-13 Jim WilsonAdd missing RISC-V fsrmi and fsflagsi instructions.
2017-12-13 Dimitar DimitrovThis patch enables disassembler_needs_relocs for PRU...
2017-12-11 Renlin Li[Binutils][Objdump]Check symbol section information...
2017-12-03 Alan ModraFix "FAIL: VLE relocations 3"
2017-12-01 Peter BergnerUse consistent types for holding instructions, instruct...
2017-11-30 Jan Beulichx86: derive DispN from BaseIndex
2017-11-30 Jan Beulichx86: drop Vec_Disp8
2017-11-29 Stefan StroeSupport --localedir, --datarootdir and --datadir
2017-11-27 Nick CliftonUpdate the simplified Chinese translation of the messag...
2017-11-24 Jan Beulichx86: don't omit disambiguating suffixes from "fi*"
2017-11-23 Igor TsimbalistAdd Disp8MemShift for AVX512 VAES instructions.
2017-11-23 Jan Beulichx86: fix AVX-512 16-bit addressing
2017-11-23 Jan Beulichx86: correct UDn
2017-11-22 Igor TsimbalistRemove Vec_Disp8 field for vgf2p8mulb for AVX flavor.
2017-11-22 Igor TsimbalistUpdate ChangeLog
2017-11-22 Igor TsimbalistRemove Vec_Disp8 from vpcompressb and vpexpandb.
2017-11-22 claziss[ARC] Fix handling of ARCv2 H-register class.
2017-11-21 claziss[ARC] Improve printing of pc-relative instructions.
2017-11-16 Tamar ChristinaAdd new AArch64 FP16 FM{A|S} instructions.
2017-11-16 Tamar ChristinaCorrect AArch64 crypto dependencies.
2017-11-16 Tamar ChristinaAdd assembler and disassembler support for the new...
2017-11-16 Jan Beulichx86: ignore high register select bit(s) in 32- and...
2017-11-15 Jan Beulichx86: use correct register names
2017-11-15 Jan Beulichx86: drop VEXI4_Fixup()
2017-11-15 Jan Beulichx86-64: don't allow use of %axl as accumulator
2017-11-14 Jan Beulichx86: add disassembler support for XOP VPCOM* pseudo-ops
2017-11-14 Jan Beulichx86: add support for AVX-512 VPCMP*{B,W} pseudo-ops
next