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Release 2.33.1
[external/binutils.git] / opcodes / riscv-opc.c
2019-07-30 Jim WilsonRISC-V: Fix minor issues with FP csr instructions. blob | commitdiff
2019-07-05 Jim WilsonKito's 5-part patch set to improve .insn support. blob | commitdiff | diff to current
2019-02-08 Jim WilsonRISC-V: Compress 3-operand beq/bne against x0. blob | commitdiff | diff to current
2019-01-01 Alan ModraUpdate year range in copyright notice of binutils files blob | commitdiff | diff to current
2018-12-07 Jim WilsonRISC-V: Fix 4-arg add parsing. blob | commitdiff | diff to current
2018-11-29 Jim WilsonRISC-V: Add missing c.unimp instruction. blob | commitdiff | diff to current
2018-11-27 Jim WilsonRISC-V: Add .insn CA support. blob | commitdiff | diff to current
2018-10-02 Palmer DabbeltRISC-V: Add fence.tso instruction blob | commitdiff | diff to current
2018-09-17 Jim WilsonRISC-V: bge[u] should get higher priority than ble[u]. blob | commitdiff | diff to current
2018-08-31 Jim WilsonRISC-V: Correct the requirement of compressed floating... blob | commitdiff | diff to current
2018-08-30 Jim WilsonRISC-V: Allow instruction require more than one extension blob | commitdiff | diff to current
2018-07-30 Jim WilsonRISC-V: Set insn info fields correctly when disassembling. blob | commitdiff | diff to current
2018-06-20 Sebastian HuberRISC-V: Accept constant operands in la and lla blob | commitdiff | diff to current
2018-05-08 Jim WilsonRISC-V: Add missing hint instructions from RV128I. blob | commitdiff | diff to current
2018-03-14 Jim WilsonRISC-V: Add .insn support. blob | commitdiff | diff to current
2018-01-17 Jim WilsonRISC-V: Fix bug in prior addi/c.nop patch. blob | commitdiff | diff to current
2018-01-15 Jim WilsonRISC-V: Add support for addi that compresses to c.nop. blob | commitdiff | diff to current
2018-01-03 Alan ModraUpdate year range in copyright notice of binutils files blob | commitdiff | diff to current
2017-12-20 Jim WilsonRISC-V: Add compressed instruction hints, and a few... blob | commitdiff | diff to current
2017-12-13 Jim WilsonAdd missing RISC-V fsrmi and fsflagsi instructions. blob | commitdiff | diff to current
2017-10-24 Andrew WatermanRISC-V: Fix disassembly of c.addi4spn, c.addi16sp,... blob | commitdiff | diff to current
2017-09-27 Nick CliftonAdd support for the new names of the RISC-V fmv.x.s... blob | commitdiff | diff to current
2017-08-22 Palmer DabbeltRISC-V: Mark "c.nop" as an alias blob | commitdiff | diff to current
2017-06-23 Andrew WatermanRISC-V: Fix SLTI disassembly blob | commitdiff | diff to current
2017-05-02 Michael ClarkRISC-V: Change CALL macro to use ra as the temporary... blob | commitdiff | diff to current
2017-03-15 Kito ChengRISC-V: Fix assembler for c.li, c.andi and c.addiw blob | commitdiff | diff to current
2017-03-15 Kito ChengRISC-V: Fix assembler for c.addi, rd can be x0 blob | commitdiff | diff to current
2017-03-14 Andrew WatermanRISC-V: Fix [dis]assembly of srai/srli blob | commitdiff | diff to current
2017-02-15 Andrew WatermanAdd SFENCE.VMA instruction blob | commitdiff | diff to current
2017-01-03 Kito ChengAdd support for the Q extension to the RISCV ISA. blob | commitdiff | diff to current
2017-01-02 Alan ModraUpdate year range in copyright notice of all files. blob | commitdiff | diff to current
2016-12-21 Andrew WatermanAvoid creating symbol table entries for registers blob | commitdiff | diff to current
2016-12-20 Andrew WatermanCorrect assembler mnemonic for RISC-V aqrl AMOs blob | commitdiff | diff to current
2016-12-20 Andrew WatermanFix disassembly of RISC-V CSR instructions under -Mno... blob | commitdiff | diff to current
2016-12-20 Andrew WatermanAdd canonical JALR for RISC-V blob | commitdiff | diff to current
2016-12-20 Andrew WatermanFormatting changes for RISC-V blob | commitdiff | diff to current
2016-11-01 Nick CliftonAdd support for RISC-V architecture. blob | commitdiff | diff to current
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