x86: fold FMA and FMA4 templates
[external/binutils.git] / opcodes / i386-tbl.h
2018-03-08 Jan Beulichx86: fold FMA and FMA4 templates
2018-03-08 Jan Beulichx86: drop {X,Y,Z}MMWORD_MNEM_SUFFIX
2018-03-08 Jan Beulichx86: drop bogus NoAVX
2018-03-08 Jan Beulichx86: avoid SSE check for LDMXCSR/STMXCSR
2018-03-08 Jan Beulichx86: drop FloatD
2018-03-08 Jan Beulichx86: bogus VMOVD with 64-bit operands should only allow...
2018-03-08 Jan Beulichx86: fold AVX vcvtpd2ps memory forms
2018-03-01 H.J. Lux86: Encode AVX256/AVX512 vpsub[bwdq] with VEX128/EVEX128
2018-02-27 H.J. Lux86: Add -O[2|s] assembler command-line options
2018-02-22 H.J. Lux86: Add {rex} pseudo prefix
2018-01-23 Igor TsimbalistEnable Intel PCONFIG instruction.
2018-01-23 Igor TsimbalistEnable Intel WBNOINVD instruction.
2018-01-17 Igor TsimbalistReplace CET bit with IBT and SHSTK bits.
2018-01-11 Igor TsimbalistRemove VL variants for 4FMAPS and 4VNNIW insns.
2018-01-10 Jan Beulichx86: fix Disp8 handling for scalar AVX512_4FMAPS insns
2018-01-10 Jan Beulichx86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
2018-01-08 H.J. Lux86: Properly encode vmovd with 64-bit memeory
2018-01-03 Alan ModraUpdate year range in copyright notice of binutils files
2017-12-18 Jan Beulichx86: fold certain AVX and AVX2 templates
2017-12-18 Jan Beulichx86: fold RegXMM/RegYMM/RegZMM into RegSIMD
2017-12-18 Jan Beulichx86: drop FloatReg and FloatAcc
2017-12-18 Jan Beulichx86: replace Reg8, Reg16, Reg32, and Reg64
2017-12-15 Jan Beulichx86: drop stray CheckRegSize uses
2017-11-30 Jan Beulichx86: derive DispN from BaseIndex
2017-11-30 Jan Beulichx86: drop Vec_Disp8
2017-11-23 Igor TsimbalistAdd Disp8MemShift for AVX512 VAES instructions.
2017-11-23 Jan Beulichx86: correct UDn
2017-11-22 Igor TsimbalistRemove Vec_Disp8 field for vgf2p8mulb for AVX flavor.
2017-11-22 Igor TsimbalistRemove Vec_Disp8 from vpcompressb and vpexpandb.
2017-11-15 Jan Beulichx86-64: don't allow use of %axl as accumulator
2017-11-14 Jan Beulichx86: add support for AVX-512 VPCMP*{B,W} pseudo-ops
2017-11-14 Jan Beulichx86: string insns don't allow displacements
2017-11-13 Jan Beulichx86: {f,}xsave64 / {f,}xrstor64 / xsaveopt64 should...
2017-10-23 Igor TsimbalistFix the master due to bad regenerated files
2017-10-23 Igor TsimbalistEnable Intel VAES instructions.
2017-10-23 Igor TsimbalistEnable Intel GFNI instructions.
2017-10-23 Igor TsimbalistEnable Intel AVX512_VBMI2 instructions.
2017-06-21 H.J. Lux86: CET v2.0: Update incssp and setssbsy
2017-06-21 H.J. Lux86: CET v2.0: Rename savessp to saveprevssp
2017-05-22 H.J. Lux86: Add NOTRACK prefix support
2017-03-09 H.J. LuX86: Add pseudo prefixes to control encoding
2017-03-09 H.J. LuUse CpuCET on rdsspq
2017-03-06 H.J. LuAdd support for Intel CET instructions
2017-02-28 Jan Beulichx86: fix handling of 64-bit operand size VPCMPESTR...
2017-01-12 Igor TsimbalistEnable Intel AVX512_VPOPCNTDQ instructions
2017-01-02 Alan ModraUpdate year range in copyright notice of all files.
2016-11-09 H.J. LuX86: Remove the .s suffix from EVEX vpextrw
2016-11-09 H.J. LuX86: Merge AVX512F vmovq
2016-11-02 Igor TsimbalistEnable Intel AVX512_4VNNIW instructions
2016-11-02 Igor TsimbalistEnable Intel AVX512_4FMAPS instructions
2016-10-21 H.J. LuX86: Remove pcommit instruction
2016-08-24 H.J. LuX86: Add ptwrite instruction
2016-07-01 Jan Beulichx86: allow suffix-less movzw and 64-bit movzb
2016-07-01 Jan Beulichx86: remove stray instruction attributes
2016-07-01 Jan Beulichx86/Intel: fix operand checking for MOVSD
2016-06-03 H.J. LuHandle indirect branches for AMD64 and Intel64
2016-05-27 H.J. LuUpdate x86 CPU_XXX_FLAGS handling
2016-05-27 H.J. LuReplace CpuAMD64/CpuIntel64 with AMD64/Intel64
2016-05-27 H.J. LuCorrect CpuMax in i386-opc.h
2016-05-10 Alexander FominEnable Intel RDPID instruction.
2016-01-01 Alan ModraCopyright update for binutils
2015-12-09 H.J. LuImplement Intel OSPKE instructions
2015-06-30 Amit PawarAdd support for monitorx/mwaitx instructions
2015-06-01 Jan Beulichx86/Intel: fix i386_optab[] for vcvt{,u}si2s{d,s}
2015-06-01 Jan Beulichx86/Intel: accept mandated operand order for vcvt{...
2015-05-18 H.J. LuRemove Disp32 from AMD64 direct call/jmp
2015-05-15 H.J. LuSupport AMD64/Intel ISAs in assembler/disassembler
2015-05-11 H.J. LuRemove Disp16|Disp32 from 64-bit direct branches
2015-05-11 H.J. LuAdd Intel MCU support to opcodes
2015-03-17 Ganesh Gopalasubra... Add znver1 processor
2015-01-01 Alan ModraChangeLog rotatation and copyright year update
2014-11-17 Ilya TocarAdd AVX512VBMI instructions
2014-11-17 Ilya TocarAdd AVX512IFMA instructions
2014-11-17 Ilya TocarAdd pcommit instruction
2014-11-17 Ilya TocarAdd clwb instruction
2014-07-22 Ilya TocarAdd AVX512DQ instructions and their AVX512VL variants.
2014-07-22 Ilya TocarAdd support for AVX512BW instructions and their AVX512V...
2014-07-22 Ilya TocarAdd support for AVX512VL versions of AVX512CD instructions.
2014-07-22 Ilya TocarAdd support for AVX512VL. Add AVX512VL versions of...
2014-04-04 Ilya TocarAdd support for Intel SGX instructions
2014-03-20 Ilya TocarFix memory size for gather/scatter instructions
2014-03-05 Alan ModraUpdate copyright years
2014-02-25 Ilya TocarRemove bogus vcvtps2ph variant.
2014-02-21 Ilya TocarAdd support for CPUID PREFETCHWT1
2014-02-20 Ilya TocarChange cpu for vptestnmd and vptestnmq instructions.
2014-02-19 H.J. LuDon't output trailing space
2014-02-12 Ilya TocarAdd clflushopt, xsaves, xsavec, xrstors
2013-10-12 H.J. LuOnly allow 32-bit/64-bit registers for bndcl/bndcu...
2013-10-08 Jan Beulichopcodes/
2013-09-30 H.J. LuAdd Size64 to movq/vmovq with Reg64 operand
2013-07-26 H.J. LuAdd Intel AVX-512 support
2013-07-25 H.J. LuSupport Intel SHA
2013-07-24 H.J. LuSupport Intel MPX
2013-07-08 H.J. LuReplace Xmmword with Qword on cvttps2pi
2013-04-08 Jan Beulichgas/testsuite/
2013-03-02 H.J. LuAdd RegRex64 to riz
2013-02-19 H.J. LuImplement Intel SMAP instructions
2013-01-16 H.J. LuAdd OPERAND_TYPE_IMM32_64
2012-11-20 H.J. LuFix opcode for 64-bit jecxz
2012-09-20 H.J. LuReplace CpuSSE3 with CpuCX16 for cmpxchg16b
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