[BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension
[external/binutils.git] / opcodes / i386-tbl.h
2018-11-06 Jan Beulichx86: adjust {,E}VEX.W handling for PEXTR* / PINSR*
2018-11-06 Jan Beulichx86: adjust {,E}VEX.W handling outside of 64-bit mode
2018-11-06 Jan Beulichx86: fix various non-LIG templates
2018-11-06 Jan Beulichx86: allow {store} to select alternative {,}PEXTRW...
2018-11-06 Jan Beulichx86: add more VexWIG
2018-11-06 Jan Beulichx86: XOP VPHADD* / VPHSUB* are VEX.W0
2018-10-10 Jan Beulichx86: fold Size{16,32,64} template attributes
2018-10-05 H.J. Lux86: Add Intel ENCLV to assembler and disassembler
2018-09-17 H.J. Lux86: Set EVex=2 on EVEX.128 only vmovd and vmovq
2018-09-17 H.J. Lux86: Set Vex=1 on VEX.128 only vmovd and vmovq
2018-09-16 H.J. Lux86: Set VexW=3 on AVX vrsqrtss
2018-09-15 H.J. Lux86: Set Vex=1 on VEX.128 only vmovq
2018-09-14 H.J. Lux86: Support VEX/EVEX WIG encoding
2018-09-14 Jan Beulichx86: fold CRC32 templates
2018-09-13 H.J. Lux86: Remove VexW=1 from WIG VEX movq and vmovq
2018-09-13 H.J. Lui386: Update VexW field for VEX instructions
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from a few further insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512_4* insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512DQ insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512BW insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512VL insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512ER insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512F insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SHA insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from XOP and SSE4a insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX2 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from GNFI insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from PCLMUL/VPCLMUL insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AES/VAES insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE4.2 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE4.1 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSSE3 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE3 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE2 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE insns
2018-09-13 Jan Beulichx86: drop unnecessary {,No}Rex64
2018-09-13 Jan Beulichx86: also allow D on 3-operand insns
2018-09-13 Jan Beulichx86: use D attribute also for SIMD templates
2018-08-11 H.J. Lux86: Add CpuCMOV and CpuFXSR
2018-08-06 Jan Beulichx86: fold RegEip/RegRip and RegEiz/RegRiz
2018-08-03 Jan Beulichx86: drop NoRex64 from {,v}pmov{s,z}x*
2018-08-03 Jan Beulichx86: drop "mem" operand type attribute
2018-07-31 Jan Beulichx86: also optimize KXOR{D,Q} and KANDN{D,Q}
2018-07-31 Jan Beulichx86: fold various AVX512 templates with so far differin...
2018-07-31 Jan Beulichx86/Intel: correct permitted operand sizes for AVX512...
2018-07-31 Jan Beulichx86: drop CpuVREX
2018-07-25 H.J. Lux86: Expand Broadcast to 3 bits
2018-07-24 Jan Beulichx86-64: correct AVX512F vcvtsi2s{d,s} handling
2018-07-19 Jan Beulichx86: fold narrowing VCVT* templates
2018-07-19 Jan Beulichx86: fold VFPCLASSP{D,S} templates
2018-07-19 Jan Beulichx86: fold various AVX512* templates
2018-07-19 Jan Beulichx86: fold various AVX512DQ templates
2018-07-19 Jan Beulichx86: fold various AVX512BW templates
2018-07-19 Jan Beulichx86: fold various AVX512CD templates
2018-07-19 Jan Beulichx86: fold various AVX512VL templates into their AVX512F...
2018-07-18 H.J. Lux86: Split vcvtps2{,u}qq and vcvttps2{,u}qq
2018-07-11 Jan Beulichx86: adjust monitor/mwait templates
2018-07-11 Jan Beulichx86/Intel: accept memory operand size specifiers for...
2018-06-01 Jan Beulichx86: fold MOV to/from segment register templates
2018-06-01 Jan Beulichx86: don't emit REX.W for SLDT and STR
2018-06-01 Jan Beulichx86/Intel: accept "oword ptr" for INVPCID
2018-05-07 H.J. LuEnable Intel MOVDIRI, MOVDIR64B instructions
2018-04-27 Igor TsimbalistRevert "Enable Intel MOVDIRI, MOVDIR64B instructions."
2018-04-26 Igor TsimbalistEnable Intel MOVDIRI, MOVDIR64B instructions.
2018-04-26 Jan Beulichx86: fold various non-memory operand AVX512VL templates
2018-04-26 Jan Beulichx86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMask
2018-04-26 Jan Beulichx86: drop VexImmExt
2018-04-25 Jan Beulichx86: drop redundant AVX512VL shift templates
2018-04-17 Igor TsimbalistEnable Intel CLDEMOTE instruction.
2018-04-15 H.J. Lux86: Allow 32-bit registers for tpause and umwait
2018-04-11 Igor TsimbalistEnable Intel WAITPKG instructions.
2018-03-28 Jan Beulichx86: drop VecESize
2018-03-28 Jan Beulichx86: convert broadcast insn attribute to boolean
2018-03-28 Jan Beulichx86: fold to-scalar-int conversion insns
2018-03-22 Jan Beulichx86: drop pointless VecESize
2018-03-22 Jan Beulichx86: fix swapped operand handling for BNDMOV
2018-03-22 Jan Beulichx86/Intel: fix fallout from earlier template folding
2018-03-22 Jan Beulichx86: fold a few XOP templates
2018-03-08 H.J. Lux86-64: Also optimize "clr reg64"
2018-03-08 H.J. Lux86: Remove support for old (<= 2.8.1) versions of gcc
2018-03-08 Jan Beulichx86: fold several AVX512VL templates
2018-03-08 Jan Beulichx86: fold certain AVX512 rotate and shift templates
2018-03-08 Jan Beulichx86: fold VEX-encoded GFNI templates
2018-03-08 Jan Beulichx86: fold a few AVX512F templates
2018-03-08 Jan Beulichx86: fold LWP templates
2018-03-08 Jan Beulichx86: fold FMA and FMA4 templates
2018-03-08 Jan Beulichx86: drop {X,Y,Z}MMWORD_MNEM_SUFFIX
2018-03-08 Jan Beulichx86: drop bogus NoAVX
2018-03-08 Jan Beulichx86: avoid SSE check for LDMXCSR/STMXCSR
2018-03-08 Jan Beulichx86: drop FloatD
2018-03-08 Jan Beulichx86: bogus VMOVD with 64-bit operands should only allow...
2018-03-08 Jan Beulichx86: fold AVX vcvtpd2ps memory forms
2018-03-01 H.J. Lux86: Encode AVX256/AVX512 vpsub[bwdq] with VEX128/EVEX128
2018-02-27 H.J. Lux86: Add -O[2|s] assembler command-line options
2018-02-22 H.J. Lux86: Add {rex} pseudo prefix
2018-01-23 Igor TsimbalistEnable Intel PCONFIG instruction.
2018-01-23 Igor TsimbalistEnable Intel WBNOINVD instruction.
2018-01-17 Igor TsimbalistReplace CET bit with IBT and SHSTK bits.
2018-01-11 Igor TsimbalistRemove VL variants for 4FMAPS and 4VNNIW insns.
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