| 2016-01-01 |
Alan Modra | Copyright update for binutils |
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| 2015-12-09 |
H.J. Lu | Implement Intel OSPKE instructions |
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| 2015-06-30 |
Amit Pawar | Add support for monitorx/mwaitx instructions |
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| 2015-06-01 |
Jan Beulich | x86/Intel: fix i386_optab[] for vcvt{,u}si2s{d,s} |
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| 2015-06-01 |
Jan Beulich | x86/Intel: accept mandated operand order for vcvt{... |
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| 2015-05-18 |
H.J. Lu | Remove Disp32 from AMD64 direct call/jmp |
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| 2015-05-15 |
H.J. Lu | Support AMD64/Intel ISAs in assembler/disassembler |
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| 2015-05-11 |
H.J. Lu | Remove Disp16|Disp32 from 64-bit direct branches |
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| 2015-05-11 |
H.J. Lu | Add Intel MCU support to opcodes |
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| 2015-03-17 |
Ganesh Gopalasubra... | Add znver1 processor |
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| 2015-01-01 |
Alan Modra | ChangeLog rotatation and copyright year update |
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| 2014-11-17 |
Ilya Tocar | Add AVX512VBMI instructions |
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| 2014-11-17 |
Ilya Tocar | Add AVX512IFMA instructions |
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| 2014-11-17 |
Ilya Tocar | Add pcommit instruction |
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| 2014-11-17 |
Ilya Tocar | Add clwb instruction |
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| 2014-07-22 |
Ilya Tocar | Add AVX512DQ instructions and their AVX512VL variants. |
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| 2014-07-22 |
Ilya Tocar | Add support for AVX512BW instructions and their AVX512V... |
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| 2014-07-22 |
Ilya Tocar | Add support for AVX512VL versions of AVX512CD instructions. |
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| 2014-07-22 |
Ilya Tocar | Add support for AVX512VL. Add AVX512VL versions of... |
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| 2014-04-04 |
Ilya Tocar | Add support for Intel SGX instructions |
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| 2014-03-20 |
Ilya Tocar | Fix memory size for gather/scatter instructions |
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| 2014-03-05 |
Alan Modra | Update copyright years |
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| 2014-02-25 |
Ilya Tocar | Remove bogus vcvtps2ph variant. |
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| 2014-02-21 |
Ilya Tocar | Add support for CPUID PREFETCHWT1 |
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| 2014-02-20 |
Ilya Tocar | Change cpu for vptestnmd and vptestnmq instructions. |
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| 2014-02-19 |
H.J. Lu | Don't output trailing space |
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| 2014-02-12 |
Ilya Tocar | Add clflushopt, xsaves, xsavec, xrstors |
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| 2013-10-12 |
H.J. Lu | Only allow 32-bit/64-bit registers for bndcl/bndcu... |
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| 2013-10-08 |
Jan Beulich | opcodes/ |
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| 2013-09-30 |
H.J. Lu | Add Size64 to movq/vmovq with Reg64 operand |
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| 2013-07-26 |
H.J. Lu | Add Intel AVX-512 support |
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| 2013-07-25 |
H.J. Lu | Support Intel SHA |
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| 2013-07-24 |
H.J. Lu | Support Intel MPX |
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| 2013-07-08 |
H.J. Lu | Replace Xmmword with Qword on cvttps2pi |
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| 2013-04-08 |
Jan Beulich | gas/testsuite/ |
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| 2013-03-02 |
H.J. Lu | Add RegRex64 to riz |
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| 2013-02-19 |
H.J. Lu | Implement Intel SMAP instructions |
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| 2013-01-16 |
H.J. Lu | Add OPERAND_TYPE_IMM32_64 |
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| 2012-11-20 |
H.J. Lu | Fix opcode for 64-bit jecxz |
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| 2012-09-20 |
H.J. Lu | Replace CpuSSE3 with CpuCX16 for cmpxchg16b |
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| 2012-08-17 |
H.J. Lu | Add AMD btver1 and btver2 support |
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| 2012-07-31 |
Jan Beulich | VMOVNTDQA was both misplaced and improperly tagged... |
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| 2012-07-16 |
H.J. Lu | Implement RDRSEED, ADX and PRFCHW instructions |
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| 2012-07-02 |
Roland McGrath | gas/testsuite/ |
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| 2012-06-22 |
Roland McGrath | gas/ |
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| 2012-06-22 |
Roland McGrath | gas/ |
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| 2012-02-08 |
H.J. Lu | Implement Intel Transactional Synchronization Extensions |
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| 2012-01-13 |
H.J. Lu | Add vmfunc |
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| 2011-08-01 |
H.J. Lu | Add Disp32S to 64bit call. |
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| 2011-07-22 |
H.J. Lu | Add initial Intel K1OM support. |
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| 2011-06-30 |
H.J. Lu | Fix rorx in BMI2. |
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| 2011-06-10 |
H.J. Lu | Support AVX Programming Reference (June, 2011). |
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| 2011-01-18 |
Jan Kratochvil | opcodes/ |
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| 2011-01-05 |
H.J. Lu | Implement BMI instructions. |
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| 2010-10-14 |
H.J. Lu | Remove CheckRegSize from movq. |
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| 2010-10-14 |
H.J. Lu | Remove CheckRegSize from instructions with 0, 1 or... |
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| 2010-10-14 |
H.J. Lu | Add CheckRegSize to instructions which require register... |
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| 2010-08-06 |
H.J. Lu | Don't generate multi-byte NOPs for i686. |
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| 2010-08-06 |
H.J. Lu | Add Cpu186 to ud1/ud2/ud2a/ud2b. |
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| 2010-08-06 |
H.J. Lu | Add ud1 to x86. |
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| 2010-07-05 |
H.J. Lu | Replace rdrnd with rdrand. |
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| 2010-07-01 |
H.J. Lu | Support AVX Programming Reference (June, 2010) |
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| 2010-03-23 |
Sebastian Pop | 2010-03-22 Sebastian Pop <sebastian.pop@amd.com> |
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| 2010-02-11 |
Sebastian Pop | 2010-02-10 Quentin Neill <quentin.neill@amd.com> |
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| 2010-01-24 |
H.J. Lu | Replace "Vex" with "Vex=3" on AVX scalar instructions. |
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| 2010-01-21 |
H.J. Lu | Add xsave64 and xrstor64. |
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| 2010-01-15 |
Sebastian Pop | 2010-01-15 Sebastian Pop <sebastian.pop@amd.com> |
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| 2009-12-19 |
H.J. Lu | Replace VexNDS, VexNDD and VexLWP with VexVVVV. |
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| 2009-12-16 |
H.J. Lu | Remove ByteOkIntel. |
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| 2009-12-16 |
H.J. Lu | Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A... |
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| 2009-12-16 |
H.J. Lu | Replace Vex2Sources and Vex3Sources with VexSources. |
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| 2009-12-16 |
H.J. Lu | Remove VexW0 and VexW1. Add VexW. |
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| 2009-12-15 |
H.J. Lu | Add USE_VEX_W_TABLE, VEX_W_TABLE and VEX_W_XXX. |
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| 2009-12-04 |
H.J. Lu | Support fxsave64 and fxrstor64. |
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| 2009-11-19 |
H.J. Lu | Allow lock on cmpxch16b. |
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| 2009-11-18 |
Sebastian Pop | 2009-11-18 Sebastian Pop <sebastian.pop@amd.com> |
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| 2009-11-18 |
Sebastian Pop | 2009-11-17 Sebastian Pop <sebastian.pop@amd.com> |
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| 2009-11-12 |
H.J. Lu | 2009-11-12 H.J. Lu <hongjiu.lu@intel.com> |
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| 2009-11-12 |
H.J. Lu | gas/ |
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| 2009-11-05 |
Sebastian Pop | 2009-11-05 Sebastian Pop <sebastian.pop@amd.com> |
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| 2009-10-02 |
H.J. Lu | 2009-10-02 H.J. Lu <hongjiu.lu@intel.com> |
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| 2009-09-24 |
H.J. Lu | gas/ |
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| 2009-08-29 |
Nick Clifton | Updated sources to avoid using the identifier... |
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| 2009-07-25 |
H.J. Lu | bfd/ |
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| 2009-07-24 |
Jan Beulich | gas/ |
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| 2009-07-06 |
Dwarakanath Rajagopal | <gas changes> |
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| 2009-05-22 |
Dwarakanath Rajagopal | <gas changes> |
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| 2009-04-15 |
Jan Beulich | gas/testsuite/ |
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| 2009-02-23 |
H.J. Lu | gas/ |
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| 2009-02-04 |
H.J. Lu | gas/ |
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| 2009-01-13 |
H.J. Lu | gas/testsuite/ |
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| 2009-01-10 |
H.J. Lu | gas/ |
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| 2009-01-09 |
H.J. Lu | gas/ |
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| 2009-01-06 |
H.J. Lu | gas/testsuite/ |
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| 2009-01-06 |
H.J. Lu | 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> |
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| 2009-01-06 |
H.J. Lu | gas/ |
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| 2008-12-23 |
H.J. Lu | gas/ |
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| 2008-12-20 |
H.J. Lu | gas/ |
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| 2008-11-03 |
H.J. Lu | gas/testsuite/ |
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| 2008-09-11 |
H.J. Lu | gas/testsuite/ |
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