ld: Fix issue where PROVIDE overrides defined symbol
[external/binutils.git] / opcodes / i386-gen.c
2018-01-03 Alan ModraUpdate year range in copyright notice of binutils files
2018-01-02 Jan Beulichx86: partial revert of 10c17abdd0
2017-12-18 Jan Beulichx86: fold certain AVX and AVX2 templates
2017-12-18 Jan Beulichx86: fold RegXMM/RegYMM/RegZMM into RegSIMD
2017-12-18 Jan Beulichx86: drop FloatReg and FloatAcc
2017-12-18 Jan Beulichx86: replace Reg8, Reg16, Reg32, and Reg64
2017-11-30 Jan Beulichx86: derive DispN from BaseIndex
2017-11-30 Jan Beulichx86: drop Vec_Disp8
2017-10-23 Igor TsimbalistEnable Intel AVX512_BITALG instructions.
2017-10-23 Igor TsimbalistEnable Intel AVX512_VNNI instructions.
2017-10-23 Igor TsimbalistEnable Intel VPCLMULQDQ instruction.
2017-10-23 Igor TsimbalistEnable Intel VAES instructions.
2017-10-23 Igor TsimbalistEnable Intel GFNI instructions.
2017-10-23 Igor TsimbalistEnable Intel AVX512_VBMI2 instructions.
2017-05-22 H.J. Lux86: Add NOTRACK prefix support
2017-03-09 H.J. LuX86: Add pseudo prefixes to control encoding
2017-03-06 H.J. LuAdd support for Intel CET instructions
2017-01-12 Igor TsimbalistEnable Intel AVX512_VPOPCNTDQ instructions
2017-01-02 Alan ModraUpdate year range in copyright notice of all files.
2016-11-02 Igor TsimbalistEnable Intel AVX512_4VNNIW instructions
2016-11-02 Igor TsimbalistEnable Intel AVX512_4FMAPS instructions
2016-10-21 H.J. LuX86: Remove pcommit instruction
2016-09-07 H.J. LuX86: Allow additional ISAs for IAMCU in assembler
2016-08-24 H.J. LuX86: Add ptwrite instruction
2016-05-29 H.J. LuAdd .noavx512XX directives to x86 assembler
2016-05-27 H.J. LuUpdate x86 CPU_XXX_FLAGS handling
2016-05-27 H.J. LuReplace CpuAMD64/CpuIntel64 with AMD64/Intel64
2016-05-27 H.J. LuCorrect CpuMax in i386-opc.h
2016-05-25 H.J. LuEnable VREX for all AVX512 directives
2016-05-25 H.J. LuEnable VREX for AVX512 directives
2016-05-25 H.J. LuReimplement .no87/.nommx/.nosse/.noavx directives
2016-05-10 Alexander FominEnable Intel RDPID instruction.
2016-01-01 Alan ModraCopyright update for binutils
2015-12-09 H.J. LuImplement Intel OSPKE instructions
2015-08-07 Amit PawarRemove CpuFMA4 support from CPU_ZNVER1_FLAGS.
2015-06-30 Amit PawarAdd support for monitorx/mwaitx instructions
2015-05-15 H.J. LuSupport AMD64/Intel ISAs in assembler/disassembler
2015-05-11 H.J. LuAdd Intel MCU support to opcodes
2015-03-17 Ganesh Gopalasubra... Add znver1 processor
2015-01-01 Alan ModraChangeLog rotatation and copyright year update
2014-11-17 Ilya TocarAdd AVX512VBMI instructions
2014-11-17 Ilya TocarAdd AVX512IFMA instructions
2014-11-17 Ilya TocarAdd pcommit instruction
2014-11-17 Ilya TocarAdd clwb instruction
2014-07-22 Ilya TocarAdd AVX512DQ instructions and their AVX512VL variants.
2014-07-22 Ilya TocarAdd support for AVX512BW instructions and their AVX512V...
2014-07-22 Ilya TocarAdd support for AVX512VL. Add AVX512VL versions of...
2014-04-04 Ilya TocarAdd support for Intel SGX instructions
2014-03-05 Alan ModraUpdate copyright years
2014-03-03 Alan ModraFix various copyright issues
2014-02-21 Ilya TocarAdd support for CPUID PREFETCHWT1
2014-02-19 H.J. LuDon't output trailing space
2014-02-12 Ilya TocarAdd clflushopt, xsaves, xsavec, xrstors
2014-01-08 H.J. LuUpdate copyright year to 2014
2013-11-08 H.J. LuRemove CpuNop from CPU_K6_2_FLAGS
2013-09-30 Saravanan EkanathanAdd AMD bdver4 support.
2013-07-26 H.J. LuAdd Intel AVX-512 support
2013-07-25 H.J. LuSupport Intel SHA
2013-07-24 H.J. LuSupport Intel MPX
2013-05-15 Saravanan Ekanathangas/
2013-02-19 H.J. LuImplement Intel SMAP instructions
2013-01-16 H.J. LuAdd OPERAND_TYPE_IMM32_64
2013-01-02 H.J. LuUpdate copyright year to 2013
2012-10-09 Nagajyothi EggoneAdd AMD bdver3 support.
2012-09-25 H.J. LuAdd missing Cpu flags in bd and bt cores
2012-09-20 H.J. LuReplace CpuSSE3 with CpuCX16 for cmpxchg16b
2012-08-17 H.J. LuAdd AMD btver1 and btver2 support
2012-08-10 H.J. LuEnable FMA instructions for bdver2
2012-07-16 H.J. LuImplement RDRSEED, ADX and PRFCHW instructions
2012-06-22 Roland McGrathgas/
2012-02-08 H.J. LuImplement Intel Transactional Synchronization Extensions
2012-01-13 H.J. LuAdd vmfunc
2011-07-22 H.J. LuAdd initial Intel K1OM support.
2011-06-10 H.J. LuSupport AVX Programming Reference (June, 2011).
2011-06-03 Quentin NeillAdd CpuF16C to CPU_BDVER2_FLAGS.
2011-05-11 Quentin Neill2011-05-10 Quentin Neill <quentin.neill@amd.com>
2011-04-19 Quentin Neill * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa...
2011-01-17 Quentin NeillAdd support for TBM instructions.
2011-01-05 H.J. LuImplement BMI instructions.
2011-01-01 H.J. LuUpdate copyright in comments to 2011.
2011-01-01 H.J. LuUpdate copyright to 2011.
2010-10-16 H.J. LuAdd CpuNop to CPU_GENERIC64_FLAGS.
2010-10-14 H.J. LuAdd CheckRegSize to instructions which require register...
2010-08-06 H.J. LuDon't generate multi-byte NOPs for i686.
2010-07-01 H.J. LuSupport AVX Programming Reference (June, 2010)
2010-02-11 H.J. LuUpdate copyright.
2010-02-11 Sebastian Pop2010-02-10 Quentin Neill <quentin.neill@amd.com>
2010-02-03 Sebastian Pop2010-02-03 Quentin Neill <quentin.neill@amd.com>
2010-01-06 Sebastian Pop2010-01-06 Quentin Neill <quentin.neill@amd.com>
2009-12-19 H.J. LuReplace VexNDS, VexNDD and VexLWP with VexVVVV.
2009-12-18 H.J. LuMove Imm1 before Imm8.
2009-12-16 H.J. LuRemove ByteOkIntel.
2009-12-16 H.J. LuReplace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A...
2009-12-16 H.J. LuReplace Vex2Sources and Vex3Sources with VexSources.
2009-12-16 H.J. LuRemove VexW0 and VexW1. Add VexW.
2009-11-18 Sebastian Pop2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
2009-11-18 Sebastian Pop2009-11-17 Sebastian Pop <sebastian.pop@amd.com>
2009-11-12 H.J. Lugas/
2009-11-05 Sebastian Pop2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
2009-09-24 H.J. Lugas/
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