2015-12-09 |
H.J. Lu | Implement Intel OSPKE instructions |
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2015-08-24 |
Jan Stancek | Fix the partial disassembly of a broken three byte... |
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2015-08-21 |
Alexander Fomin | PR binutils/18257: Properly decode x86/Intel mask instr... |
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2015-07-30 |
H.J. Lu | Properly disassemble movnti in Intel mode |
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2015-07-23 |
Alan Modra | Fix ubsan signed integer overflow |
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2015-06-30 |
Amit Pawar | Add support for monitorx/mwaitx instructions |
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2015-06-01 |
Jan Beulich | x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct... |
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2015-05-15 |
H.J. Lu | Support AMD64/Intel ISAs in assembler/disassembler |
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2015-05-09 |
H.J. Lu | Ignore 0x66 prefix for call/jmp/jcc in 64-bit mode |
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2015-04-23 |
Jan Beulich | x86: disambiguate disassembly of certain AVX512 insns |
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2015-04-15 |
H.J. Lu | Remove the unused PREFIX_UD_XXX |
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2015-04-15 |
H.J. Lu | Check dp->prefix_requirement instead |
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2015-04-15 |
H.J. Lu | Handle invalid prefixes for rdrand and rdseed |
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2015-04-15 |
H.J. Lu | Replace mandatory_prefix with prefix_requirement |
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2015-04-06 |
Ilya Tocar | x86: Use individual prefix control for each opcode. |
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2015-03-17 |
Ganesh Gopalasubra... | Add znver1 processor |
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2015-01-01 |
Alan Modra | ChangeLog rotatation and copyright year update |
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2014-11-17 |
Ilya Tocar | Add AVX512VBMI instructions |
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2014-11-17 |
Ilya Tocar | Add AVX512IFMA instructions |
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2014-11-17 |
Ilya Tocar | Add pcommit instruction |
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2014-11-17 |
Ilya Tocar | Add clwb instruction |
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2014-09-22 |
H.J. Lu | Ignore MOD field for control/debug register move |
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2014-09-10 |
H.J. Lu | Properly handle suffix for iret and sysret |
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2014-07-22 |
Ilya Tocar | Add AVX512DQ instructions and their AVX512VL variants. |
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2014-07-22 |
Ilya Tocar | Add support for AVX512BW instructions and their AVX512V... |
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2014-07-22 |
Ilya Tocar | Add support for AVX512VL. Add AVX512VL versions of... |
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2014-06-10 |
H.J. Lu | Only print prefixes before fwait |
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2014-05-09 |
H.J. Lu | Properly display extra data/address size prefixes |
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2014-05-05 |
H.J. Lu | Properly handle multiple opcode prefixes |
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2014-05-02 |
H.J. Lu | Use sigsetjmp/siglongjmp in opcodes |
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2014-05-01 |
H.J. Lu | Handle prefixes before fwait |
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2014-04-04 |
Ilya Tocar | Add support for Intel SGX instructions |
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2014-03-20 |
Ilya Tocar | Fix memory size for gather/scatter instructions |
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2014-03-05 |
Alan Modra | Update copyright years |
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2014-02-12 |
Ilya Tocar | Add clflushopt, xsaves, xsavec, xrstors |
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2014-01-30 |
Michael Zolotukhin | Fix shift for AVX512F gather/scatter instructions |
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2014-01-09 |
Roland McGrath | Fix buffer underrun in i386-dis.c. |
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2013-12-17 |
Michael Zolotukhin | Properly handle ljmp/lcall with invalid MODRM byte |
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2013-10-12 |
H.J. Lu | Only allow 32-bit/64-bit registers for bndcl/bndcu... |
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2013-10-11 |
Roland McGrath | opcodes/ |
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2013-08-19 |
H.J. Lu | Remove PREFIX_EVEX_0F3A3E and PREFIX_EVEX_0F3A3F |
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2013-07-26 |
H.J. Lu | Add Intel AVX-512 support |
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2013-07-25 |
H.J. Lu | Support Intel SHA |
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2013-07-24 |
H.J. Lu | Support Intel MPX |
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2013-03-27 |
H.J. Lu | Properly check address mode for SIB |
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2013-02-19 |
H.J. Lu | Implement Intel SMAP instructions |
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2012-10-24 |
Roland McGrath | gas/testsuite/ |
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2012-08-07 |
Roland McGrath | gas/testsuite/ |
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2012-08-06 |
Roland McGrath | gas/testsuite/ |
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2012-08-06 |
Roland McGrath | gas/testsuite/ |
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2012-07-19 |
H.J. Lu | Use vex_len_table in xop_table |
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2012-07-16 |
H.J. Lu | Implement RDRSEED, ADX and PRFCHW instructions |
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2012-02-08 |
H.J. Lu | Implement Intel Transactional Synchronization Extensions |
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2012-01-13 |
H.J. Lu | Add vmfunc |
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2011-10-26 |
Nick Clifton | PR binutils/13348 |
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2011-08-02 |
Quentin Neill | opcodes/ |
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2011-08-01 |
H.J. Lu | Check R_X86_64_32 overflow and allow R_X86_64_64 for... |
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2011-07-22 |
H.J. Lu | Add initial Intel K1OM support. |
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2011-07-01 |
H.J. Lu | Update rorxS. |
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2011-06-30 |
H.J. Lu | Fix rorx in BMI2. |
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2011-06-21 |
H.J. Lu | Re-indent prefix_table. |
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2011-06-10 |
H.J. Lu | Support AVX Programming Reference (June, 2011). |
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2011-02-09 |
Michael Snyder | 2011-02-09 Michael Snyder <msnyder@vmware.com> |
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2011-01-18 |
H.J. Lu | Properly sign-extend byte. |
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2011-01-17 |
Quentin Neill | Add support for TBM instructions. |
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2011-01-05 |
H.J. Lu | Implement BMI instructions. |
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2011-01-04 |
H.J. Lu | Add VexGdq. |
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2010-12-31 |
H.J. Lu | Add x86-64 ILP32 support. |
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2010-10-02 |
H.J. Lu | Remove duplicated RMAL. |
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2010-08-31 |
H.J. Lu | Fix "pushw imm16" for x86-64 disassembler. |
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2010-08-17 |
H.J. Lu | Replace Eb with Mb on prefetch and prefetchw. |
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2010-08-06 |
H.J. Lu | Add ud1 to x86. |
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2010-07-28 |
H.J. Lu | Add 0F to VEX opcode enums. |
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2010-07-05 |
H.J. Lu | Replace rdrnd with rdrand. |
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2010-07-01 |
H.J. Lu | Support AVX Programming Reference (June, 2010) |
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2010-05-26 |
H.J. Lu | Add SIB. |
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2010-04-16 |
H.J. Lu | Remove extra breack. |
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2010-04-16 |
H.J. Lu | Return bad_opcode on unknown bits in opcode. |
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2010-04-09 |
Nick Clifton | bfd/ChangeLog |
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2010-03-23 |
Sebastian Pop | 2010-03-22 Sebastian Pop <sebastian.pop@amd.com> |
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2010-02-11 |
H.J. Lu | Update copyright. |
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2010-02-11 |
Sebastian Pop | 2010-02-10 Quentin Neill <quentin.neill@amd.com> |
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2010-01-28 |
H.J. Lu | Allow VL=1 on scalar FMA instructions. |
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2010-01-27 |
H.J. Lu | Allow VL=1 on AVX scalar instructions. |
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2010-01-24 |
H.J. Lu | Remove trailing { Bad_Opcode }. |
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2010-01-24 |
H.J. Lu | Remove trailing { Bad_Opcode } in vex_len_table. |
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2010-01-24 |
H.J. Lu | Remove trailing { Bad_Opcode }. |
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2010-01-24 |
H.J. Lu | Remove trailing "(bad)" entries and replace { "(bad... |
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2010-01-21 |
H.J. Lu | Add xsave64 and xrstor64. |
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2010-01-14 |
H.J. Lu | Add names_mm, names_xmm and names_ymm. |
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2010-01-13 |
H.J. Lu | Update comments |
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2010-01-13 |
H.J. Lu | Remove rex_original |
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2009-12-15 |
H.J. Lu | Add VEX_W_3818_P_2_M_0. |
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2009-12-15 |
H.J. Lu | Reformat vex_w_table. |
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2009-12-15 |
H.J. Lu | Add VEX_W_382X_P_2_M_0. |
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2009-12-15 |
H.J. Lu | Reformat vex_w_table. |
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2009-12-15 |
H.J. Lu | Add USE_VEX_W_TABLE, VEX_W_TABLE and VEX_W_XXX. |
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2009-12-15 |
H.J. Lu | Reformat vex_len_table. |
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2009-12-14 |
H.J. Lu | Rename MOD_VEX_51 to MOD_VEX_50. |
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2009-12-12 |
H.J. Lu | Set vex.w to 0 for VEX C5 prefix. |
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