Andes Technology has good news for you, we plan to update the nds32 port of binutils...
[external/binutils.git] / opcodes / ChangeLog
2018-09-20 Nick CliftonAndes Technology has good news for you, we plan to...
2018-09-17 Jim WilsonRISC-V: bge[u] should get higher priority than ble[u].
2018-09-17 H.J. Lux86: Set EVex=2 on EVEX.128 only vmovd and vmovq
2018-09-17 H.J. Lux86: Set Vex=1 on VEX.128 only vmovd and vmovq
2018-09-17 H.J. Lux86: Update disassembler for VexWIG
2018-09-17 H.J. Lux86: Replace VexW=3 with VexWIG
2018-09-16 H.J. Lux86: Set VexW=3 on AVX vrsqrtss
2018-09-15 H.J. Lux86: Set Vex=1 on VEX.128 only vmovq
2018-09-14 H.J. Lux86: Support VEX/EVEX WIG encoding
2018-09-14 H.J. Lux86: Handle unsupported static rounding in vcvt[u]si2sd...
2018-09-14 H.J. Lux86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32...
2018-09-14 H.J. Lui386: Reformat OP_E_memory
2018-09-14 Jan Beulichx86: fold CRC32 templates
2018-09-13 H.J. Lui386: Update VexW field for VEX instructions
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from a few further insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512_4* insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512DQ insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512BW insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512VL insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512ER insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX512F insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SHA insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from XOP and SSE4a insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX2 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AVX insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from GNFI insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from PCLMUL/VPCLMUL insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from AES/VAES insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE4.2 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE4.1 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSSE3 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE3 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE2 insns
2018-09-13 Jan Beulichx86: drop bogus IgnoreSize from SSE insns
2018-09-13 Jan Beulichx86: drop unnecessary {,No}Rex64
2018-09-13 Jan Beulichx86: also allow D on 3-operand insns
2018-09-13 Jan Beulichx86: use D attribute also for SIMD templates
2018-09-13 Jan Beulichx86-64: bndmk, bndldx, and bndstx don't allow RIP-relat...
2018-09-08 John DarringtonS12Z: Make disassebler work for --enable-targets=all...
2018-08-31 Jim WilsonRISC-V: Correct the requirement of compressed floating...
2018-08-30 Jim WilsonRISC-V: Allow instruction require more than one extension
2018-08-29 Martin Abergsparc/leon: add support for partial write psr instruction
2018-08-29 Chenghua Xu[MIPS] Add Loongson 2K1000 proccessor support.
2018-08-29 Chenghua Xu[MIPS] Add Loongson 3A2000/3A3000 proccessor support.
2018-08-29 Chenghua Xu[MIPS] Add Loongson 3A1000 proccessor support.
2018-08-29 Chenghua Xu[MIPS/GAS] Add Loongson EXT2 Instructions support.
2018-08-29 Chenghua Xu[MIPS/GAS] Split Loongson EXT Instructions from loongson3a.
2018-08-29 Chenghua Xu[MIPS/GAS] Split Loongson CAM Instructions from loongson3a
2018-08-21 Alan ModraUse operand->extract to provide defaults for optional...
2018-08-21 Alan ModraFix s12z test regexps
2018-08-20 Alan ModraTidy bit twiddling
2018-08-18 John DarringtonOpcodes: (BRCLR / BRSET) Disassemble reserved codes...
2018-08-18 John DarringtonS12Z: Move opcode header to public include directory.
2018-08-14 H.J. Lux86-64: Display eiz for address with the addr32 prefix
2018-08-11 H.J. Lux86: Add CpuCMOV and CpuFXSR
2018-08-06 claziss[ARC] Update handling AUX-registers.
2018-08-06 Jan Beulichx86: fold RegEip/RegRip and RegEiz/RegRiz
2018-08-03 Jan Beulichx86: drop NoRex64 from {,v}pmov{s,z}x*
2018-08-03 Jan Beulichx86: drop "mem" operand type attribute
2018-08-01 Alan Modracsky regen
2018-07-31 Nick CliftonCorrect previous update - new translation for the opcod...
2018-07-31 Jan Beulichx86: also optimize KXOR{D,Q} and KANDN{D,Q}
2018-07-31 Jan Beulichx86: fold various AVX512 templates with so far differin...
2018-07-31 Jan Beulichx86/Intel: correct permitted operand sizes for AVX512...
2018-07-31 Jan Beulichx86: drop CpuVREX
2018-07-30 Jim WilsonRISC-V: Set insn info fields correctly when disassembling.
2018-07-30 Andrew JennerAdd support for the C_SKY series of processors.
2018-07-27 Alan ModraRe: PowerPC Improve support for Gekko & Broadway
2018-07-26 Alex ChadwickPowerPC Improve support for Gekko & Broadway
2018-07-25 H.J. Lux86: Expand Broadcast to 3 bits
2018-07-24 Alan ModraPR23430, Indices misspelled
2018-07-24 Jan Beulichx86-64: correct AVX512F vcvtsi2s{d,s} handling
2018-07-23 Claudiu Zissulescu[ARC] Fix decoding of w6 signed short immediate.
2018-07-23 Claudiu Zissulescu[ARC] Allow vewt instruction for ARC EM family.
2018-07-23 Alan Modrapower9 mfupmc/mtupmc
2018-07-20 Chenghua XuMIPS/GAS: Split Loongson MMI Instructions from loongson...
2018-07-19 Jan Beulichx86: fold narrowing VCVT* templates
2018-07-19 Jan Beulichx86: fold VFPCLASSP{D,S} templates
2018-07-19 Jan Beulichx86: fold various AVX512* templates
2018-07-19 Jan Beulichx86: fold various AVX512DQ templates
2018-07-19 Jan Beulichx86: fold various AVX512BW templates
2018-07-19 Jan Beulichx86: fold various AVX512CD templates
2018-07-19 Jan Beulichx86: fold various AVX512VL templates into their AVX512F...
2018-07-19 Jan Beulichx86: pre-process opcodes table before parsing
2018-07-18 H.J. Lux86: Split vcvtps2{,u}qq and vcvttps2{,u}qq
2018-07-12 Nick CliftonThis patch adds support for the SSBB and PSSBB speculat...
2018-07-12 Tamar ChristinaAdd remainder of Em16 restrictions for AArch64 gas.
2018-07-11 Sudakshina DasAdds the speculation barrier instructions to the ARM...
2018-07-11 Jan Beulichx86: adjust monitor/mwait templates
2018-07-11 Jan Beulichx86: drop {,reg16_}inoutportreg variables
2018-07-11 Jan Beulichx86/Intel: accept memory operand size specifiers for...
2018-07-11 Jan Beulichx86: replace off-by-one OTMax
2018-07-09 Maciej W. RozyckiS12Z/opcodes: Correct a `reg' global shadowing error...
2018-07-06 Tamar ChristinaFix SBO bit in disassembly mask for ldrah on AArch64.
2018-07-06 Tamar ChristinaFix the read/write flag for these registers on AArch64
2018-07-02 Maciej W. RozyckiGDB PR tdep/8282: MIPS: Wire in `set disassembler-options'
2018-07-02 Thomas Preud'homme[ARM] Update bfd's Tag_CPU_arch knowledge
2018-06-29 Tamar ChristinaFix AArch64 encodings for by element instructions.
2018-06-26 Nick CliftonUpdated translations.
2018-06-26 Nick CliftonFix spelling mistakes.
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