2018-03-22 |
Jan Beulich | x86: drop remaining redundant DispN |
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2018-03-22 |
Jan Beulich | x86: fix swapped operand handling for BNDMOV |
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2018-03-22 |
Jan Beulich | x86/Intel: fix fallout from earlier template folding |
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2018-03-22 |
Jan Beulich | x86: fold a few XOP templates |
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2018-03-14 |
Jim Wilson | RISC-V: Add .insn support. |
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2018-03-13 |
Nick Clifton | Updated Russian and Brazilian Portuguese translations. |
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2018-03-08 |
H.J. Lu | x86-64: Also optimize "clr reg64" |
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2018-03-08 |
H.J. Lu | x86: Remove support for old (<= 2.8.1) versions of gcc |
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2018-03-08 |
Jan Beulich | x86: fold several AVX512VL templates |
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2018-03-08 |
Jan Beulich | x86: fold certain AVX512 rotate and shift templates |
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2018-03-08 |
Jan Beulich | x86: fold VEX-encoded GFNI templates |
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2018-03-08 |
Jan Beulich | x86: fold a few AVX512F templates |
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2018-03-08 |
Jan Beulich | x86: fold LWP templates |
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2018-03-08 |
Jan Beulich | x86: fold FMA and FMA4 templates |
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2018-03-08 |
Jan Beulich | x86: drop {X,Y,Z}MMWORD_MNEM_SUFFIX |
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2018-03-08 |
Jan Beulich | x86: drop bogus NoAVX |
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2018-03-08 |
Jan Beulich | x86: avoid SSE check for LDMXCSR/STMXCSR |
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2018-03-08 |
Jan Beulich | x86: drop FloatD |
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2018-03-08 |
Jan Beulich | x86/Intel: correct disassembly of fsub*/fdiv* |
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2018-03-08 |
Jan Beulich | x86: bogus VMOVD with 64-bit operands should only allow... |
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2018-03-08 |
Jan Beulich | x86: fold AVX vcvtpd2ps memory forms |
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2018-03-07 |
Alan Modra | XCOFF disassembler |
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2018-03-03 |
Alan Modra | opcodes error messages |
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2018-03-01 |
H.J. Lu | x86: Encode AVX256/AVX512 vpsub[bwdq] with VEX128/EVEX128 |
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2018-02-28 |
Alan Modra | Add missing translations to ALL_LINGUAS |
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2018-02-27 |
Thomas Preud'homme | [ARM] Remove ARM_FEATURE_COPY macro |
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2018-02-27 |
H.J. Lu | x86: Add -O[2|s] assembler command-line options |
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2018-02-26 |
Alan Modra | crx string overflow warning |
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2018-02-22 |
Jim Wilson | RISC-V: Make disassebler work for --enable-targets... |
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2018-02-22 |
H.J. Lu | x86: Add {rex} pseudo prefix |
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2018-02-20 |
Maciej W. Rozycki | MIPS16/opcodes: Free up `M' operand code |
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2018-02-19 |
Thomas Preud'homme | [ARM] Fix bxns mask |
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2018-02-13 |
Nick Clifton | Fix compile time warning messages from gcc version... |
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2018-02-13 |
Maciej W. Rozycki | WebAssembly: Correct an `index' global shadowing error... |
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2018-02-12 |
Henry Wong | MIPS: Fix encoding for MIPSr6 sigrie instruction. |
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2018-02-05 |
Nick Clifton | Updated Brazillian portuguese and Russian translation |
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2018-01-23 |
Igor Tsimbalist | Enable Intel PCONFIG instruction. |
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2018-01-23 |
Igor Tsimbalist | Enable Intel WBNOINVD instruction. |
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2018-01-17 |
Jim Wilson | RISC-V: Fix bug in prior addi/c.nop patch. |
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2018-01-17 |
Igor Tsimbalist | Replace CET bit with IBT and SHSTK bits. |
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2018-01-16 |
Nick Clifton | Update translations for various binutils components. |
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2018-01-15 |
Jim Wilson | RISC-V: Add support for addi that compresses to c.nop. |
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2018-01-15 |
Nick Clifton | Update Ukranian translations for bfd, binutils, gas... |
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2018-01-13 |
Nick Clifton | Update pot files |
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2018-01-13 |
Nick Clifton | Bump version number to 2.30.51 |
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2018-01-13 |
Nick Clifton | Add note about 2.30 branch creation to changelogs |
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2018-01-11 |
Igor Tsimbalist | Remove VL variants for 4FMAPS and 4VNNIW insns. |
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2018-01-10 |
Jan Beulich | x86: fix Disp8 handling for scalar AVX512_4FMAPS insns |
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2018-01-10 |
Jan Beulich | x86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants |
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2018-01-10 |
Jim Wilson | RISC-V: Disassemble x0 based addresses as 0. |
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2018-01-09 |
James Greenhalgh | [Arm] Add CSDB instruction |
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2018-01-09 |
James Greenhalgh | Add support for the AArch64's CSDB instruction. |
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2018-01-08 |
H.J. Lu | x86: Properly encode vmovd with 64-bit memeory |
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2018-01-06 |
Jim Wilson | RISC-V: Print symbol address for jalr w/ zero offset. |
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2018-01-03 |
Alan Modra | Update year range in copyright notice of binutils files |
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2018-01-03 |
Alan Modra | ChangeLog rotation |
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2018-01-02 |
Jan Beulich | x86: partial revert of 10c17abdd0 |
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2017-12-20 |
Jim Wilson | RISC-V: Add compressed instruction hints, and a few... |
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2017-12-19 |
Tamar Christina | Correct disassembly of dot product instructions. |
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2017-12-19 |
Tamar Christina | Add support for V_4B so we can properly reject it. |
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2017-12-18 |
Jan Beulich | x86: fold certain AVX and AVX2 templates |
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2017-12-18 |
Jan Beulich | x86: fold RegXMM/RegYMM/RegZMM into RegSIMD |
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2017-12-18 |
Jan Beulich | x86: drop FloatReg and FloatAcc |
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2017-12-18 |
Jan Beulich | x86: replace Reg8, Reg16, Reg32, and Reg64 |
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2017-12-15 |
Dimitar Dimitrov | Fix disassembly for PowerPC |
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2017-12-15 |
Jan Beulich | x86: drop stray CheckRegSize uses |
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2017-12-13 |
Jim Wilson | Add missing RISC-V fsrmi and fsflagsi instructions. |
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2017-12-13 |
Dimitar Dimitrov | This patch enables disassembler_needs_relocs for PRU... |
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2017-12-11 |
Renlin Li | [Binutils][Objdump]Check symbol section information... |
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2017-12-03 |
Alan Modra | Fix "FAIL: VLE relocations 3" |
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2017-12-01 |
Peter Bergner | Use consistent types for holding instructions, instruct... |
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2017-11-30 |
Jan Beulich | x86: derive DispN from BaseIndex |
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2017-11-30 |
Jan Beulich | x86: drop Vec_Disp8 |
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2017-11-29 |
Stefan Stroe | Support --localedir, --datarootdir and --datadir |
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2017-11-27 |
Nick Clifton | Update the simplified Chinese translation of the messag... |
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2017-11-24 |
Jan Beulich | x86: don't omit disambiguating suffixes from "fi*" |
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2017-11-23 |
Igor Tsimbalist | Add Disp8MemShift for AVX512 VAES instructions. |
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2017-11-23 |
Jan Beulich | x86: fix AVX-512 16-bit addressing |
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2017-11-23 |
Jan Beulich | x86: correct UDn |
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2017-11-22 |
Igor Tsimbalist | Remove Vec_Disp8 field for vgf2p8mulb for AVX flavor. |
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2017-11-22 |
Igor Tsimbalist | Update ChangeLog |
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2017-11-22 |
claziss | [ARC] Fix handling of ARCv2 H-register class. |
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2017-11-21 |
claziss | [ARC] Improve printing of pc-relative instructions. |
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2017-11-16 |
Tamar Christina | Add new AArch64 FP16 FM{A|S} instructions. |
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2017-11-16 |
Tamar Christina | Add assembler and disassembler support for the new... |
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2017-11-16 |
Jan Beulich | x86: ignore high register select bit(s) in 32- and... |
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2017-11-15 |
Jan Beulich | x86: use correct register names |
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2017-11-15 |
Jan Beulich | x86: drop VEXI4_Fixup() |
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2017-11-15 |
Jan Beulich | x86-64: don't allow use of %axl as accumulator |
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2017-11-14 |
Jan Beulich | x86: add disassembler support for XOP VPCOM* pseudo-ops |
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2017-11-14 |
Jan Beulich | x86: add support for AVX-512 VPCMP*{B,W} pseudo-ops |
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2017-11-14 |
Jan Beulich | x86: string insns don't allow displacements |
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2017-11-13 |
Jan Beulich | x86: {f,}xsave64 / {f,}xrstor64 / xsaveopt64 should... |
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2017-11-09 |
Tamar Christina | Add assembler and disassembler support for the new... |
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2017-11-09 |
Tamar Christina | Add the operand encoding types for the new Armv8.2... |
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2017-11-09 |
Tamar Christina | Adds the new Fields and Operand types for the new instr... |
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2017-11-09 |
Tamar Christina | Split the ARM Crypto ISA extensions for AES and SHA1... |
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2017-11-08 |
Nick Clifton | Split the AArch64 Crypto instructions for AES and SHA1... |
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2017-11-08 |
Jiong Wang | Adds command line support for Armv8.4-A, via the new... |
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2017-11-07 |
Andrew Burgess | opcodes/arc: Fix incorrect insn_class for some nps... |
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