Regenerate configure files
[external/binutils.git] / opcodes / ChangeLog
2015-07-27 H.J. LuRegenerate configure files
2015-07-23 Alan ModraFix ubsan signed integer overflow
2015-07-22 H.J. LuFix memory operand size for vcvtt?ps2u?qq instructions
2015-07-16 Alessandro MarzocchiUpdates the ARM disassembler's output of floating point...
2015-07-14 H.J. LuSync config/warnings.m4 with GCC
2015-07-10 Alan ModraAdd missing changelog entries
2015-07-03 Alan ModraRemove ppc860, ppc750cl, ppc7450 insns from common...
2015-07-01 Sandra LoosemoreOpcodes and assembler support for Nios II R2
2015-06-30 Amit PawarAdd support for monitorx/mwaitx instructions
2015-06-22 Peter BergnerPPC sync instruction accepts invalid and incompatible...
2015-06-22 Nick CliftonStop "objdump -d" from disassembling past a symbolic...
2015-06-19 Peter BergnerAllow for optional operands with non-zero default values.
2015-06-16 Matthew Wahab[AArch64] Support id_mmfr4 system register
2015-06-16 Szabolcs NagyFixes a compile time warnng about left shifting a negat...
2015-06-12 Peter BergnerRemove unused MTMSRD_L macro and re-add accidentally...
2015-06-04 Nick CliftonFixes the check for emulated MSP430 instrucrtions that...
2015-06-02 Matthew Wahab[ARM] Add support for ARMv8.1 PAN extension
2015-06-02 Matthew Wahab[ARM] Rework CPU feature selection in the disassembler
2015-06-02 Matthew Wahab[AArch64] Support for ARMv8.1a Adv.SIMD instructions
2015-06-02 Matthew Wahab[AArch64] Support for ARMv8.1a Limited Ordering Regions...
2015-06-01 Matthew Wahab[AArch64][libopcode] Add support for PAN architecture...
2015-06-01 Jan Beulichx86/Intel: fix i386_optab[] for vcvt{,u}si2s{d,s}
2015-06-01 Jan Beulichx86/Intel: disassemble vcvt{,u}si2s{d,s} with correct...
2015-06-01 Jan Beulichx86/Intel: accept mandated operand order for vcvt{...
2015-05-18 H.J. LuRemove Disp32 from AMD64 direct call/jmp
2015-05-15 H.J. LuSupport AMD64/Intel ISAs in assembler/disassembler
2015-05-15 Peter BergnerFix some PPC assembler errors.
2015-05-13 H.J. LuAdd missing ChangeLog entries for PR binutis/18386
2015-05-11 H.J. LuRemove Disp16|Disp32 from 64-bit direct branches
2015-05-11 H.J. LuAdd Intel MCU support to opcodes
2015-04-30 DJ DelorieMake RL78 disassembler and simulator respect ISA for...
2015-04-29 Nick CliftonUpdated translations for various binutils components.
2015-04-27 Peter Bergneropcodes/
2015-04-27 Andreas KrebbelS/390: Fixes for z13 instructions.
2015-04-23 Jan Beulichx86: disambiguate disassembly of certain AVX512 insns
2015-04-15 H.J. LuRemove the unused PREFIX_UD_XXX
2015-04-15 H.J. LuCheck dp->prefix_requirement instead
2015-04-15 H.J. LuHandle invalid prefixes for rdrand and rdseed
2015-04-15 H.J. LuReplace mandatory_prefix with prefix_requirement
2015-04-15 Renlin Li[ARM] Disassembles SSAT and SSAT16 instructions incorre...
2015-04-06 Ilya Tocarx86: Use individual prefix control for each opcode.
2015-03-30 Mike Frysingeropcodes: d10v: fix old style prototype
2015-03-29 H.J. LuAdd the missing opcodes/ChangeLog entry
2015-03-25 Anton Blanchardpowerpc: Only initialise opcode indices once
2015-03-25 Anton Blanchardpowerpc: Add slbfee. instruction
2015-03-24 Terry GuoExtend arm_feature_set struct to provide more bits
2015-03-17 Ganesh Gopalasubra... Add znver1 processor
2015-03-13 Andrew BennettMIPS: Fix constraint issues with the R6 beqc and bnec...
2015-03-13 Andrew BennettAdd support for MIPS R6 evp and dvp instructions.
2015-03-10 Andreas KrebbelS/390: Add more IBM z13 instructions
2015-03-10 Jiong Wang[AARCH64] Remove Load/Store register (unscaled immediat...
2015-03-03 Jiong Wang[ARM] Skip private symbol when doing objdump
2015-02-25 Oleg Endo[SH] Fix clrs, sets, pref insn arch memberships.
2015-02-23 VinayAdds a space between the operands of the RL78's MOV...
2015-02-19 Pedro AlvesWrap a few opcodes headers in extern "C" for C++
2015-02-10 Pedro Alvesopcodes/microblaze: Rename 'or', 'and', 'xor' to avoid...
2015-01-28 Alan ModraFT32 initial support
2015-01-28 Kuan-Lin ChenNDS32/opcodes: Add new system registers.
2015-01-16 Andreas KrebbelS/390: Add support for IBM z13.
2015-01-01 Alan ModraChangeLog rotatation and copyright year update
2014-12-27 Anthony GreenLimit moxie sto/ldo offsets to 16 bits
2014-12-24 Anthony GreenAdd mul.x and umul.x instructions to moxie port
2014-12-16 Matthew FortuneAdd in a JALRC alias and fix the NAL instruction.
2014-12-12 Anthony GreenAdd zex instructions for moxie port
2014-12-06 Eric BotcazouAdd Visium support to opcodes
2014-11-30 Alan ModraPower4 should treat mftb as extended mfspr mnemonic
2014-11-28 Sandra LoosemoreRemove broken nios2 assembler dwim support.
2014-11-28 Alan ModraDon't deprecate powerpc mftb insn
2014-11-24 H.J. LuUpdate libtool.m4 from GCC trunk
2014-11-17 Ilya TocarAdd AVX512VBMI instructions
2014-11-17 Ilya TocarAdd AVX512IFMA instructions
2014-11-17 Ilya TocarAdd pcommit instruction
2014-11-17 Ilya TocarAdd clwb instruction
2014-11-06 Sandra LoosemoreAdd mach parameter to nios2_find_opcode_hash.
2014-11-03 Nick CliftonImport updated translations supplied by the Translation...
2014-10-31 Naveen H.SMIPS: Add Octeon 3 support
2014-10-29 Nick CliftonUpdated/new translations provided by the Translations...
2014-10-23 Sandra LoosemoreRefactoring/cleanup of nios2 opcodes and assembler...
2014-10-21 Jan Beulichppc: enable msgclr and msgsnd on Power8
2014-10-17 Jose E. Marchesiopcodes, elf: annotate instructions with HWCAP2_VIS3B.
2014-10-17 Jose E. Marchesiopcodes: fix several misplaced hwcap entries.
2014-10-15 Tristan GingoldBump bfd version.
2014-10-09 Jose E. MarchesiThis is a series of patches that add support for the...
2014-09-22 H.J. LuIgnore MOD field for control/debug register move
2014-09-16 Kuan-Lin ChenNDS32/opcodes: Add audio ISA extension and modify the...
2014-09-15 Andrew BennettAdd support for MIPS R6.
2014-09-10 H.J. LuProperly handle suffix for iret and sysret
2014-09-03 Jiong Wang[PATCH/AArch64] Generic support for all system register...
2014-09-03 Jiong Wang[PATCH/AArch64] Implement LSE feature
2014-08-26 Maciej W. RozyckiMIPS: Make the CODE10 operand code consistent between...
2014-08-22 Maciej W. RozyckiARM/opcodes: Fix negative hexadecimal offset disassembly
2014-08-21 Maciej W. RozyckiMIPS/opcodes: Remove microMIPS 48-bit LI instruction
2014-08-19 Andreas ArnezThis patch set mainly aims at improving the S/390 disas...
2014-08-14 Mike Frysingeropcodes: blackfin: convert ad-hoc ints to bfd_boolean
2014-08-14 Mike Frysingeropcodes: blackfin: simplify decode_CC2stat_0 logic
2014-08-14 Mike Frysingeropcodes: blackfin: avoid duplicate memory reads
2014-08-13 Mike Frysingeropcodes: blackfin: push down global state
2014-08-13 Mike Frysingeropcodes: blackfin: do not force align the PC
2014-08-13 Mike Frysingeropcodes: blackfin: handle memory read errors
2014-07-29 Matthew Fortune[MIPS] Rename COPROC related macros
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