2018-09-17 |
H.J. Lu | x86: Update disassembler for VexWIG |
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2018-09-17 |
H.J. Lu | x86: Replace VexW=3 with VexWIG |
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2018-09-16 |
H.J. Lu | x86: Set VexW=3 on AVX vrsqrtss |
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2018-09-15 |
H.J. Lu | x86: Set Vex=1 on VEX.128 only vmovq |
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2018-09-14 |
H.J. Lu | x86: Support VEX/EVEX WIG encoding |
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2018-09-14 |
H.J. Lu | x86: Handle unsupported static rounding in vcvt[u]si2sd... |
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2018-09-14 |
H.J. Lu | x86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32... |
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2018-09-14 |
H.J. Lu | i386: Reformat OP_E_memory |
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2018-09-14 |
Jan Beulich | x86: fold CRC32 templates |
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2018-09-13 |
H.J. Lu | i386: Update VexW field for VEX instructions |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from a few further insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512_4* insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512DQ insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512BW insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512VL insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512ER insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX512F insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SHA insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from XOP and SSE4a insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX2 insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AVX insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from GNFI insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from PCLMUL/VPCLMUL insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from AES/VAES insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSE4.2 insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSE4.1 insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSSE3 insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSE3 insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSE2 insns |
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2018-09-13 |
Jan Beulich | x86: drop bogus IgnoreSize from SSE insns |
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2018-09-13 |
Jan Beulich | x86: drop unnecessary {,No}Rex64 |
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2018-09-13 |
Jan Beulich | x86: also allow D on 3-operand insns |
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2018-09-13 |
Jan Beulich | x86: use D attribute also for SIMD templates |
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2018-09-13 |
Jan Beulich | x86-64: bndmk, bndldx, and bndstx don't allow RIP-relat... |
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2018-09-08 |
John Darrington | S12Z: Make disassebler work for --enable-targets=all... |
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2018-08-31 |
Jim Wilson | RISC-V: Correct the requirement of compressed floating... |
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2018-08-30 |
Jim Wilson | RISC-V: Allow instruction require more than one extension |
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2018-08-29 |
Martin Aberg | sparc/leon: add support for partial write psr instruction |
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2018-08-29 |
Chenghua Xu | [MIPS] Add Loongson 2K1000 proccessor support. |
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2018-08-29 |
Chenghua Xu | [MIPS] Add Loongson 3A2000/3A3000 proccessor support. |
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2018-08-29 |
Chenghua Xu | [MIPS] Add Loongson 3A1000 proccessor support. |
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2018-08-29 |
Chenghua Xu | [MIPS/GAS] Add Loongson EXT2 Instructions support. |
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2018-08-29 |
Chenghua Xu | [MIPS/GAS] Split Loongson EXT Instructions from loongson3a. |
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2018-08-29 |
Chenghua Xu | [MIPS/GAS] Split Loongson CAM Instructions from loongson3a |
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2018-08-21 |
Alan Modra | Use operand->extract to provide defaults for optional... |
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2018-08-21 |
Alan Modra | Fix s12z test regexps |
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2018-08-20 |
Alan Modra | Tidy bit twiddling |
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2018-08-18 |
John Darrington | Opcodes: (BRCLR / BRSET) Disassemble reserved codes... |
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2018-08-18 |
John Darrington | S12Z: Move opcode header to public include directory. |
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2018-08-14 |
H.J. Lu | x86-64: Display eiz for address with the addr32 prefix |
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2018-08-11 |
H.J. Lu | x86: Add CpuCMOV and CpuFXSR |
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2018-08-06 |
claziss | [ARC] Update handling AUX-registers. |
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2018-08-06 |
Jan Beulich | x86: fold RegEip/RegRip and RegEiz/RegRiz |
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2018-08-03 |
Jan Beulich | x86: drop NoRex64 from {,v}pmov{s,z}x* |
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2018-08-03 |
Jan Beulich | x86: drop "mem" operand type attribute |
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2018-08-01 |
Alan Modra | csky regen |
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2018-07-31 |
Nick Clifton | Correct previous update - new translation for the opcod... |
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2018-07-31 |
Jan Beulich | x86: also optimize KXOR{D,Q} and KANDN{D,Q} |
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2018-07-31 |
Jan Beulich | x86: fold various AVX512 templates with so far differin... |
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2018-07-31 |
Jan Beulich | x86/Intel: correct permitted operand sizes for AVX512... |
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2018-07-31 |
Jan Beulich | x86: drop CpuVREX |
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2018-07-30 |
Jim Wilson | RISC-V: Set insn info fields correctly when disassembling. |
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2018-07-30 |
Andrew Jenner | Add support for the C_SKY series of processors. |
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2018-07-27 |
Alan Modra | Re: PowerPC Improve support for Gekko & Broadway |
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2018-07-26 |
Alex Chadwick | PowerPC Improve support for Gekko & Broadway |
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2018-07-25 |
H.J. Lu | x86: Expand Broadcast to 3 bits |
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2018-07-24 |
Alan Modra | PR23430, Indices misspelled |
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2018-07-24 |
Jan Beulich | x86-64: correct AVX512F vcvtsi2s{d,s} handling |
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2018-07-23 |
Claudiu Zissulescu | [ARC] Fix decoding of w6 signed short immediate. |
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2018-07-23 |
Claudiu Zissulescu | [ARC] Allow vewt instruction for ARC EM family. |
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2018-07-23 |
Alan Modra | power9 mfupmc/mtupmc |
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2018-07-20 |
Chenghua Xu | MIPS/GAS: Split Loongson MMI Instructions from loongson... |
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2018-07-19 |
Jan Beulich | x86: fold narrowing VCVT* templates |
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2018-07-19 |
Jan Beulich | x86: fold VFPCLASSP{D,S} templates |
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2018-07-19 |
Jan Beulich | x86: fold various AVX512* templates |
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2018-07-19 |
Jan Beulich | x86: fold various AVX512DQ templates |
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2018-07-19 |
Jan Beulich | x86: fold various AVX512BW templates |
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2018-07-19 |
Jan Beulich | x86: fold various AVX512CD templates |
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2018-07-19 |
Jan Beulich | x86: fold various AVX512VL templates into their AVX512F... |
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2018-07-19 |
Jan Beulich | x86: pre-process opcodes table before parsing |
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2018-07-18 |
H.J. Lu | x86: Split vcvtps2{,u}qq and vcvttps2{,u}qq |
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2018-07-12 |
Nick Clifton | This patch adds support for the SSBB and PSSBB speculat... |
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2018-07-12 |
Tamar Christina | Add remainder of Em16 restrictions for AArch64 gas. |
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2018-07-11 |
Sudakshina Das | Adds the speculation barrier instructions to the ARM... |
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2018-07-11 |
Jan Beulich | x86: adjust monitor/mwait templates |
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2018-07-11 |
Jan Beulich | x86: drop {,reg16_}inoutportreg variables |
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2018-07-11 |
Jan Beulich | x86/Intel: accept memory operand size specifiers for... |
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2018-07-11 |
Jan Beulich | x86: replace off-by-one OTMax |
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2018-07-09 |
Maciej W. Rozycki | S12Z/opcodes: Correct a `reg' global shadowing error... |
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2018-07-06 |
Tamar Christina | Fix SBO bit in disassembly mask for ldrah on AArch64. |
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2018-07-06 |
Tamar Christina | Fix the read/write flag for these registers on AArch64 |
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2018-07-02 |
Maciej W. Rozycki | GDB PR tdep/8282: MIPS: Wire in `set disassembler-options' |
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2018-07-02 |
Thomas Preud'homme | [ARM] Update bfd's Tag_CPU_arch knowledge |
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2018-06-29 |
Tamar Christina | Fix AArch64 encodings for by element instructions. |
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2018-06-26 |
Nick Clifton | Updated translations. |
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2018-06-26 |
Nick Clifton | Fix spelling mistakes. |
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2018-06-24 |
Nick Clifton | Regenerate configure and pot files with updated binutil... |
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2018-06-24 |
Nick Clifton | Add 2.30 branch notes to ChangeLogs and NEWS files. |
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2018-06-22 |
Tamar Christina | Correct negs aliasing on AArch64. |
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2018-06-21 |
Maciej W. Rozycki | MIPS/opcodes: Fix a typo in `-M ginv' option description |
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