2007-10-16 |
H. Peter Anvin | Fix FISTTP opcodes (BR 689695) |
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2007-10-02 |
H. Peter Anvin | insns.dat: add systematic names for the hinting NOPs... |
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2007-09-28 |
Charles Crayne | Merge branch 'master' of git+ssh://ccrayne@repo.or... |
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2007-09-25 |
H. Peter Anvin | Correct the handling of "MOV" with immediate in 64... |
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2007-09-25 |
H. Peter Anvin | Fix BR 1490407: size of the second operand of LAR/LSL |
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2007-09-24 |
H. Peter Anvin | insns.dat: SMINT - mark ND, DMINT - fix opcode |
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2007-09-24 |
H. Peter Anvin | Additional compaction missed by script |
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2007-09-24 |
H. Peter Anvin | insns.dat: machine-generated compaction mmx/xmmreg... |
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2007-09-23 |
H. Peter Anvin | Implement INVLPGA according to the documentation |
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2007-09-23 |
H. Peter Anvin | Reformat insns.dat to uniform column width |
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2007-09-23 |
H. Peter Anvin | Auto-generate 0x67 prefixes without the need for \30x... |
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2007-09-23 |
H. Peter Anvin | LDDQU needs \301 (BR 1103549) |
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2007-09-23 |
H. Peter Anvin | RDTSCP and INVLPGA aren't 64-bit specific |
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2007-09-23 |
H. Peter Anvin | Cyrix GX1 instructions: BBx_RESET, CPU_READ, CPU_WRITE |
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2007-09-23 |
H. Peter Anvin | Centaur XSHA1, XSHA256, MONTMUL |
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2007-09-23 |
H. Peter Anvin | Implement Centaur's XCRYPT instructions |
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2007-09-23 |
H. Peter Anvin | Add Geode LX (AMD's Cyrix-derived core) instructions |
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2007-09-23 |
H. Peter Anvin | Add the GETSEC instruction for Intel SMX |
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2007-09-23 |
H. Peter Anvin | Add the AMD SSE4a and LZCNT instructions |
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2007-09-23 |
H. Peter Anvin | Tag UMOV as ND (no disassembly) to avoid collision |
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2007-09-21 |
Charles Crayne | Merge branch 'master' of git+ssh://ccrayne@repo.or... |
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2007-09-20 |
Frank Kotler | Merge branch 'master' of git+ssh://fbkotler@repo.or... |
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2007-09-19 |
H. Peter Anvin | Merge commit 'origin/sse5' |
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2007-09-19 |
Frank Kotler | Merge branch 'master' of git+ssh://fbkotler@repo.or... |
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2007-09-19 |
H. Peter Anvin | Merge commit 'origin/master' into sse5 |
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2007-09-18 |
H. Peter Anvin | Merge commit 'origin/master' into sse5 |
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2007-09-18 |
H. Peter Anvin | Add NOP with argument to the instruction list |
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2007-09-18 |
H. Peter Anvin | Implement "oword" (128 bits) as a first-class size |
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2007-09-18 |
H. Peter Anvin | SSE5 instruction table |
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2007-09-18 |
H. Peter Anvin | insns.dat: All SSE5 instructions are AMD |
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2007-09-18 |
H. Peter Anvin | Actually generate SSE5 instructions |
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2007-09-17 |
H. Peter Anvin | Merge commit 'origin/master' into sse5 |
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2007-09-17 |
H. Peter Anvin | Initial support for four arguments per instruction |
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2007-09-17 |
H. Peter Anvin | CLFLUSH: Neither an x64 instruction nor AMD |
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2007-09-13 |
H. Peter Anvin | Fix literal F2 and F3 prefixes |
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2007-09-13 |
H. Peter Anvin | Add (untested!) SSSE3, SSE4.1, SSE4.2 instructions |
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2007-09-13 |
H. Peter Anvin | Add support for Tejas New Instructions (SSSE3) |
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2007-09-13 |
H. Peter Anvin | Remove $Id$ tags (useless with git) |
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2007-09-13 |
H. Peter Anvin | Use rm32 operands for VMREAD/VMWRITE |
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2007-09-11 |
H. Peter Anvin | Handle instructions which can have both REX.W and OSP |
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2007-09-02 |
H. Peter Anvin | Fix some MMX/SSE irregularities which interact with... |
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2007-08-17 |
Keith Kanios | Fixed issues with REX prefix effective address generati... |
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2007-05-30 |
H. Peter Anvin | Machine-generated \321->\324 corrections |
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2007-05-30 |
H. Peter Anvin | More \321 -> \324 |
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2007-05-30 |
H. Peter Anvin | MOV reg64,reg64 takes \324 (64 bit with REX) not \321... |
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2007-04-17 |
H. Peter Anvin | Handle "LOCK as REX.R" for MOV CRx; fix warning for... |
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2007-04-16 |
Keith Kanios | MEM_OFFSET Instructions Fixed. |
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2007-04-16 |
Keith Kanios | Fixed long mode MEM_OFFS issue. |
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2007-04-16 |
H. Peter Anvin | More \321 -> \324 for 64-bit instructions |
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2007-04-16 |
H. Peter Anvin | More 64-bit ndisasm fixes. |
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2007-04-16 |
H. Peter Anvin | Fixes for 64-bit ndisasm. |
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2007-04-15 |
H. Peter Anvin | CR8 is not special in any way as far as the assembler... |
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2007-04-12 |
Keith Kanios | General push for x86-64 support, dubbed 0.99.00. |
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2006-03-02 |
Eric Christopher | Add VMX instructions. |
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2003-09-02 |
H. Peter Anvin | STR also has SMSW/SLDT-like semantics for operand size |
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2003-08-27 |
H. Peter Anvin | SMSW and SLDT are implicitly 16 bits when accessing... |
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2003-03-12 |
H. Peter Anvin | Add Cyrix XSTORE |
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2003-02-24 |
H. Peter Anvin | Add support for the new instructions in Prescott |
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2003-02-04 |
Frank Kotler | bugfixes to insns.dat pmovhps, pmovlps, sysexit |
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2002-11-08 |
H. Peter Anvin | Fix bug 615409 (UNPCKHPD xmmreg,mem not vice versa) |
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2002-06-07 |
Debbie Wiles | Removed unnecessary address size flags from register... |
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2002-06-06 |
H. Peter Anvin | This is the "megapatch": |
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2002-05-28 |
H. Peter Anvin | Add the JMPE instruction. |
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2002-05-27 |
H. Peter Anvin | Deal with another case of address/operand size confusio... |
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2002-05-10 |
Debbie Wiles | *** empty log message *** |
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2002-05-09 |
Debbie Wiles | *** empty log message *** |
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2002-05-09 |
H. Peter Anvin | Processor level fixes from John Coffman |
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2002-04-30 |
H. Peter Anvin | NASM 0.98.30 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98.25alt |
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2002-04-30 |
H. Peter Anvin | NASM 0.98.25 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98.23 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98.21 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98.12 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98.11 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98.09 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98.08 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98.03 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98p7 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98p6 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98p3.6 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98p3.5 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98p3.3 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98p3.2 |
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2002-04-30 |
H. Peter Anvin | NASM 0.98p3-hpa |
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2002-04-30 |
H. Peter Anvin | NASM 0.98p3 |
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2002-04-30 |
H. Peter Anvin | NASM 0.96 |
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2002-04-30 |
H. Peter Anvin | NASM 0.94 |
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2002-04-30 |
H. Peter Anvin | NASM 0.93 |
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2002-04-30 |
H. Peter Anvin | NASM 0.91 |
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