Fix bug when generating REL type relocs for assembler generated build notes.
[external/binutils.git] / include / opcode /
2019-07-01 Matthew Malcomson[gas][aarch64][SVE2] Fix pmull{t,b} requirement on...
2019-05-24 Peter BergnerPowerPC add initial -mfuture instruction support
2019-05-16 Andre Vieira[PATCH 1/57][Arm][GAS]: Add support for +mve and +mve.fp
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New sve_size_tsz_bhs iclass.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_Zm4_11_INDEX operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New sve_shift_tsz_bhsd iclass.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New sve_size_013 iclass.
2019-05-09 Matthew Malcomson[binutils][aarch64] New sve_size_bh iclass.
2019-05-09 Matthew Malcomson[binutils][aarch64] New sve_size_sd2 iclass.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_ADDR_ZX operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_Zm3_11_INDEX operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New iclass sve_size_hsd2.
2019-05-09 Matthew Malcomson[binutils][aarch64] Introduce SVE_IMM_ROT3 operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] SVE2 feature extension flags.
2019-05-06 Faraz ShahbazkerAdd load-link, store-conditional paired EVA instructions
2019-05-01 Sudakshina Das[BINUTILS, AArch64] Enable Transactional Memory Extension
2019-04-27 Andrew Bennett[MIPS] Add load-link, store-conditional paired instructions
2019-04-25 Maciej W. RozyckiMIPS/include: opcode/mips.h: Update stale comment for...
2019-04-15 Andre Vieira[binutils, ARM, 1/16] Add support for Armv8.1-M Mainlin...
2019-04-11 Sudakshina Das[BINUTILS, AArch64, 2/2] Update Store Allocation Tag...
2019-04-01 Andre Vieira[GAS, Arm] CLI with architecture sensitive extensions
2019-03-28 Alan ModraPR24390, Don't decode mtfsb field as a cr field
2019-01-31 Andreas KrebbelS/390: Implement instruction set extensions
2019-01-25 Sudi DasAArch64: Remove ldgv and stgv instructions from Armv8...
2019-01-05 Yoshinori SatoRX: include - Add RXv3 support.
2019-01-01 Alan ModraUpdate year range in copyright notice of binutils files
2018-12-28 Alan ModraPR24028, PPC_INT_FMT
2018-12-06 Alan ModraPowerPC @l, @h and @ha warnings, plus VLE e_li
2018-12-06 Andrew Burgessopcodes/riscv: Hide '.L0 ' fake symbols
2018-12-03 Jim WilsonRISC-V: Accept version, supervisor ext and more than...
2018-11-27 Jim WilsonRISC-V: Add .insn CA support.
2018-11-13 Thomas Preud'homme[ARM] Improve indentation of ARM architecture declarations
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 6/8] Add Tag getting instruction...
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 4/8] Add Tag setting instructions...
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 2/8] Add Tag generation instruction...
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 1/8] Add support for Memory Tagging...
2018-11-06 Sudakshina Das[BINUTILS, ARM] Add Armv8.5-A to select_arm_features...
2018-10-09 Sudakshina Das[PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instr...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5...
2018-10-05 Sudakshina Das[Arm, 3/3] Add Execution and Data Prediction instructio...
2018-10-05 Sudakshina Das[Arm, 2/3] Add instruction SB for AArch32
2018-10-05 Sudakshina Das[Arm, 1/3] Add -march=armv8.5-a and related internal...
2018-10-03 Tamar ChristinaAArch64: Add SVE constraints verifier.
2018-10-03 Tamar ChristinaAArch64: Refactor verifiers to make more general.
2018-10-03 Tamar ChristinaAArch64: Refactor err_type.
2018-10-03 Tamar ChristinaAArch64: Wire through instr_sequence
2018-10-03 Tamar ChristinaAArch64: Mark sve instructions that require MOVPRFX...
2018-10-02 Palmer DabbeltRISC-V: Add fence.tso instruction
2018-09-20 Nick CliftonAndes Technology has good news for you, we plan to...
2018-08-30 Jim WilsonRISC-V: Allow instruction require more than one extension
2018-08-29 Chenghua Xu[MIPS] Add Loongson 2K1000 proccessor support.
2018-08-29 Chenghua Xu[MIPS] Add Loongson 3A2000/3A3000 proccessor support.
2018-08-29 Chenghua Xu[MIPS] Add Loongson 3A1000 proccessor support.
2018-08-29 Chenghua Xu[MIPS/GAS] Add Loongson EXT2 Instructions support.
2018-08-29 Chenghua Xu[MIPS/GAS] Split Loongson EXT Instructions from loongson3a.
2018-08-29 Chenghua Xu[MIPS/GAS] Split Loongson CAM Instructions from loongson3a
2018-08-21 Alan ModraUse operand->extract to provide defaults for optional...
2018-08-18 John DarringtonS12Z: Move opcode header to public include directory.
2018-08-06 claziss[ARC] Update handling AUX-registers.
2018-07-30 Jim WilsonRISC-V: Set insn info fields correctly when disassembling.
2018-07-30 Andrew JennerAdd support for the C_SKY series of processors.
2018-07-26 Alex ChadwickPowerPC Improve support for Gekko & Broadway
2018-07-20 Chenghua XuMIPS/GAS: Split Loongson MMI Instructions from loongson...
2018-06-29 Tamar ChristinaFix AArch64 encodings for by element instructions.
2018-06-14 Faraz ShahbazkerMIPS: Add Global INValidate ASE support
2018-06-13 Scott EgertonMIPS: Add CRC ASE support
2018-05-21 Peter BergnerRemove fake operand handling for extended mnemonics.
2018-05-15 Tamar ChristinaImplement Read/Write constraints on system registers...
2018-05-15 Tamar ChristinaAllow non-fatal errors to be emitted and for disassembl...
2018-05-15 Tamar ChristinaModify AArch64 Assembly and disassembly functions to...
2018-05-15 Francois H. TheronFix error messages in the NFP sources when building...
2018-05-08 Jim WilsonRISC-V: Add missing hint instructions from RV128I.
2018-05-07 Peter BergnerCleanup ppc code dealing with opcode dumps.
2018-04-30 Francois H. TheronThis patch adds support to objdump for disassembly...
2018-04-16 Alan ModraRemove m88k support
2018-04-16 Alan ModraRemove i370 support
2018-04-16 Alan ModraRemove tahoe support
2018-04-11 Alan ModraRemove i860, i960, bout and aout-adobe targets
2018-03-28 Nick CliftonEnhance the AARCH64 assembler to support LDFF1xx instru...
2018-03-14 Jim WilsonRISC-V: Add .insn support.
2018-03-08 H.J. Lux86: Remove support for old (<= 2.8.1) versions of gcc
2018-02-27 Thomas Preud'homme[ARM] Remove ARM_FEATURE_COPY macro
2018-02-20 Maciej W. RozyckiMIPS16/opcodes: Free up `M' operand code
2018-01-04 Jim WilsonRISC-V: Add 2 missing privileged registers.
2018-01-03 Alan ModraUpdate year range in copyright notice of binutils files
2017-12-28 Jim WilsonRISC-V: Add missing privileged spec registers.
2017-12-19 Tamar ChristinaCorrect disassembly of dot product instructions.
2017-12-19 Tamar ChristinaAdd support for V_4B so we can properly reject it.
2017-12-01 Peter BergnerUse consistent types for holding instructions, instruct...
2017-11-16 Tamar ChristinaAdd new AArch64 FP16 FM{A|S} instructions.
2017-11-15 Tamar ChristinaSeparate the new FP16 instructions backported from...
next