gdb/riscv: Remove whitespace before #include line
[external/binutils.git] / gdb / riscv-tdep.c
2018-12-10 Andrew Burgessgdb/riscv: Remove whitespace before #include line
2018-12-05 Andrew Burgessgdb/riscv: Improve logic for when h/w float abi should...
2018-11-30 Andrew Burgessgdb/riscv: Add equality operators to riscv_gdb_features
2018-11-30 Andrew Burgessgdb/riscv: Make some target description functions constant
2018-11-21 Andrew Burgessgdb/riscv: Add target description support
2018-11-16 Alan HaywardPass return_method to _push_dummy_call
2018-11-14 Jim WilsonRISC-V: Fix unnamed arg alignment in registers.
2018-11-14 Jim WilsonRISC-V: Handle vector type alignment.
2018-11-14 Jim WilsonRISC-V: Give stack slots same align as XLEN.
2018-11-08 Andrew Burgessgdb/riscv: Handle errors while setting the frame id
2018-11-02 Jim WilsonRISC-V: Don't allow unaligned breakpoints.
2018-10-26 Jim WilsonRISC-V: Linux signal frame support.
2018-10-26 Andrew Burgessgdb/riscv: Remove redundant code, and catch more errors...
2018-10-23 Andrew Burgessgdb/riscv: Give user-friendly names for CSRs
2018-10-23 Joel Brobeckergdb/riscv: expect h/w watchpoints to trigger before...
2018-10-23 Andrew Burgessgdb/riscv: Fix register access for register aliases
2018-10-22 Jim WilsonRISC-V: NaN-box FP values smaller than an FP register.
2018-10-22 Jim WilsonRISC-V: Print FP regs as union of float types.
2018-10-05 Tom TromeySimple -Wshadow=local fixes
2018-09-28 John BaldwinUse the existing instruction to determine the RISC...
2018-09-26 Andrew Burgessgdb/riscv: Improve non-dwarf stack unwinding
2018-09-04 Andrew Burgessgdb/riscv: Fix an ARI warning
2018-09-03 Andrew Burgessgdb/riscv: Provide non-DWARF stack unwinder
2018-08-30 Andrew Burgessgdb/riscv: Extend instruction decode to cover more...
2018-08-30 Andrew Burgessgdb/riscv: remove extra caching of misa register
2018-08-08 Jim WilsonRISC-V: Add software single step support.
2018-08-08 Jim WilsonRISC-V: Make riscv_isa_xlen a global function.
2018-07-22 Tom TromeySimple unused variable removals
2018-07-17 Jim WilsonRISC-V: Don't decrement pc after break.
2018-07-16 Jim WilsonRISC-V: Add osabi support.
2018-07-10 Andrew Burgessgdb/riscv: Fix assertion in inferior call code
2018-07-10 Andrew Burgessgdb/riscv: Use TYPE_SAFE_NAME
2018-07-02 Sebastian Hubergdb: Prefer RISC-V register name "s0" over "fp"
2018-05-30 Simon MarchiRemove regcache_cooked_write
2018-05-30 Simon MarchiRemove regcache_cooked_read
2018-05-05 Tom TromeyFix "obvious" fall-through warnings
2018-03-19 Tom TromeyConvert observers to C++
2018-03-12 Andrew Burgessgdb/riscv: Fix some ARI issues
2018-03-06 Andrew Burgessgdb/riscv: Remove partial target description support
2018-03-06 Andrew Burgessgdb/riscv: Remove 'Contributed by....' comments
2018-03-06 Andrew Burgessgdb/riscv: Remove use of pseudo registers
2018-03-06 Andrew Burgessgdb/riscv: Fix type when reading register from regcache
2018-03-06 Andrew Burgessgdb/riscv: Additional print format string fixes
2018-03-06 Andrew Burgessgdb/riscv: Fixes to printf format strings
2018-03-06 Andrew Burgessgdb: Initial baremetal riscv support