2022-12-29 |
Tsukasa OI | RISC-V: Simplify riscv_csr_address logic on state enabl... |
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2022-12-14 |
Li Xu | RISC-V: Add string length check for operands in AS |
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2022-11-28 |
Tsukasa OI | RISC-V: Better support for long instructions (assembler) |
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2022-11-25 |
Christoph Müllner | riscv: Add AIA extension support (Smaia, Ssaia) |
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2022-11-19 |
Tsukasa OI | RISC-V: Add 'Ssstateen' extension and its CSRs |
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2022-11-02 |
Nelson Chu | RISC-V: Fixed the missing $x+arch when adding odd paddi... |
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2022-10-29 |
Nelson Chu | RISC-V: Always generate mapping symbols at the start... |
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2022-10-28 |
Tsukasa OI | RISC-V: Improve "bits undefined" diagnostics |
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2022-10-28 |
Tsukasa OI | RISC-V: Fallback for instructions longer than 64b |
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2022-10-28 |
Jan Beulich | RISC-V/gas: fix build with certain gcc versions |
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2022-10-28 |
Tsukasa OI | RISC-V: Fix build failure for -Werror=maybe-uninitialized |
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2022-10-28 |
Nelson Chu | RISC-V: Output mapping symbols with ISA string. |
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2022-10-04 |
Jan Beulich | RISC-V/gas: allow generating up to 176-bit instructions... |
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2022-10-04 |
Jan Beulich | RISC-V/gas: don't open-code insn_length() |
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2022-10-04 |
Jan Beulich | RISC-V/gas: drop stray call to install_insn() |
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2022-10-04 |
Jan Beulich | RISC-V/gas: drop riscv_subsets static variable |
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2022-10-04 |
Jan Beulich | RISC-V: don't cast expressions' X_add_number to long... |
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2022-10-03 |
Tsukasa OI | RISC-V: Assign DWARF numbers to vector registers |
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2022-09-30 |
Christoph Müllner | RISC-V: Eliminate long-casts of X_add_number in diagnostics |
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2022-09-30 |
Jan Beulich | RISC-V: fix build after "Add support for arbitrary... |
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2022-09-22 |
Christoph Müllner | RISC-V: Add support for literal instruction arguments |
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2022-09-22 |
Christoph Müllner | RISC-V: Add support for arbitrary immediate encoding... |
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2022-09-22 |
Tsukasa OI | RISC-V: Add macro-only operands to validate_riscv_insn |
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2022-09-21 |
Tsukasa OI | RISC-V: Fix riscv_set_tso declaration |
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2022-09-21 |
Tsukasa OI | RISC-V: Set EF_RISCV_TSO also on .option arch |
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2022-09-21 |
Shihua | RISC-V: Implement Ztso extension |
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2022-09-21 |
Nelson Chu | RISC-V: Always generate R_RISCV_CALL_PLT reloc for... |
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2022-09-15 |
Tsukasa OI | bfd, binutils, gas: Remove/mark unused variables |
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2022-09-09 |
Tsukasa OI | RISC-V: Fix vector CSR requirements |
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2022-08-04 |
Alan Modra | Don't use BFD_VMA_FMT in binutils |
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2022-07-29 |
Tsukasa OI | RISC-V: Add `OP_V' to .insn named opcodes |
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2022-07-09 |
Alan Modra | gas: target string hash tables |
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2022-07-09 |
Alan Modra | gas: rename md_end to md_finish |
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2022-06-28 |
Tsukasa OI | RISC-V: Add 'Sstc' extension and its CSRs |
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2022-06-28 |
Tsukasa OI | RISC-V: Add 'Sscofpmf' extension with its CSRs |
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2022-06-28 |
Tsukasa OI | RISC-V: Add 'Smstateen' extension and its CSRs |
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2022-06-28 |
Tsukasa OI | RISC-V: Add new CSR feature gate handling (RV32,H) |
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2022-06-22 |
Nelson Chu | RISC-V: Use single h extension to control hypervisor... |
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2022-06-22 |
Tsukasa OI | RISC-V: Fix inconsistent error message (range) |
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2022-05-17 |
Nelson Chu | RISC-V: Added half-precision floating-point v1.0 instru... |
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2022-04-08 |
Fangrui Song | gas: Port "copy st_size only if unset" to aarch64 and... |
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2022-03-18 |
Tsukasa OI | RISC-V: Prefetch hint instructions and operand set |
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2022-03-04 |
Jan Beulich | RISC-V: make .insn actually work for 64-bit insns |
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2022-02-23 |
Patrick O'Neill | RISC-V: PR28733, add missing extension info to 'unrecog... |
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2022-02-23 |
Patrick O'Neill | RISC-V: PR28733, add missing extension info to 'invalid... |
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2022-01-22 |
Lifang Xia | RISC-V: create new frag after alignment. |
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2022-01-07 |
Philipp Tomsich | RISC-V: update docs for -mpriv-spec/--with-priv-spec... |
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2022-01-07 |
Nelson Chu | RISC-V: Updated the default ISA spec to 20191213. |
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2022-01-02 |
Alan Modra | Update year range in copyright notice of binutils files |
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2021-12-24 |
Vineet Gupta | RISC-V: Hypervisor ext: support Privileged Spec 1.12 |
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2021-11-22 |
Nelson Chu | RISC-V: Replace .option rvc/norvc with .option arch... |
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2021-11-19 |
Nelson Chu | RISC-V: Support new .option arch directive. |
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2021-11-19 |
Nelson Chu | RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIA... |
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2021-11-18 |
jiawei | RISC-V: Add instructions and operand set for z[fdq]inx |
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2021-11-17 |
Nelson Chu | RISC-V: Support rvv extension with released version... |
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2021-11-16 |
jiawei | RISC-V: Scalar crypto instructions and operand set. |
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2021-11-11 |
Nelson Chu | RISC-V: Dump objects according to the elf architecture... |
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2021-11-04 |
Nelson Chu | RISC-V: Clarify the behavior of .option rvc or norvc. |
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2021-10-27 |
Nelson Chu | RISC-V: Tidy riscv assembler and disassembler. |
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2021-10-07 |
Philipp Tomsich | RISC-V: Add support for Zbs instructions |
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2021-09-17 |
Nelson Chu | RISC-V: Merged extension string tables and their versio... |
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2021-08-31 |
Nelson Chu | RISC-V: Extend .insn directive to support hardcode... |
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2021-08-30 |
Nelson Chu | RISC-V: PR27916, Support mapping symbols. |
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2021-07-21 |
Alan Modra | as_bad_subtract |
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2021-07-06 |
Yuri Chornoivan | PR 28053: Fix spelling mistakes: usupported -> unsuppor... |
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2021-06-11 |
Nelson Chu | RISC-V: Update the riscv_opts.[rvc|rve] in the riscv_se... |
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2021-05-26 |
Nelson Chu | RISC-V: Allow to link the objects with unknown prefixed... |
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2021-05-24 |
Nelson Chu | RISC-V: PR25212, Report errors for invalid march and... |
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2021-04-16 |
Nelson Chu | RISC-V: PR27436, make operand C> work the same as >. |
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2021-03-31 |
Alan Modra | Use bool in gas |
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2021-03-16 |
Kuan-Lin Chen | RISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructions |
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2021-02-19 |
Nick Clifton | Fix compile time warnings when building riscv assembler. |
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2021-02-19 |
Nelson Chu | RISC-V: PR27158, fixed UJ/SB types and added CSS/CL... |
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2021-02-18 |
Nelson Chu | RISC-V: Add bfd/cpu-riscv.h to support all spec version... |
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2021-02-04 |
Nelson Chu | RISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instruct... |
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2021-01-15 |
Nelson Chu | RISC-V: Indent and GNU coding standards tidy, also... |
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2021-01-15 |
Nelson Chu | RISC-V: Error and warning messages tidy. |
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2021-01-15 |
Nelson Chu | RISC-V: Comments tidy and improvement. |
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2021-01-07 |
Philipp Tomsich | RISC-V: Add pause hint instruction. |
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2021-01-07 |
Claire Xenia Wolf | RISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instr... |
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2021-01-06 |
Marcus Comstedt | RISC-V: Implement support for big endian targets. |
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2021-01-01 |
Alan Modra | PR27116, Spelling errors found by Debian style checker |
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2021-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
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2020-12-10 |
Nelson Chu | RISC-V: Add sext.[bh] and zext.[bhw] pseudo instructions. |
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2020-12-10 |
Nelson Chu | RISC-V: Control fence.i and csr instructions by zifence... |
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2020-12-01 |
Nelson Chu | RISC-V: Support to add implicit extensions. |
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2020-12-01 |
Nelson Chu | RISC-V: Improve the version parsing for arch string. |
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2020-11-09 |
Nelson Chu | RISC-V: Update ABI to the elf_flags after parsing elf... |
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2020-09-24 |
Jim Wilson | RISC-V: Error for relaxable branch in absolute section. |
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2020-09-21 |
Alan Modra | PR26569, R_RISCV_RVC_JUMP results in buffer overflow |
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2020-08-31 |
Alan Modra | PR26493 UBSAN: tc-riscv.c left shift negative and not... |
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2020-08-23 |
Alan Modra | PR26513, 629310abec breaks assembling PowerPC Linux... |
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2020-08-21 |
Alan Modra | Rearrange symbol_create parameters |
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2020-08-20 |
Martin Liska | Port gas/config/* to str_htab. |
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2020-07-06 |
Nick Clifton | Fix spelling mistakes in some of the binutils sub-direc... |
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2020-06-30 |
Nelson Chu | RISC-V: Support debug and float CSR as the unprivileged... |
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2020-06-23 |
Nelson Chu | RISC-V: Generate ELF priv attributes if priv instructio... |
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2020-06-22 |
Nelson Chu | RISC-V: Report warning when linking the objects with... |
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2020-06-05 |
Nelson Chu | RISC-V: Don't generate the ELF privilege attributes... |
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2020-05-27 |
Simon Cook | RISC-V: Fix missing initialization of riscv_csr_extra... |
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