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fsl-ddr: use the 1T timing as default configuration
[platform/kernel/u-boot.git] / cpu / mpc8xxx / ddr / options.c
2009-01-23 Dave Liufsl-ddr: use the 1T timing as default configuration blob | commitdiff
2008-12-04 Wolfgang DenkMerge branch 'master' of git://git.denx.de/u-boot-at91 blob | commitdiff | diff to current
2008-12-04 Wolfgang DenkMerge branch 'master' of git://git.denx.de/u-boot-usb blob | commitdiff | diff to current
2008-12-04 Wolfgang DenkMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx blob | commitdiff | diff to current
2008-12-04 Ed Swarthoutfsl ddr skip interleaving if not supported. blob | commitdiff | diff to current
2008-10-21 Stefan RoeseMerge branch 'master' of /home/stefan/git/u-boot/u... blob | commitdiff | diff to current
2008-10-21 Markus KlotzbuecherMerge git://git.denx.de/u-boot into x1 blob | commitdiff | diff to current
2008-10-18 Wolfgang DenkMerge 'next' branch blob | commitdiff | diff to current
2008-10-18 Haiying WangCheck DDR interleaving mode blob | commitdiff | diff to current
2008-10-18 Haiying WangPass dimm parameters to populate populate controller... blob | commitdiff | diff to current
2008-08-27 Kumar GalaFSL DDR: Rewrite the FSL mpc8xxx DDR controller setup... blob | commitdiff | diff to current
Domain: System / Kernel;