From: Jaehoon Chung Date: Tue, 25 Jul 2023 21:32:45 +0000 (+0900) Subject: Revert "riscv: fix riscv64 unrecognized opcode build error" X-Git-Tag: accepted/tizen/unified/riscv/20230730.231938~2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=refs%2Fchanges%2F30%2F296330%2F1;p=platform%2Fkernel%2Flinux-starfive.git Revert "riscv: fix riscv64 unrecognized opcode build error" Since using gcc13 to build Tizen RISCV, this patch doesn't need anymore. This reverts commit e6c19c8fe08eb4375c7f5da1d7004ae4c533d615. Change-Id: Iea9421a0c53ac3f9a9d9a8942dbf5a1521b91665 --- diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 4114bdaa302d..3cb876f83187 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -55,7 +55,6 @@ endif riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd -riscv-march-y := $(subst imafd,g,$(riscv-march-y)) riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC