From: Jay Foad <jay.foad@amd.com>
Date: Mon, 27 Mar 2023 12:29:00 +0000 (+0100)
Subject: [MC] Quick fix for Windows build failures after D142218
X-Git-Tag: upstream/17.0.6~13590
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ffab44bd960c6392a0ed1f945cc145a2a2643c8c;p=platform%2Fupstream%2Fllvm.git

[MC] Quick fix for Windows build failures after D142218
---

diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 806ee70..ace2891 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -70,7 +70,12 @@
 using namespace llvm;
 
 namespace llvm {
-extern const MCInstrDesc ARMDescs[];
+struct ARMInstrTable {
+  MCInstrDesc Insts[4445];
+  MCOperandInfo OperandInfo[3026];
+  MCPhysReg ImplicitOps[130];
+};
+extern const ARMInstrTable ARMDescs;
 } // end namespace llvm
 
 namespace {
@@ -2504,7 +2509,7 @@ public:
     } else {
       unsigned NextOpIndex = Inst.getNumOperands();
       const MCInstrDesc &MCID =
-          ARMDescs[ARM::INSTRUCTION_LIST_END - 1 - Inst.getOpcode()];
+          ARMDescs.Insts[ARM::INSTRUCTION_LIST_END - 1 - Inst.getOpcode()];
       int TiedOp = MCID.getOperandConstraint(NextOpIndex, MCOI::TIED_TO);
       assert(TiedOp >= 0 &&
              "Inactive register in vpred_r is not tied to an output!");