From: Mikhail Skvortcov Date: Tue, 25 Apr 2017 12:04:03 +0000 (+0300) Subject: RyuJIT/ARM32: Update GT_LCL_FLD codegen. X-Git-Tag: submit/tizen/20210909.063632~11030^2~7130^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ff4e4d10604ba8f7df17a64ee7c0e490b50c7f60;p=platform%2Fupstream%2Fdotnet%2Fruntime.git RyuJIT/ARM32: Update GT_LCL_FLD codegen. Commit migrated from https://github.com/dotnet/coreclr/commit/643c7e699ad9d8786c14a46116f13bedc7972918 --- diff --git a/src/coreclr/src/jit/codegenarm.cpp b/src/coreclr/src/jit/codegenarm.cpp index 81ba35e..d40921b 100644 --- a/src/coreclr/src/jit/codegenarm.cpp +++ b/src/coreclr/src/jit/codegenarm.cpp @@ -491,7 +491,21 @@ void CodeGen::genCodeForTreeNode(GenTreePtr treeNode) unsigned varNum = treeNode->gtLclVarCommon.gtLclNum; assert(varNum < compiler->lvaCount); - emit->emitIns_R_S(ins_Move_Extend(targetType, treeNode->InReg()), size, targetReg, varNum, offs); + if (varTypeIsFloating(targetType)) + { + if (treeNode->InReg()) + { + NYI("GT_LCL_FLD with reg-to-reg floating point move"); + } + else + { + emit->emitIns_R_S(ins_Load(targetType), size, targetReg, varNum, offs); + } + } + else + { + emit->emitIns_R_S(ins_Move_Extend(targetType, treeNode->InReg()), size, targetReg, varNum, offs); + } } genProduceReg(treeNode); break;