From: Vignesh R Date: Fri, 22 Jul 2016 05:25:50 +0000 (+0530) Subject: spi: ti_qspi: Remove delay in read path for dra7xx X-Git-Tag: v2016.09-rc2~170 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fee3b6af903c0e24b662694427b62658f40c7d4b;p=platform%2Fkernel%2Fu-boot.git spi: ti_qspi: Remove delay in read path for dra7xx As per commit b545a98f5dc563 ("spi: ti_qspi: Add delay for successful bulk erase) says its added to meet bulk erase timing constraints. But bulk erase is a cmd to flash and delay in read path does not make sense. Morever, testing on DRA74/DRA72 evm has shown that this delay is no longer required. Signed-off-by: Vignesh R Reviewed-by: Jagan Teki Reviewed-by: Mugunthan V N --- diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 56ae29a..fa7ee22 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -249,9 +249,6 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, if (rxp) { debug("rx cmd %08x dc %08x\n", ((u32)(priv->cmd | QSPI_RD_SNGL)), priv->dc); - #ifdef CONFIG_DRA7XX - udelay(500); - #endif writel(priv->cmd | QSPI_RD_SNGL, &priv->base->cmd); status = readl(&priv->base->status); timeout = QSPI_TIMEOUT;