From: Ben Widawsky Date: Sun, 24 Mar 2013 00:46:31 +0000 (-0700) Subject: drm/i915: Don't overclock on Haswell X-Git-Tag: accepted/tizen/20130614.181726~2^2~350 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fec46b5eff854df5647a9f4724e45dd33933855a;p=profile%2Fivi%2Fkernel-x86-ivi.git drm/i915: Don't overclock on Haswell HSW doesn't overclock the same way as IVB or SNB. I do not know about VLV, so I've kept that off as well. I'm still working on getting the doc updates to explain how we overclock on Haswell. Cc: Jesse Barnes Signed-off-by: Ben Widawsky Reviewed-by: Jesse Barnes [danvet: Add missing () spotted by Wu Fengguang's kernel build robot. Acked by Ben.] Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ce3db2c..6fa9b79 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2628,7 +2628,7 @@ static void gen6_enable_rps(struct drm_device *dev) (IS_HASWELL(dev) ? GEN7_RP_DOWN_IDLE_AVG : GEN6_RP_DOWN_IDLE_CONT)); ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_MIN_FREQ_TABLE, 0); - if (!ret) { + if (!ret && (IS_GEN6(dev) || IS_IVYBRIDGE(dev))) { pcu_mbox = 0; ret = sandybridge_pcode_read(dev_priv, GEN6_READ_OC_PARAMS, &pcu_mbox); if (!ret && (pcu_mbox & (1<<31))) { /* OC supported */