From: Alyssa Rosenzweig Date: Tue, 23 May 2023 18:46:18 +0000 (-0400) Subject: nir: Remove nir_register-based unit tests X-Git-Tag: upstream/23.3.3~5758 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fded7e7b66ef33ef6d96ccdcef66a0d0e0c475a2;p=platform%2Fupstream%2Fmesa.git nir: Remove nir_register-based unit tests Non-SSA functionality will become obsolete after nir_register is removed, so there's no need to keep the tests around, and they will interfere with the nir_register de-clawing. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Faith Ekstrand Part-of: --- diff --git a/src/compiler/nir/tests/negative_equal_tests.cpp b/src/compiler/nir/tests/negative_equal_tests.cpp index 17d341a73d0..5daaaf1f24c 100644 --- a/src/compiler/nir/tests/negative_equal_tests.cpp +++ b/src/compiler/nir/tests/negative_equal_tests.cpp @@ -296,23 +296,6 @@ TEST_F(alu_srcs_negative_equal_test, swizzle_scalar_to_vector) EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1)); } -TEST_F(alu_srcs_negative_equal_test, unused_components_mismatch) -{ - nir_ssa_def *v1 = nir_imm_vec4(&bld, -2.0, 18.0, 43.0, 1.0); - nir_ssa_def *v2 = nir_imm_vec4(&bld, 2.0, 99.0, 76.0, -1.0); - - nir_ssa_def *result = nir_fadd(&bld, v1, v2); - - nir_alu_instr *instr = nir_instr_as_alu(result->parent_instr); - - /* Disable the channels that aren't negations of each other. */ - nir_register *reg = nir_local_reg_create(bld.impl); - nir_instr_rewrite_dest(&instr->instr, &instr->dest.dest, nir_dest_for_reg(reg)); - instr->dest.write_mask = 8 + 1; - - EXPECT_TRUE(nir_alu_srcs_negative_equal(instr, instr, 0, 1)); -} - static void count_sequence(nir_const_value c[NIR_MAX_VEC_COMPONENTS], nir_alu_type full_type, int first) diff --git a/src/compiler/nir/tests/serialize_tests.cpp b/src/compiler/nir/tests/serialize_tests.cpp index c96752f12f3..6b99426a859 100644 --- a/src/compiler/nir/tests/serialize_tests.cpp +++ b/src/compiler/nir/tests/serialize_tests.cpp @@ -184,89 +184,6 @@ TEST_P(nir_serialize_all_test, alu_two_components_full_swizzle) ASSERT_SWIZZLE_EQ(fma_alu, fma_alu_dup, GetParam(), 2); } -TEST_P(nir_serialize_all_but_one_test, alu_two_components_reg_two_swizzle) -{ - nir_ssa_def *undef = nir_ssa_undef(b, 2, 32); - nir_ssa_def *fma = nir_ffma(b, undef, undef, undef); - nir_alu_instr *fma_alu = nir_instr_as_alu(fma->parent_instr); - - memset(fma_alu->src[0].swizzle, 1, GetParam()); - memset(fma_alu->src[1].swizzle, 1, GetParam()); - memset(fma_alu->src[2].swizzle, 1, GetParam()); - - ASSERT_TRUE(nir_convert_from_ssa(b->shader, false, false)); - - fma_alu = get_last_alu(b->shader); - ASSERT_FALSE(fma_alu->dest.dest.is_ssa); - fma_alu->dest.dest.reg.reg->num_components = GetParam(); - fma_alu->dest.write_mask = 1 | (1 << (GetParam() - 1)); - - serialize(); - - nir_alu_instr *fma_alu_dup = get_last_alu(dup); - - ASSERT_EQ(fma_alu->src[0].swizzle[0], fma_alu_dup->src[0].swizzle[0]); - ASSERT_EQ(fma_alu->src[0].swizzle[GetParam() - 1], fma_alu_dup->src[0].swizzle[GetParam() - 1]); - ASSERT_EQ(fma_alu->src[1].swizzle[0], fma_alu_dup->src[1].swizzle[0]); - ASSERT_EQ(fma_alu->src[1].swizzle[GetParam() - 1], fma_alu_dup->src[1].swizzle[GetParam() - 1]); - ASSERT_EQ(fma_alu->src[2].swizzle[0], fma_alu_dup->src[2].swizzle[0]); - ASSERT_EQ(fma_alu->src[2].swizzle[GetParam() - 1], fma_alu_dup->src[2].swizzle[GetParam() - 1]); -} - -TEST_P(nir_serialize_all_but_one_test, alu_full_width_reg_two_swizzle) -{ - nir_ssa_def *undef = nir_ssa_undef(b, GetParam(), 32); - nir_ssa_def *fma = nir_ffma(b, undef, undef, undef); - nir_alu_instr *fma_alu = nir_instr_as_alu(fma->parent_instr); - - memset(fma_alu->src[0].swizzle, GetParam() - 1, GetParam()); - memset(fma_alu->src[1].swizzle, GetParam() - 1, GetParam()); - memset(fma_alu->src[2].swizzle, GetParam() - 1, GetParam()); - - ASSERT_TRUE(nir_convert_from_ssa(b->shader, false, false)); - - fma_alu = get_last_alu(b->shader); - ASSERT_FALSE(fma_alu->dest.dest.is_ssa); - fma_alu->dest.write_mask = 1 | (1 << (GetParam() - 1)); - - serialize(); - - nir_alu_instr *fma_alu_dup = get_last_alu(dup); - - ASSERT_EQ(fma_alu->src[0].swizzle[0], fma_alu_dup->src[0].swizzle[0]); - ASSERT_EQ(fma_alu->src[0].swizzle[GetParam() - 1], fma_alu_dup->src[0].swizzle[GetParam() - 1]); - ASSERT_EQ(fma_alu->src[1].swizzle[0], fma_alu_dup->src[1].swizzle[0]); - ASSERT_EQ(fma_alu->src[1].swizzle[GetParam() - 1], fma_alu_dup->src[1].swizzle[GetParam() - 1]); - ASSERT_EQ(fma_alu->src[2].swizzle[0], fma_alu_dup->src[2].swizzle[0]); - ASSERT_EQ(fma_alu->src[2].swizzle[GetParam() - 1], fma_alu_dup->src[2].swizzle[GetParam() - 1]); -} - -TEST_P(nir_serialize_all_but_one_test, alu_two_component_reg_full_src) -{ - nir_ssa_def *undef = nir_ssa_undef(b, GetParam(), 32); - nir_ssa_def *fma = nir_ffma(b, undef, undef, undef); - nir_alu_instr *fma_alu = nir_instr_as_alu(fma->parent_instr); - - memset(fma_alu->src[0].swizzle, 1, GetParam()); - memset(fma_alu->src[1].swizzle, 1, GetParam()); - memset(fma_alu->src[2].swizzle, 1, GetParam()); - - ASSERT_TRUE(nir_convert_from_ssa(b->shader, false, false)); - - fma_alu = get_last_alu(b->shader); - ASSERT_FALSE(fma_alu->dest.dest.is_ssa); - fma_alu->dest.dest.reg.reg->num_components = 2; - fma_alu->dest.write_mask = 0x3; - - serialize(); - - nir_alu_instr *fma_alu_dup = get_last_alu(dup); - - ASSERT_SWIZZLE_EQ(fma_alu, fma_alu_dup, 2, 0); - ASSERT_SWIZZLE_EQ(fma_alu, fma_alu_dup, 2, 1); - ASSERT_SWIZZLE_EQ(fma_alu, fma_alu_dup, 2, 2); -} - TEST_P(nir_serialize_all_but_one_test, single_channel) { nir_ssa_def *zero = nir_ssa_undef(b, GetParam(), 32);