From: David Howells Date: Thu, 11 Jun 2009 12:08:32 +0000 (+0100) Subject: MN10300: Don't set the dirty bit in the DTLB entries in the TLB-miss handler X-Git-Tag: v3.0~9039^3~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fd4f683d045e053abb093f80d81afce30ceadad2;p=platform%2Fkernel%2Flinux-amlogic.git MN10300: Don't set the dirty bit in the DTLB entries in the TLB-miss handler Remove the special handling for the Data TLB entry dirty bit in the TLB-miss handler. As the code stands, all that it does is to cause us to take a second data address exception to set the dirty bit. Instead, we can just let pte_mkdirty() set the bit. Signed-off-by: David Howells Signed-off-by: Linus Torvalds --- diff --git a/arch/mn10300/mm/tlb-mn10300.S b/arch/mn10300/mm/tlb-mn10300.S index 7892080..7095147 100644 --- a/arch/mn10300/mm/tlb-mn10300.S +++ b/arch/mn10300/mm/tlb-mn10300.S @@ -165,24 +165,6 @@ ENTRY(itlb_aerror) ENTRY(dtlb_aerror) and ~EPSW_NMID,epsw add -4,sp - mov d1,(sp) - - movhu (MMUFCR_DFC),d1 # is it the initial valid write - # to this page? - and MMUFCR_xFC_INITWR,d1 - beq dtlb_pagefault # jump if not - - mov (DPTEL),d1 # set the dirty bit - # (don't replace with BSET!) - or _PAGE_DIRTY,d1 - mov d1,(DPTEL) - mov (sp),d1 - add 4,sp - rti - - ALIGN -dtlb_pagefault: - mov (sp),d1 SAVE_ALL add -4,sp # need to pass three params