From: Bin Meng <bin.meng@windriver.com>
Date: Tue, 23 Jun 2020 05:29:44 +0000 (-0700)
Subject: riscv: Do not build reset.c if SYSRESET is on
X-Git-Tag: v2020.10~143^2~6
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fd31e4fd184f9c203d16efed465e4ddeca1a79eb;p=platform%2Fkernel%2Fu-boot.git

riscv: Do not build reset.c if SYSRESET is on

SYSRESET uclass driver already provides all the reset APIs, hence
exclude our own ad-hoc reset.c implementation.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
---

diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index b5e9324..6c503ff 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -20,7 +20,9 @@ obj-$(CONFIG_SBI) += sbi.o
 obj-$(CONFIG_SBI_IPI) += sbi_ipi.o
 endif
 obj-y	+= interrupts.o
+ifeq ($(CONFIG_$(SPL_)SYSRESET),)
 obj-y	+= reset.o
+endif
 obj-y   += setjmp.o
 obj-$(CONFIG_$(SPL_)SMP) += smp.o
 obj-$(CONFIG_SPL_BUILD)	+= spl.o