From: Georg-Johann Lay Date: Fri, 9 Sep 2011 17:00:26 +0000 (+0000) Subject: re PR target/49030 (ICE in get_arm_condition_code, at config/arm/arm.c:17180) X-Git-Tag: upstream/12.2.0~81420 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fcd682311e37fa061ee9e7dc0312f88571166bf5;p=platform%2Fupstream%2Fgcc.git re PR target/49030 (ICE in get_arm_condition_code, at config/arm/arm.c:17180) PR target/49030 * gcc.dg/torture/pr49030.c: Run only if target int32plus. From-SVN: r178736 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e92f513..44ffee1 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2011-09-09 Georg-Johann Lay + + PR target/49030 + * gcc.dg/torture/pr49030.c: Run only if target int32plus. + 2011-09-09 Iain Sandoe PR target/49614 diff --git a/gcc/testsuite/gcc.dg/torture/pr49030.c b/gcc/testsuite/gcc.dg/torture/pr49030.c index 4b078a9..edd0c36 100644 --- a/gcc/testsuite/gcc.dg/torture/pr49030.c +++ b/gcc/testsuite/gcc.dg/torture/pr49030.c @@ -1,3 +1,5 @@ +/* { dg-require-effective-target int32plus } */ + void sample_move_d32u24_sS (char *dst, float *src, unsigned long nsamples, unsigned long dst_skip)