From: Craig Topper <craig.topper@intel.com>
Date: Mon, 26 Mar 2018 04:20:36 +0000 (+0000)
Subject: [X86] Add itinerary to intrinsic version of sqrtss, rcpss, and rsqrtss instructions.
X-Git-Tag: llvmorg-7.0.0-rc1~9678
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fbf2d850e3e01781f8fb3d93ae03034f70a6144e;p=platform%2Fupstream%2Fllvm.git

[X86] Add itinerary to intrinsic version of sqrtss, rcpss, and rsqrtss instructions.

llvm-svn: 328472
---

diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td
index 3ea9dd8..b32808f 100644
--- a/llvm/lib/Target/X86/X86InstrSSE.td
+++ b/llvm/lib/Target/X86/X86InstrSSE.td
@@ -3149,11 +3149,11 @@ multiclass sse_fp_unop_s<bits<8> opc, string OpcodeStr, RegisterClass RC,
   let isCodeGenOnly = 1, Constraints = "$src1 = $dst", ExeDomain = d in {
   def r_Int : I<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
               !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
-            []>, Sched<[itins.Sched.Folded, ReadAfterLd]>;
+            [], itins.rr>, Sched<[itins.Sched.Folded, ReadAfterLd]>;
   let mayLoad = 1 in
   def m_Int : I<opc, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, intmemop:$src2),
               !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
-            []>, Sched<[itins.Sched.Folded, ReadAfterLd]>;
+            [], itins.rm>, Sched<[itins.Sched.Folded, ReadAfterLd]>;
   }
   }
 
diff --git a/llvm/test/CodeGen/X86/sse-schedule.ll b/llvm/test/CodeGen/X86/sse-schedule.ll
index f75bdcc..c805a54 100644
--- a/llvm/test/CodeGen/X86/sse-schedule.ll
+++ b/llvm/test/CodeGen/X86/sse-schedule.ll
@@ -4264,8 +4264,8 @@ define <4 x float> @test_rcpss(float %a0, float *%a1) {
 ; ATOM-LABEL: test_rcpss:
 ; ATOM:       # %bb.0:
 ; ATOM-NEXT:    movss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [1:1.00]
-; ATOM-NEXT:    rcpss %xmm0, %xmm0 # sched: [0:?]
-; ATOM-NEXT:    rcpss %xmm1, %xmm1 # sched: [0:?]
+; ATOM-NEXT:    rcpss %xmm0, %xmm0 # sched: [4:4.00]
+; ATOM-NEXT:    rcpss %xmm1, %xmm1 # sched: [4:4.00]
 ; ATOM-NEXT:    addps %xmm1, %xmm0 # sched: [5:5.00]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;
@@ -4541,8 +4541,8 @@ define <4 x float> @test_rsqrtss(float %a0, float *%a1) {
 ; ATOM-LABEL: test_rsqrtss:
 ; ATOM:       # %bb.0:
 ; ATOM-NEXT:    movss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [1:1.00]
-; ATOM-NEXT:    rsqrtss %xmm0, %xmm0 # sched: [0:?]
-; ATOM-NEXT:    rsqrtss %xmm1, %xmm1 # sched: [0:?]
+; ATOM-NEXT:    rsqrtss %xmm0, %xmm0 # sched: [4:4.00]
+; ATOM-NEXT:    rsqrtss %xmm1, %xmm1 # sched: [4:4.00]
 ; ATOM-NEXT:    addps %xmm1, %xmm0 # sched: [5:5.00]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;
@@ -5039,8 +5039,8 @@ define <4 x float> @test_sqrtss(<4 x float> %a0, <4 x float> *%a1) {
 ; ATOM-LABEL: test_sqrtss:
 ; ATOM:       # %bb.0:
 ; ATOM-NEXT:    movaps (%rdi), %xmm1 # sched: [1:1.00]
-; ATOM-NEXT:    sqrtss %xmm0, %xmm0 # sched: [0:?]
-; ATOM-NEXT:    sqrtss %xmm1, %xmm1 # sched: [0:?]
+; ATOM-NEXT:    sqrtss %xmm0, %xmm0 # sched: [34:17.00]
+; ATOM-NEXT:    sqrtss %xmm1, %xmm1 # sched: [34:17.00]
 ; ATOM-NEXT:    addps %xmm1, %xmm0 # sched: [5:5.00]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;
diff --git a/llvm/test/CodeGen/X86/sse2-schedule.ll b/llvm/test/CodeGen/X86/sse2-schedule.ll
index 7174b87..1427cf7 100644
--- a/llvm/test/CodeGen/X86/sse2-schedule.ll
+++ b/llvm/test/CodeGen/X86/sse2-schedule.ll
@@ -14281,8 +14281,8 @@ define <2 x double> @test_sqrtsd(<2 x double> %a0, <2 x double> *%a1) {
 ; ATOM-LABEL: test_sqrtsd:
 ; ATOM:       # %bb.0:
 ; ATOM-NEXT:    movapd (%rdi), %xmm1 # sched: [1:1.00]
-; ATOM-NEXT:    sqrtsd %xmm0, %xmm0 # sched: [0:?]
-; ATOM-NEXT:    sqrtsd %xmm1, %xmm1 # sched: [0:?]
+; ATOM-NEXT:    sqrtsd %xmm0, %xmm0 # sched: [62:31.00]
+; ATOM-NEXT:    sqrtsd %xmm1, %xmm1 # sched: [62:31.00]
 ; ATOM-NEXT:    addpd %xmm1, %xmm0 # sched: [6:3.00]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;