From: Sanjay Patel Date: Tue, 17 Dec 2019 15:21:32 +0000 (-0500) Subject: [AArch64] add tests for fcvtl2; NFC X-Git-Tag: llvmorg-11-init~1942 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fbaf835c5c515bf00dccd880b8afe0b2e0a10e06;p=platform%2Fupstream%2Fllvm.git [AArch64] add tests for fcvtl2; NFC --- diff --git a/llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll b/llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll index 227e052..d30a1c7 100644 --- a/llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll +++ b/llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll @@ -38,19 +38,19 @@ define <2 x double> @test_vcvt_high_f64_f32(<4 x float> %x) nounwind readnone ss ret <2 x double> %vcvt1.i } -define <2 x double> @test_vcvt_high_f64_f32_bitcast(<4 x float> %x) nounwind readnone ssp { -; GENERIC-LABEL: test_vcvt_high_f64_f32_bitcast: +define <2 x double> @test_vcvt_high_v1f64_f32_bitcast(<4 x float> %x) nounwind readnone ssp { +; GENERIC-LABEL: test_vcvt_high_v1f64_f32_bitcast: ; GENERIC: // %bb.0: ; GENERIC-NEXT: ext.16b v0, v0, v0, #8 ; GENERIC-NEXT: fcvtl v0.2d, v0.2s ; GENERIC-NEXT: ret ; -; FAST-LABEL: test_vcvt_high_f64_f32_bitcast: +; FAST-LABEL: test_vcvt_high_v1f64_f32_bitcast: ; FAST: // %bb.0: ; FAST-NEXT: fcvtl2 v0.2d, v0.4s ; FAST-NEXT: ret ; -; GISEL-LABEL: test_vcvt_high_f64_f32_bitcast: +; GISEL-LABEL: test_vcvt_high_v1f64_f32_bitcast: ; GISEL: // %bb.0: ; GISEL-NEXT: ext.16b v0, v0, v0, #8 ; GISEL-NEXT: fcvtl v0.2d, v0.2s @@ -62,21 +62,21 @@ define <2 x double> @test_vcvt_high_f64_f32_bitcast(<4 x float> %x) nounwind rea ret <2 x double> %r } -define <2 x double> @test_vcvt_high_i64_f32_bitcast(<2 x i64> %x) nounwind readnone ssp { -; GENERIC-LABEL: test_vcvt_high_i64_f32_bitcast: +define <2 x double> @test_vcvt_high_v1i64_f32_bitcast(<2 x i64> %x) nounwind readnone ssp { +; GENERIC-LABEL: test_vcvt_high_v1i64_f32_bitcast: ; GENERIC: // %bb.0: ; GENERIC-NEXT: ext.16b v0, v0, v0, #8 ; GENERIC-NEXT: fcvtl v0.2d, v0.2s ; GENERIC-NEXT: ret ; -; FAST-LABEL: test_vcvt_high_i64_f32_bitcast: +; FAST-LABEL: test_vcvt_high_v1i64_f32_bitcast: ; FAST: // %bb.0: ; FAST-NEXT: ext.16b v0, v0, v0, #8 ; FAST-NEXT: // kill: def $d0 killed $d0 killed $q0 ; FAST-NEXT: fcvtl v0.2d, v0.2s ; FAST-NEXT: ret ; -; GISEL-LABEL: test_vcvt_high_i64_f32_bitcast: +; GISEL-LABEL: test_vcvt_high_v1i64_f32_bitcast: ; GISEL: // %bb.0: ; GISEL-NEXT: ext.16b v0, v0, v0, #8 ; GISEL-NEXT: fcvtl v0.2d, v0.2s @@ -87,6 +87,181 @@ define <2 x double> @test_vcvt_high_i64_f32_bitcast(<2 x i64> %x) nounwind readn ret <2 x double> %r } +define <2 x double> @test_vcvt_high_v2i32_f32_bitcast(<4 x i32> %x) nounwind readnone ssp { +; GENERIC-LABEL: test_vcvt_high_v2i32_f32_bitcast: +; GENERIC: // %bb.0: +; GENERIC-NEXT: ext.16b v0, v0, v0, #8 +; GENERIC-NEXT: fcvtl v0.2d, v0.2s +; GENERIC-NEXT: ret +; +; FAST-LABEL: test_vcvt_high_v2i32_f32_bitcast: +; FAST: // %bb.0: +; FAST-NEXT: ext.16b v0, v0, v0, #8 +; FAST-NEXT: // kill: def $d0 killed $d0 killed $q0 +; FAST-NEXT: fcvtl v0.2d, v0.2s +; FAST-NEXT: ret +; +; GISEL-LABEL: test_vcvt_high_v2i32_f32_bitcast: +; GISEL: // %bb.0: +; GISEL-NEXT: ext.16b v0, v0, v0, #8 +; GISEL-NEXT: fcvtl v0.2d, v0.2s +; GISEL-NEXT: ret + %ext = shufflevector <4 x i32> %x, <4 x i32> undef, <2 x i32> + %bc2 = bitcast <2 x i32> %ext to <2 x float> + %r = fpext <2 x float> %bc2 to <2 x double> + ret <2 x double> %r +} + +define <2 x double> @test_vcvt_high_v4i16_f32_bitcast(<8 x i16> %x) nounwind readnone ssp { +; GENERIC-LABEL: test_vcvt_high_v4i16_f32_bitcast: +; GENERIC: // %bb.0: +; GENERIC-NEXT: ext.16b v0, v0, v0, #8 +; GENERIC-NEXT: fcvtl v0.2d, v0.2s +; GENERIC-NEXT: ret +; +; FAST-LABEL: test_vcvt_high_v4i16_f32_bitcast: +; FAST: // %bb.0: +; FAST-NEXT: ext.16b v0, v0, v0, #8 +; FAST-NEXT: // kill: def $d0 killed $d0 killed $q0 +; FAST-NEXT: fcvtl v0.2d, v0.2s +; FAST-NEXT: ret +; +; GISEL-LABEL: test_vcvt_high_v4i16_f32_bitcast: +; GISEL: // %bb.0: +; GISEL-NEXT: ext.16b v0, v0, v0, #8 +; GISEL-NEXT: fcvtl v0.2d, v0.2s +; GISEL-NEXT: ret + %ext = shufflevector <8 x i16> %x, <8 x i16> undef, <4 x i32> + %bc2 = bitcast <4 x i16> %ext to <2 x float> + %r = fpext <2 x float> %bc2 to <2 x double> + ret <2 x double> %r +} + +define <2 x double> @test_vcvt_high_v8i8_f32_bitcast(<16 x i8> %x) nounwind readnone ssp { +; GENERIC-LABEL: test_vcvt_high_v8i8_f32_bitcast: +; GENERIC: // %bb.0: +; GENERIC-NEXT: ext.16b v0, v0, v0, #8 +; GENERIC-NEXT: fcvtl v0.2d, v0.2s +; GENERIC-NEXT: ret +; +; FAST-LABEL: test_vcvt_high_v8i8_f32_bitcast: +; FAST: // %bb.0: +; FAST-NEXT: ext.16b v0, v0, v0, #8 +; FAST-NEXT: // kill: def $d0 killed $d0 killed $q0 +; FAST-NEXT: fcvtl v0.2d, v0.2s +; FAST-NEXT: ret +; +; GISEL-LABEL: test_vcvt_high_v8i8_f32_bitcast: +; GISEL: // %bb.0: +; GISEL-NEXT: ext.16b v0, v0, v0, #8 +; GISEL-NEXT: fcvtl v0.2d, v0.2s +; GISEL-NEXT: ret + %ext = shufflevector <16 x i8> %x, <16 x i8> undef, <8 x i32> + %bc2 = bitcast <8 x i8> %ext to <2 x float> + %r = fpext <2 x float> %bc2 to <2 x double> + ret <2 x double> %r +} + +define <4 x float> @test_vcvt_high_v1i64_f16_bitcast(<2 x i64> %x) nounwind readnone ssp { +; GENERIC-LABEL: test_vcvt_high_v1i64_f16_bitcast: +; GENERIC: // %bb.0: +; GENERIC-NEXT: ext.16b v0, v0, v0, #8 +; GENERIC-NEXT: fcvtl v0.4s, v0.4h +; GENERIC-NEXT: ret +; +; FAST-LABEL: test_vcvt_high_v1i64_f16_bitcast: +; FAST: // %bb.0: +; FAST-NEXT: ext.16b v0, v0, v0, #8 +; FAST-NEXT: // kill: def $d0 killed $d0 killed $q0 +; FAST-NEXT: fcvtl v0.4s, v0.4h +; FAST-NEXT: ret +; +; GISEL-LABEL: test_vcvt_high_v1i64_f16_bitcast: +; GISEL: // %bb.0: +; GISEL-NEXT: ext.16b v0, v0, v0, #8 +; GISEL-NEXT: fcvtl v0.4s, v0.4h +; GISEL-NEXT: ret + %ext = shufflevector <2 x i64> %x, <2 x i64> undef, <1 x i32> + %bc2 = bitcast <1 x i64> %ext to <4 x half> + %r = fpext <4 x half> %bc2 to <4 x float> + ret <4 x float> %r +} + +define <4 x float> @test_vcvt_high_v2i32_f16_bitcast(<4 x i32> %x) nounwind readnone ssp { +; GENERIC-LABEL: test_vcvt_high_v2i32_f16_bitcast: +; GENERIC: // %bb.0: +; GENERIC-NEXT: ext.16b v0, v0, v0, #8 +; GENERIC-NEXT: fcvtl v0.4s, v0.4h +; GENERIC-NEXT: ret +; +; FAST-LABEL: test_vcvt_high_v2i32_f16_bitcast: +; FAST: // %bb.0: +; FAST-NEXT: ext.16b v0, v0, v0, #8 +; FAST-NEXT: // kill: def $d0 killed $d0 killed $q0 +; FAST-NEXT: fcvtl v0.4s, v0.4h +; FAST-NEXT: ret +; +; GISEL-LABEL: test_vcvt_high_v2i32_f16_bitcast: +; GISEL: // %bb.0: +; GISEL-NEXT: ext.16b v0, v0, v0, #8 +; GISEL-NEXT: fcvtl v0.4s, v0.4h +; GISEL-NEXT: ret + %ext = shufflevector <4 x i32> %x, <4 x i32> undef, <2 x i32> + %bc2 = bitcast <2 x i32> %ext to <4 x half> + %r = fpext <4 x half> %bc2 to <4 x float> + ret <4 x float> %r +} + +define <4 x float> @test_vcvt_high_v4i16_f16_bitcast(<8 x i16> %x) nounwind readnone ssp { +; GENERIC-LABEL: test_vcvt_high_v4i16_f16_bitcast: +; GENERIC: // %bb.0: +; GENERIC-NEXT: ext.16b v0, v0, v0, #8 +; GENERIC-NEXT: fcvtl v0.4s, v0.4h +; GENERIC-NEXT: ret +; +; FAST-LABEL: test_vcvt_high_v4i16_f16_bitcast: +; FAST: // %bb.0: +; FAST-NEXT: ext.16b v0, v0, v0, #8 +; FAST-NEXT: // kill: def $d0 killed $d0 killed $q0 +; FAST-NEXT: fcvtl v0.4s, v0.4h +; FAST-NEXT: ret +; +; GISEL-LABEL: test_vcvt_high_v4i16_f16_bitcast: +; GISEL: // %bb.0: +; GISEL-NEXT: ext.16b v0, v0, v0, #8 +; GISEL-NEXT: fcvtl v0.4s, v0.4h +; GISEL-NEXT: ret + %ext = shufflevector <8 x i16> %x, <8 x i16> undef, <4 x i32> + %bc2 = bitcast <4 x i16> %ext to <4 x half> + %r = fpext <4 x half> %bc2 to <4 x float> + ret <4 x float> %r +} + +define <4 x float> @test_vcvt_high_v8i8_f16_bitcast(<16 x i8> %x) nounwind readnone ssp { +; GENERIC-LABEL: test_vcvt_high_v8i8_f16_bitcast: +; GENERIC: // %bb.0: +; GENERIC-NEXT: ext.16b v0, v0, v0, #8 +; GENERIC-NEXT: fcvtl v0.4s, v0.4h +; GENERIC-NEXT: ret +; +; FAST-LABEL: test_vcvt_high_v8i8_f16_bitcast: +; FAST: // %bb.0: +; FAST-NEXT: ext.16b v0, v0, v0, #8 +; FAST-NEXT: // kill: def $d0 killed $d0 killed $q0 +; FAST-NEXT: fcvtl v0.4s, v0.4h +; FAST-NEXT: ret +; +; GISEL-LABEL: test_vcvt_high_v8i8_f16_bitcast: +; GISEL: // %bb.0: +; GISEL-NEXT: ext.16b v0, v0, v0, #8 +; GISEL-NEXT: fcvtl v0.4s, v0.4h +; GISEL-NEXT: ret + %ext = shufflevector <16 x i8> %x, <16 x i8> undef, <8 x i32> + %bc2 = bitcast <8 x i8> %ext to <4 x half> + %r = fpext <4 x half> %bc2 to <4 x float> + ret <4 x float> %r +} + ; FALLBACK-NOT: remark{{.*}}G_FPEXT{{.*}}(in function: test_vcvt_f32_f64) ; FALLBACK-NOT: remark{{.*}}fpext{{.*}}(in function: test_vcvt_f32_f64) define <2 x float> @test_vcvt_f32_f64(<2 x double> %v) nounwind readnone ssp {