From: Ville Syrjälä Date: Tue, 10 Oct 2017 12:12:02 +0000 (+0300) Subject: drm/i915: Inline the required bits of intel_ddi_post_disable() into intel_ddi_fdi_pos... X-Git-Tag: v4.19~298^2~46^2~1355 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fb0bd3bd10bd83319c2ac935f1cd47db85131d1b;p=platform%2Fkernel%2Flinux-rpi3.git drm/i915: Inline the required bits of intel_ddi_post_disable() into intel_ddi_fdi_post_disable() To untangle the mess that is intel_ddi_post_disable() move the the bits needed by FDI into intel_ddi_fdi_post_disable(). This way we can stop worrying about FDI in intel_ddi_post_disable(). Reviewed-by: Jani Nikula Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20171010121207.570-5-ville.syrjala@linux.intel.com --- diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index e4d1d93..7187aea 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2349,7 +2349,8 @@ void intel_ddi_fdi_post_disable(struct intel_encoder *encoder, val &= ~FDI_RX_ENABLE; I915_WRITE(FDI_RX_CTL(PIPE_A), val); - intel_ddi_post_disable(encoder, old_crtc_state, old_conn_state); + intel_disable_ddi_buf(encoder); + intel_ddi_clk_disable(encoder); val = I915_READ(FDI_RX_MISC(PIPE_A)); val &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);