From: Nithin Sujir Date: Tue, 21 May 2013 12:57:32 +0000 (+0000) Subject: tg3: Ensure boot code has completed initialization before accessing hardware X-Git-Tag: upstream/snapshot3+hdmi~5038^2~17 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fb03a43f5fb42000dcc62d91138c1c24fca609b0;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git tg3: Ensure boot code has completed initialization before accessing hardware After resetting the device, the driver waits for a signature to be updated to know that firmware has completed initialization. However, the call to tg3_poll_fw() is being done too late and we're writing to the GRC_MODE register before it has completely initialized, causing contention with firmware. This logic has existed since day one but is causing PCIE link to go down randomly at startup on one platform once every few hundred reboots. Move the tg3_poll_fw() up to before we write to the GRC_MODE register after reset. Signed-off-by: Nithin Nayak Sujir Signed-off-by: Michael Chan Signed-off-by: David S. Miller --- diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index e285d76..158a7c9 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c @@ -8911,6 +8911,10 @@ static int tg3_chip_reset(struct tg3 *tp) tg3_halt_cpu(tp, RX_CPU_BASE); } + err = tg3_poll_fw(tp); + if (err) + return err; + tw32(GRC_MODE, tp->grc_mode); if (tg3_chip_rev_id(tp) == CHIPREV_ID_5705_A0) { @@ -8941,10 +8945,6 @@ static int tg3_chip_reset(struct tg3 *tp) tg3_ape_unlock(tp, TG3_APE_LOCK_GRC); - err = tg3_poll_fw(tp); - if (err) - return err; - tg3_mdio_start(tp); if (tg3_flag(tp, PCI_EXPRESS) &&