From: Philip Reames Date: Mon, 1 May 2023 14:32:55 +0000 (-0700) Subject: [RISCV] Rewrite isLegalElementTypeForRVV in terms of ValueTypes [nfc] X-Git-Tag: upstream/17.0.6~9903 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=faa43a80f70c639f40021a175c60857bdcf7cc1f;p=platform%2Fupstream%2Fllvm.git [RISCV] Rewrite isLegalElementTypeForRVV in terms of ValueTypes [nfc] This was briefly mentioned as a possibility in review discussion on D149369. One slightly surprising bit to call out - these interfaces can get invoked with non-vector typed arguments. LoopVectorizer likes to call the costing interfaces with scalar types when unrolling, but not vectorizing. I found that surprising, not sure if others do. Differential Revision: https://reviews.llvm.org/D149462 --- diff --git a/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp b/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp index 590ea5e..e844e1b 100644 --- a/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp @@ -445,11 +445,12 @@ bool RISCVGatherScatterLowering::tryCreateStridedLoadStore(IntrinsicInst *II, Value *AlignOp) { // Make sure the operation will be supported by the backend. MaybeAlign MA = cast(AlignOp)->getMaybeAlignValue(); - if (!MA || !TLI->isLegalStridedLoadStore(*DL, DataType, *MA)) + EVT DataTypeVT = TLI->getValueType(*DL, DataType); + if (!MA || !TLI->isLegalStridedLoadStore(DataTypeVT, *MA)) return false; // FIXME: Let the backend type legalize by splitting/widening? - if (!TLI->isTypeLegal(TLI->getValueType(*DL, DataType))) + if (!TLI->isTypeLegal(DataTypeVT)) return false; // Pointer should be a GEP. diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 84dceb5..ff081a7 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -2060,27 +2060,30 @@ bool RISCVTargetLowering::mergeStoresAfterLegalization(EVT VT) const { (VT.isFixedLengthVector() && VT.getVectorElementType() == MVT::i1); } -bool RISCVTargetLowering::isLegalElementTypeForRVV(Type *ScalarTy) const { - if (ScalarTy->isPointerTy()) +bool RISCVTargetLowering::isLegalElementTypeForRVV(EVT ScalarTy) const { + if (!ScalarTy.isSimple()) + return false; + switch (ScalarTy.getSimpleVT().SimpleTy) { + case MVT::iPTR: return Subtarget.is64Bit() ? Subtarget.hasVInstructionsI64() : true; - - if (ScalarTy->isIntegerTy(8) || ScalarTy->isIntegerTy(16) || - ScalarTy->isIntegerTy(32)) + case MVT::i8: + case MVT::i16: + case MVT::i32: return true; - - if (ScalarTy->isIntegerTy(64)) + case MVT::i64: return Subtarget.hasVInstructionsI64(); - - if (ScalarTy->isHalfTy()) + case MVT::f16: return Subtarget.hasVInstructionsF16(); - if (ScalarTy->isFloatTy()) + case MVT::f32: return Subtarget.hasVInstructionsF32(); - if (ScalarTy->isDoubleTy()) + case MVT::f64: return Subtarget.hasVInstructionsF64(); - - return false; + default: + return false; + } } + unsigned RISCVTargetLowering::combineRepeatedFPDivisors() const { return NumRepeatedDivisors; } @@ -11458,8 +11461,7 @@ static SDValue performCONCAT_VECTORSCombine(SDNode *N, SelectionDAG &DAG, return SDValue(); // Check that the operation is legal - Type *WideVecTy = EVT(WideVecVT).getTypeForEVT(*DAG.getContext()); - if (!TLI.isLegalStridedLoadStore(DAG.getDataLayout(), WideVecTy, Align)) + if (!TLI.isLegalStridedLoadStore(WideVecVT, Align)) return SDValue(); MVT ContainerVT = TLI.getContainerForFixedLengthVector(WideVecVT); @@ -15815,12 +15817,14 @@ bool RISCVTargetLowering::isLegalInterleavedAccessType( FixedVectorType *VTy, unsigned Factor, const DataLayout &DL) const { if (!Subtarget.useRVVForFixedLengthVectors()) return false; - if (!isLegalElementTypeForRVV(VTy->getElementType())) - return false; EVT VT = getValueType(DL, VTy); // Don't lower vlseg/vsseg for fixed length vector types that can't be split. if (!isTypeLegal(VT)) return false; + + if (!isLegalElementTypeForRVV(VT.getScalarType())) + return false; + // Sometimes the interleaved access pass picks up splats as interleaves of one // element. Don't lower these. if (VTy->getNumElements() < 2) @@ -15834,22 +15838,21 @@ bool RISCVTargetLowering::isLegalInterleavedAccessType( return Factor * LMUL <= 8; } -bool RISCVTargetLowering::isLegalStridedLoadStore(const DataLayout &DL, - Type *DataType, +bool RISCVTargetLowering::isLegalStridedLoadStore(EVT DataType, Align Alignment) const { if (!Subtarget.hasVInstructions()) return false; // Only support fixed vectors if we know the minimum vector size. - if (isa(DataType) && !Subtarget.useRVVForFixedLengthVectors()) + if (DataType.isFixedLengthVector() && !Subtarget.useRVVForFixedLengthVectors()) return false; - Type *ScalarType = DataType->getScalarType(); + EVT ScalarType = DataType.getScalarType(); if (!isLegalElementTypeForRVV(ScalarType)) return false; if (!Subtarget.enableUnalignedVectorMem() && - Alignment < DL.getTypeStoreSize(ScalarType).getFixedValue()) + Alignment < ScalarType.getStoreSize()) return false; return true; diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h index 849b11f..c020b27 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.h +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h @@ -666,7 +666,7 @@ public: bool shouldRemoveExtendFromGSIndex(EVT IndexVT, EVT DataVT) const override; - bool isLegalElementTypeForRVV(Type *ScalarTy) const; + bool isLegalElementTypeForRVV(EVT ScalarTy) const; bool shouldConvertFpToSat(unsigned Op, EVT FPVT, EVT VT) const override; @@ -706,7 +706,7 @@ public: /// Return true if a stride load store of the given result type and /// alignment is legal. - bool isLegalStridedLoadStore(const DataLayout &DL, Type *DataType, Align Alignment) const; + bool isLegalStridedLoadStore(EVT DataType, Align Alignment) const; unsigned getMaxSupportedInterleaveFactor() const override { return 8; } diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h index 50d7c0a..5319bff 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h @@ -179,23 +179,25 @@ public: const Instruction *CxtI = nullptr); bool isElementTypeLegalForScalableVector(Type *Ty) const { - return TLI->isLegalElementTypeForRVV(Ty); + return TLI->isLegalElementTypeForRVV(TLI->getValueType(DL, Ty)); } bool isLegalMaskedLoadStore(Type *DataType, Align Alignment) { if (!ST->hasVInstructions()) return false; + EVT DataTypeVT = TLI->getValueType(DL, DataType); + // Only support fixed vectors if we know the minimum vector size. - if (isa(DataType) && !ST->useRVVForFixedLengthVectors()) + if (DataTypeVT.isFixedLengthVector() && !ST->useRVVForFixedLengthVectors()) return false; - auto *ElemType = DataType->getScalarType(); - if (!ST->enableUnalignedVectorMem() && - Alignment < DL.getTypeStoreSize(ElemType).getFixedValue()) + EVT ElemType = DataTypeVT.getScalarType(); + if (!ST->enableUnalignedVectorMem() && Alignment < ElemType.getStoreSize()) return false; return TLI->isLegalElementTypeForRVV(ElemType); + } bool isLegalMaskedLoad(Type *DataType, Align Alignment) { @@ -209,13 +211,14 @@ public: if (!ST->hasVInstructions()) return false; + EVT DataTypeVT = TLI->getValueType(DL, DataType); + // Only support fixed vectors if we know the minimum vector size. - if (isa(DataType) && !ST->useRVVForFixedLengthVectors()) + if (DataTypeVT.isFixedLengthVector() && !ST->useRVVForFixedLengthVectors()) return false; - auto *ElemType = DataType->getScalarType(); - if (!ST->enableUnalignedVectorMem() && - Alignment < DL.getTypeStoreSize(ElemType).getFixedValue()) + EVT ElemType = DataTypeVT.getScalarType(); + if (!ST->enableUnalignedVectorMem() && Alignment < ElemType.getStoreSize()) return false; return TLI->isLegalElementTypeForRVV(ElemType); @@ -262,7 +265,7 @@ public: return true; Type *Ty = RdxDesc.getRecurrenceType(); - if (!TLI->isLegalElementTypeForRVV(Ty)) + if (!TLI->isLegalElementTypeForRVV(TLI->getValueType(DL, Ty))) return false; switch (RdxDesc.getRecurrenceKind()) {