From: Jason Ekstrand Date: Thu, 7 Sep 2017 01:33:38 +0000 (-0700) Subject: intel/fs: Handle flag read/write aliasing in needs_src_copy X-Git-Tag: upstream/18.1.0~4794 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fa6e74e33e5bc5f6fba8f9de76b8b059515e708f;p=platform%2Fupstream%2Fmesa.git intel/fs: Handle flag read/write aliasing in needs_src_copy In order to implement the ballot intrinsic, we do a MOV from flag register to some GRF. If that GRF is used in a SEL, cmod propagation helpfully changes it into a MOV from the flag register with a cmod. This is perfectly valid but when lower_simd_width comes along, it simply splits into two instructions which both have conditional modifiers. This is a problem since we're reading the flag register. This commit makes us check whether or not flags_written() overlaps with the flag values that we are reading via the instruction source and, if we have any interference, will force us to emit a copy of the source. Reviewed-by: Matt Turner Cc: mesa-stable@lists.freedesktop.org --- diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 30e8841..4616529 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -5013,7 +5013,9 @@ needs_src_copy(const fs_builder &lbld, const fs_inst *inst, unsigned i) { return !(is_periodic(inst->src[i], lbld.dispatch_width()) || (inst->components_read(i) == 1 && - lbld.dispatch_width() <= inst->exec_size)); + lbld.dispatch_width() <= inst->exec_size)) || + (inst->flags_written() & + flag_mask(inst->src[i], type_sz(inst->src[i].type))); } /**