From: Dmitry Baryshkov Date: Wed, 23 Mar 2022 08:50:07 +0000 (+0300) Subject: clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks X-Git-Tag: v6.6.17~7417^2^2~1^2~14^2~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fa5ad5c51706e5407a3bb56c9542a63c81e35a2f;p=platform%2Fkernel%2Flinux-rpi.git clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks Use newly defined clk_regmap_mux_safe_ops for PCIe pipe clocks to let the clock framework automatically park the clock when the clock is switched off and restore the parent when the clock is switched on. Reviewed-by: Bjorn Andersson Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220323085010.1753493-3-dmitry.baryshkov@linaro.org --- diff --git a/drivers/clk/qcom/gcc-sm8450.c b/drivers/clk/qcom/gcc-sm8450.c index 593a195..fb6decd 100644 --- a/drivers/clk/qcom/gcc-sm8450.c +++ b/drivers/clk/qcom/gcc-sm8450.c @@ -243,13 +243,14 @@ static struct clk_regmap_mux gcc_pcie_0_pipe_clk_src = { .reg = 0x7b060, .shift = 0, .width = 2, + .safe_src_parent = P_BI_TCXO, .parent_map = gcc_parent_map_4, .clkr = { .hw.init = &(struct clk_init_data){ .name = "gcc_pcie_0_pipe_clk_src", .parent_data = gcc_parent_data_4, .num_parents = ARRAY_SIZE(gcc_parent_data_4), - .ops = &clk_regmap_mux_closest_ops, + .ops = &clk_regmap_mux_safe_ops, }, }, }; @@ -273,13 +274,14 @@ static struct clk_regmap_mux gcc_pcie_1_pipe_clk_src = { .reg = 0x9d064, .shift = 0, .width = 2, + .safe_src_parent = P_BI_TCXO, .parent_map = gcc_parent_map_6, .clkr = { .hw.init = &(struct clk_init_data){ .name = "gcc_pcie_1_pipe_clk_src", .parent_data = gcc_parent_data_6, .num_parents = ARRAY_SIZE(gcc_parent_data_6), - .ops = &clk_regmap_mux_closest_ops, + .ops = &clk_regmap_mux_safe_ops, }, }, };