From: Antia Puentes Date: Wed, 17 Jun 2015 07:21:30 +0000 (+0200) Subject: i965/nir/vec4: Implement "bool<->int,float" format conversion X-Git-Tag: upstream/17.1.0~17146 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=fa4731f4a53aa21e53a62f42f3afdc19b0ce4c8e;p=platform%2Fupstream%2Fmesa.git i965/nir/vec4: Implement "bool<->int,float" format conversion Used the same implementation than the vec4_visitor NIR. Adds NIR ALU operations: * nir_op_b2i * nir_op_b2f * nir_op_f2b * nir_op_i2b Reviewed-by: Jason Ekstrand --- diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp index 549ed1b..039309c 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp @@ -1005,6 +1005,25 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr) emit(AND(dst, op[0], op[1])); break; + case nir_op_b2i: + emit(AND(dst, op[0], src_reg(1))); + break; + + case nir_op_b2f: + op[0].type = BRW_REGISTER_TYPE_D; + dst.type = BRW_REGISTER_TYPE_D; + emit(AND(dst, op[0], src_reg(0x3f800000u))); + dst.type = BRW_REGISTER_TYPE_F; + break; + + case nir_op_f2b: + emit(CMP(dst, op[0], src_reg(0.0f), BRW_CONDITIONAL_NZ)); + break; + + case nir_op_i2b: + emit(CMP(dst, op[0], src_reg(0), BRW_CONDITIONAL_NZ)); + break; + default: unreachable("Unimplemented ALU operation"); }