From: Padmavathi Venna Date: Thu, 28 Mar 2013 04:32:22 +0000 (+0000) Subject: Exynos: clock: Correct pwm source clk selection X-Git-Tag: v2013.04-rc3~1^2~76^2~3 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=f9e4d046e016b81aa5ccf68436b77b12189d418e;p=kernel%2Fu-boot.git Exynos: clock: Correct pwm source clk selection MPLL is selected as the source clk of pwm by default Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Padmavathi Venna Signed-off-by: Akshay Saraswat Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- diff --git a/board/samsung/smdk5250/setup.h b/board/samsung/smdk5250/setup.h index a159601..34d8bc31 100644 --- a/board/samsung/smdk5250/setup.h +++ b/board/samsung/smdk5250/setup.h @@ -343,7 +343,7 @@ #define TOP2_VAL 0x0110000 /* CLK_SRC_PERIC0 */ -#define PWM_SEL 0 +#define PWM_SEL 6 #define UART3_SEL 6 #define UART2_SEL 6 #define UART1_SEL 6